I2C can't be enabled in prj_base.conf because it's a board-specific
feature. For example, if a board doesn't have I2C but CONFIG_I2C=y then
the build will fail (on Zephyr build system side). The patch here gets the
qemu_cortex_m3 build working again.
This enables going back to previous wrapped lines using backspace or left
arrow: instead of just sticking to the beginning of a line, the cursor will
move a line up.
On MCUs that have an I2C TIMINGR register, this can now be explicitly set
via the "timingr" keyword argument to the I2C constructor, for both
machine.I2C and pyb.I2C. This allows to configure precise timing values
when the defaults are inadequate.
Previously the hardware I2C timeout was hard coded to 50ms which isn't
guaranteed to be enough depending on the clock stretching specs of the I2C
device(s) in use.
This patch ensures the hardware I2C implementation honors the existing
timeout argument passed to the machine.I2C constructor. The default
timeout for software and hardware I2C is now 50ms.
Recent gcc versions (at least 9.1) give a warning about using "sp" in the
clobber list. Such code is removed by this patch. A dedicated function is
instead used to set SP and branch to the bootloader so the code has full
control over what happens.
Fixes issue #4785.
This also fixes deleting the PPP task, since eTaskGetState() never returns
eDeleted.
A limitation with this patch: once the PPP is deactivated (ppp.active(0))
it cannot be used again. A new PPP instance must be created instead.
This allows figuring out the number of bytes in the memoryview object as
len(memview) * memview.itemsize.
The feature is enabled via MICROPY_PY_BUILTINS_MEMORYVIEW_ITEMSIZE and is
disabled by default.
The original code called setsockopt(SO_RCVTIMEO/SO_SNDTIMEO) with NULL
timeout structure argument, which is an illegal usage of that function.
The old code also didn't validate the return value of setsockopt, missing
the bug completely.
Before this change, if the USB was reconnected it was possible that some
characters in the TX buffer were retransmitted because tx_buf_ptr_out and
tx_buf_ptr_out_shadow were reset while tx_buf_ptr_in wasn't. That
behaviour is fixed here by retaining the TX buffer state across reconnects.
Fixes issue #4761.
The new function factory_reset_make_files() populates the given filesystem
with the default factory files. It is defined with weak linkage so it can
be overridden by a board.
This commit also brings some minor user-facing changes:
- boot.py is now no longer created unconditionally if it doesn't exist, it
is now only created when the filesystem is formatted and the other files
are populated (so, before, if the user deleted boot.py it would be
recreated at next boot; now it won't be).
- pybcdc.inf and README.txt are only created if the board has USB, because
they only really make sense if the filesystem is exposed via USB.
It's more common to need non-blocking behaviour when reading from a UART,
rather than having a large timeout like 1000ms (the original behaviour).
With a large timeout it's 1) likely that the function will read forever if
characters keep trickling it; or 2) the function will unnecessarily wait
when characters come sporadically, eg at a REPL prompt.
- IBK-BLYST-NANO: Breakout board
- IDK-BLYST-NANO: DevKit board with builtin IDAP-M CMSIS-DAP Debug JTAG,
RGB led
- BLUEIO-TAG-EVIM: Sensor tag board (environmental sensor
(T, H, P, Air quality) + 9 axis motion sensor)
Also, the LED module has been updated to support individual base level
configuration of each LED. If set, this will be used instead of the
common configuration, MICROPY_HW_LED_PULLUP. The new configuration,
MICROPY_HW_LEDX_LEVEL, where X is the LED number can be used to set
the base level of the specific LED.
The alternate function pin allocations are different to other NUCLEO-144
boards. This is because the STM32F413 has a very high peripheral count:
10x UART, 5x SPI, 3x I2C, 3x CAN. The pinout was chosen to expose all
these devices on separate pins except CAN3 which shares a pin with UART1
and SPI1 which shares pins with DAC.
Includes:
- Support for CAN3.
- Support for UART9 and UART10.
- stm32f413xg.ld and stm32f413xh.ld linker scripts.
- stm32f413_af.csv alternate function mapping.
- startup_stm32f413xx.s because F413 has different interrupt vector table.
- Memory configuration with: 240K filesystem, 240K heap, 16K stack.
This patch makes pllvalues.py generate two tables: one for when HSI is used
and one for when HSE is used. The correct table is then selected at
compile time via the existing MICROPY_HW_CLK_USE_HSI.
When building with link time optimization enabled it is possible both
gc_collect() and gc_collect_regs_and_stack() get inlined into gc_alloc()
which can result in the regs variable being pushed on the stack earlier
than some of the registers. Depending on the calling convention, those
registers might however contain pointers to blocks which have just been
allocated in the caller of gc_alloc(). Then those pointers end up higher on
the stack than regs, aren't marked by gc_collect_root() and hence get
sweeped, even though they're still in use.
As reported in #4652 this happened for in 32-bit msvc release builds:
mp_lexer_new() does two consecutive allocations and the latter triggered a
gc_collect() which would sweep the memory of the first allocation again.
The machine.WDT() now accepts the "timeout" keyword argument to select the
WDT interval. And the WDT is changed to panic mode which means it will
reset the device if the interval expires (instead of just printing an error
message).
On the STM32F722 (at least, but STM32F767 is not affected) the CK48MSEL bit
must be deselected before PLLSAION is turned off, or else the 48MHz
peripherals (RNG, SDMMC, USB) may get stuck without a clock source.
In such "lock up" cases it seems that these peripherals are still being
clocked from the PLLSAI even though the CK48MSEL bit is turned off. A hard
reset does not get them out of this stuck state. Enabling the PLLSAI and
then disabling it does get them out. A test case to see this is:
import machine, pyb
for i in range(100):
machine.freq(122_000000)
machine.freq(120_000000)
print(i, [pyb.rng() for _ in range(4)])
On occasion the RNG will just return 0's, but will get fixed again on the
next loop (when PLLSAI is enabled by the change to a SYSCLK of 122MHz).
Fixes issue #4696.
The stm32 and nrf ports already had the behaviour that they would first
check if the script exists before executing it, and this patch makes all
other ports work the same way. This helps when developing apps because
it's hard to tell (when unconditionally trying to execute the scripts) if
the resulting OSError at boot up comes from missing boot.py or main.py, or
from some other error. And it's not really an error if these scripts don't
exist.
This patch makes the DAC driver simpler and removes the need for the ST
HAL. As part of it, new helper functions are added to the DMA driver,
which also use direct register access instead of the ST HAL.
Main changes to the DAC interface are:
- The DAC uPy object is no longer allocated dynamically on the heap,
rather it's statically allocated and the same object is retrieved for
subsequent uses of pyb.DAC(<id>). This allows to access the DAC objects
without resetting the DAC peripheral. It also means that the DAC is only
reset if explicitly passed initialisation parameters, like "bits" or
"buffering".
- The DAC.noise() and DAC.triangle() methods now output a signal which is
full scale (previously it was a fraction of the full output voltage).
- The DAC.write_timed() method is fixed so that it continues in the
background when another peripheral (eg SPI) uses the DMA (previously the
DAC would stop if another peripheral finished with the DMA and shut the
DMA peripheral off completely).
Based on the above, the following backwards incompatibilities are
introduced:
- pyb.DAC(id) will now only reset the DAC the first time it is called,
whereas previously each call to create a DAC object would reset the DAC.
To get the old behaviour pass the bits parameter like: pyb.DAC(id, bits).
- DAC.noise() and DAC.triangle() are now full scale. To get previous
behaviour (to change the amplitude and offset) write to the DAC_CR (MAMP
bits) and DAC_DHR12Rx registers manually.
If MICROPY_HW_RTC_USE_BYPASS is enabled the RTC startup goes as follows:
- RTC is started with LSE in bypass mode to begin with
- if that fails to start (after a given timeout) then LSE is reconfigured
in non-bypass
- if that fails to start then RTC is switched to LSI
Use uos.dupterm for REPL configuration of the main USB_VCP(0) stream on
dupterm slot 1, if USB is enabled. This means dupterm can also be used to
disable the boot REPL port if desired, via uos.dupterm(None, 1).
For efficiency this adds a simple hook to the global uos.dupterm code to
work with streams that are known to be native streams.
These macros are unused, and they can conflict with other entities by the
same name. If needed they can be provided as static inline functions, or
just functions.
Fixes issue #4559.
Adds support for hardware i2c to the zephyr port. Similar to other ports
such as stm32 and nrf, we only implement the i2c protocol functions
(readfrom and writeto) and defer memory operations (readfrom_mem,
readfrom_mem_into, and writeto_mem) to the software i2c implementation.
This may need to change in the future because zephyr is considering
deprecating its i2c_transfer function in favor of i2c_write_read; in this
case we would probably want to implement the memory operations directly
using i2c_write_read.
Tested with the accelerometer on frdm_k64f and bbc_microbit boards.
For gpio_hold_en() to work properly (not draw additional current) pull
up/down must be disabled when hold is enabled. This patch makes sure this
is the case by reworking the pull constants to be a bit mask.
Adding section about on how to disable use of the linker flag
-flto, by setting the LTO=0 argument to Make. Also, added a
note on recommended toolchains to use that works well with
LTO enabled.
Removing linker script for nrf52840 s140 v6.0.0 as pca10056
target board now points to the new v6.1.1. Also, removing the
entry from the download_ble_stack.sh script.
Removing linker script for nrf52832 s132 v6.0.0 as all target
boards now points to the new v6.1.1. Also, removing the entry
from the download_ble_stack.sh script.
Previously specifying None as the pull value would leave the pull up/down
state unchanged. This change makes it so -1 leaves the state unchanged and
None makes the pin float, as per the docs.
In this port JavaScript is the underlying "machine" and MicroPython is
transmuted into JavaScript by Emscripten. MicroPython can then run under
Node.js or in the browser.
Functions in these files may be needed when certain features are enabled
(eg dual core mode), even if the linker does not give a warning or error
about unresolved symbols.
During make, makemoduledefs.py parses the current builds c files for
MP_REGISTER_MODULE(module_name, obj_module, enabled_define)
These are used to generate a header with the required entries for
"mp_rom_map_elem_t mp_builtin_module_table[]" in py/objmodule.c
To use HSI instead of HSE define MICROPY_HW_CLK_USE_HSI as 1 in the board
configuration file. The default is to use HSE.
HSI has been made the default for the NUCLEO_F401RE board to serve as an
example, and because early revisions of this board need a hardware
modification to get HSE working.
This demonstrates how to use external QSPI flash in XIP (execute in place)
mode. The default configuration has all extmod/ code placed into external
QSPI flash, but other code can easily be put there by modifying the custom
f769_qspi.ld script.
A board can now use the make variables TEXT0_SECTIONS and TEXT1_SECTIONS to
specify the linker sections that should go in its firmware. Defaults are
provided which give the existing behaviour.
esp_wifi_connect will return ESP_OK for the normal path of execution which
just means the reconnect is started, not that it is actually reconnected.
In such a case wifi.isconnected() should return False until the
reconnection is complete. After reconnect a GOT_IP event is called and it
will change wifi_sta_connected back to True.
This patch makes sure that the char_data.props is first
assigned a value before other flags are OR'd in.
Resolves compilation warning on possible unitialized variable.
This patch makes sure that advertisment data is located in
persistent static RAM memory throughout the advertisment.
Also, setting m_adv_handle to predifined
BLE_GAP_ADV_SET_HANDLE_NOT_SET value to indicate first time
usage of the handle. Upon first advertisment configuration
this will be populated with a handle value returned by the
stack (s132/s140).
After new layout of nordicsemi.com the direct links to
command line tools (nrfjprog) has changed to become dynamic.
This patch removes the old direct links to each specific OS
variant and is replaced with one single link to the download
landing page instead.
Currently all usages of mp_hal_pin_config_alt_static() set the pin speed to
"high" (50Mhz). The SDRAM interface typically runs much faster than this
so should be set to the maximum pin speed.
This commit adds mp_hal_pin_config_alt_static_speed() which allows setting
the pin speed along with the other alternate function details.
A few RTC constants weren't being parsed properly due to whitespace
differences, and this patch makes certain whitespace optional. Changes
made:
- allow for no space between /*!< and EXTI, eg for:
__IO uint32_t IMR; /*!<EXTI Interrupt mask register, Address offset: 0x00 */
- allow for no space between semicolon and start of comment, eg for:
__IO uint32_t ALRMASSR;/*!< RTC alarm A sub second register, Address offset: 0x44 */
As mentioned in #4450, `websocket` was experimental with a single intended
user, `webrepl`. Therefore, we'll make this change without a weak
link `websocket` -> `uwebsocket`.
If opening of /dev/mem has failed an `OSError` is appropriately raised, but
the next time `mem8/16/32` is accessed the invalid file descriptor is used
and the program gets a SIGSEGV.
Replaces "PYB: soft reboot" with "MPY: soft reboot", etc.
Having a consistent prefix across ports reduces the difference between
ports, which is a general goal. And this change won't break pyboard.py
because that tool only looks for "soft reboot".
Adds support for 3 Cortex-M boards, selectable via "BOARD" in the Makefile:
- microbit, Cortex-M0 via nRF51822
- netduino2, Cortex-M3 via STM32F205
- mps2-an385, Cortex-M3 via FPGA
netduino2 is the default board because it's supported by older qemu
versions (down to at least 2.5.0).
Instead of checking each callback (currently storage and dma) explicitly
for each SysTick IRQ, use a simple circular function table indexed by the
lower bits of the millisecond tick counter. This allows callbacks to be
easily enabled/disabled at runtime, and scales well to a large number of
callbacks.
This is a good board to demonstrate the use of Mboot because it only has a
USB HS port exposed so the native ST DFU mode cannot be used. With Mboot
this port can be used.
If a custom bootloader is enabled (eg mboot) then machine.bootloader() will
now enter that loader. To get the original ST DFU loader pass any argument
to the function, like machine.bootloader(1).
Don't exclude the Timer instance 1 entry from machine_timer_obj[] when
using soft PWM. The usage is already checked when creating the Timer,
so just create an empty entry.
If needed these parameters can be added back and made functional one at a
time. It's better to explicitly not support them than to silently allow
but ignore them.
Python defines warnings as belonging to categories, where category is a
warning type (descending from exception type). This is useful, as e.g.
allows to disable warnings selectively and provide user-defined warning
types. So, implement this in MicroPython, except that categories are
represented just with strings. However, enough hooks are left to implement
categories differently per-port (e.g. as types), without need to patch each
and every usage.
With clock bypass enabled the attached SD card is clocked at the maximum
48MHz. But some SD cards are unreliable at these rates. Although it's
nice to have high speed transfers it's more important that the transfers
are reliable for all cards. So disable this clock bypass option.
This way the UART REPL does not need the MicroPython heap and exists
outside the MicroPython runtime, allowing characters to still be received
during a soft reset.
Auto-detection of the crystal frequency is convenient and allows for a
single binary for many different boards. But it can be unreliable in
certain situations so in production, for a given board, it's recommended to
configure the correct fixed frequency.
Configuration for the build is now specified using sdkconfig rather than
sdkconfig.h, which allows for much easier configuration with defaults from
the ESP IDF automatically applied. sdkconfig.h is generated using the new
ESP IDF kconfig_new tool written in Python. Custom configuration for a
particular ESP32 board can be specified via the make variable SDKCONFIG.
The esp32.common.ld file is also now generated using the standard ESP IDF
ldgen.py tool.
When the ESP IDF builds a project it puts all separate components into
separate .a library archives. And then the esp32.common.ld linker script
references these .a libraries by explicit name to put certain object files
in iRAM.
This patch does a similar thing for the custom build system used here,
putting all IDF .o's into their respective .a. So a custom linker script
is no longer needed.
ISR's no longer need to be in iRAM, and the ESP IDF provides an option to
specify that they are in iRAM if an application needs lower latency when
handling them. But we don't use this feature for user interrupts: both
timer and gpio ISR routines are registered without the ESP_INTR_FLAG_IRAM
option, and so the scheduling code no longer needs to be in iRAM.
The new compile-time option is MICROPY_HW_USB_MAX_POWER_MA. Set this in
the board configuration file to the maximum current in mA that the board
will draw over USB. The default is 500mA.
The new compile-time option is MICROPY_HW_USB_SELF_POWERED. Set this
option to 1 in the board configuration file to indicate that the USB device
is self powered. This option is disabled by default (previous behaviour).
It can be that LSEON and LSERDY are set yet the RTC is not enabled (this
can happen for example when coming out of the ST DFU mode on an F405 with
the RTC not previously initialised). In such a case the RTC is never
started because the code thinks it's already running. This patch fixes
this case by always checking if RTCEN is set when booting up (and also
testing for a valid RTCSEL value in the case of using an LSE).
One can't use pthread calls in a signal handler because they are not
async-signal-safe (see man signal-safety). Instead, sem_post can be used
to post from within a signal handler and this should be more efficient than
using a busy wait loop, waiting on a volatile variable.
This aligns more closely with the hardware, that there are two, fixed HW
SPI peripherals. And it allows to recreate the HW SPI objects without
error, as well as create them again after a soft reset.
Fixes issue #4103.
In order to suit the more common 800KHz by default (instead of 400KHz), and
also have the same behaviour as the esp8266 port.
Resolves#4396.
Note! This is a breaking change. Anyone that has previously used the
NeoPixel class on an ESP32 board may be affected.
The original behaviour of open-drain-high was to use the open-drain mode of
the GPIO pin, and this seems to make driving a DHT more reliable. See
issue #4233.
The ESP IDF system already provides a math library, and that one is likely
to be better tuned to the Xtensa architecture. The IDF components are also
tested against its own math library, so best not to override it. Using the
system provided library also allows to easily switch to double-precision
floating point by changing MICROPY_FLOAT_IMPL to MICROPY_FLOAT_IMPL_DOUBLE.
So that the user can explicitly deactivate UART(0) if needed. See
issue #4314.
This introduces some risk to "brick" the device, if the user disables the
REPL without providing an alternative REPL (eg WebREPL), or any way to
reenable it. In such a case the device needs to be erased and
reprogrammed. This seems unavoidable, given the desire to have the option
to use the UART for something other than the REPL.
Without the static qualifier these objects will be kept by the linker even
if they are unused. So this patch saves some RAM when these features are
unused by a board.
If there are many short reads to a socket in a row (eg by readline) then
releasing and acquiring the GIL each time will give very poor throughput.
So first poll the socket to see if it has data, and if it does then don't
release the GIL.
Otherwise, if multiple threads are active, printing data to the REPL may be
very slow because in some cases only one character is output per call to
mp_hal_stdout_tx_strn.
On MCUs other than F4 the ORE (overrun error) flag needs to be cleared
independently of clearing RXNE, even though both are wired to trigger the
same RXNE IRQ. In the case that an overrun occurred it's necessary to
explicitly clear the ORE flag or else the RXNE interrupt will keep firing.
Otherwise IRQs may not be enabled for the user UART.irq() handler. In
particular this fixes the user IRQ_RXIDLE interrupt so that it triggers
even when there is no RX buffer.
The new option MICROPY_HW_SDCARD_MOUNT_AT_BOOT can now be defined to 0 in
mpconfigboard.h to allow SD hardware to be enabled but not auto-mounted at
boot. This feature is enabled by default to retain previous behaviour.
Previously, if an SD card is enabled in hardware it is also used to boot
from. While this can be disabled with a SKIPSD file on internal flash,
this wont be available at first boot or if the internal flash gets
corrupted.
Due to new webpages at nordicsemi.com, the download links
for Bluetooth LE stacks were broken.
This patch updates the links to new locations for the current
targets.
This UART_HandleTypeDef is quite large (around 70 bytes in RAM needed for
each UART object) and is not needed: instead the state of the peripheral
held in its registers provides all the required information.
The pin alternate function information is derived from ST's datasheet
https://www.st.com/resource/en/datasheet/stm32l432kc.pdf
In the datasheet, the line 2 of AF4 includes I2C2 but actually the chip
does not have I2C2 so it is removed.
As per the machine.UART documentation, this is used to set the length of
the RX buffer. The legacy read_buf_len argument is retained for backwards
compatibility, with rxbuf overriding it if provided.
Also change the order of printing of flow so it is after stop (so bits,
parity, stop are one after the other), and reduce code size by using
mp_print_str instead of mp_printf where possible.
See issue #1981.
This is necessary for two reasons: 1) FreeRTOS still needs the TCB data
structure even after vPortCleanUpTCB has been called, so this latter hook
function cannot free the TCB, and there is no where else to safely delete
it (this behaviour has changed recently in the ESP IDF); 2) when using
external SPI RAM the uPy heap is in this external memory but the task stack
must be allocated from internal SRAM.
Fixes issue #3904.
We standardized to provide uos.remove() as a more obvious and user-friendly
name. That's what written in the docs. The Unix port implementation
predates this convention, so update it now.
Building axtls gives a lot of warnings with -Wall enabled, and explicitly
disabling all of them cannot be done in a way compatible with gcc and
clang, and likely other compilers. So just use -Wno-all to prevent all of
the extra warnings (in addition to the necessary -Wno-unused-parameter,
-Wno-uninitialized, -Wno-sign-compare and -Wno-old-style-definition).
Fixes issue #4182.
Configurable via MICROPY_MODULE_GETATTR, disabled by default. Among other
things __getattr__ for modules can help to build lazy loading / code
unloading at runtime.
Configurable via MICROPY_PY_BUILTINS_STR_COUNT. Default is enabled.
Disabled for bare-arm, minimal, unix-minimal and zephyr ports. Disabling
it saves 408 bytes on x86.
1. Return correct error code for non-blocking vs timed out socket
(POSIX returns EAGAIN for both, we want ETIMEDOUT in case of timed
out socket). To achieve this, blocking/non-blocking flag is added
to the mp_obj_socket_t, to avoid issuing fcntl() syscall each time
EAGAIN occurs. (mp_obj_socket_t used to be 8 bytes, having some room
in a standard 16-byte alloc block.)
2. Handle socket.settimeout(0) properly - in Python, that means
non-blocking mode, but SO_RCVTIMEO/SO_SNDTIMEO of 0 is infinite
timeout.
3. Overall, make sure that socket.settimeout() call switches blocking
state as expected.
Prior to this commit the USB CDC used the USB start-of-frame (SOF) IRQ to
regularly check if buffered data needed to be sent out to the USB host.
This wasted resources (CPU, power) if no data needed to be sent.
This commit changes how the USB CDC transmits buffered data:
- When new data is first available to send the data is queued immediately
on the USB IN endpoint, ready to be sent as soon as possible.
- Subsequent additions to the buffer (via usbd_cdc_try_tx()) will wait.
- When the low-level USB driver has finished sending out the data queued
in the USB IN endpoint it calls usbd_cdc_tx_ready() which immediately
queues any outstanding data, waiting for the next IN frame.
The benefits on this new approach are:
- SOF IRQ does not need to run continuously so device has a better chance
to sleep for longer, and be more responsive to other IRQs.
- Because SOF IRQ is off, current consumption is reduced by a small amount,
roughly 200uA when USB is connected (measured on PYBv1.0).
- CDC tx throughput (USB IN) on PYBv1.0 is about 2.3 faster (USB OUT is
unchanged).
- When USB is connected, Python code that is executing is slightly faster
because SOF IRQ no longer interrupts continuously.
- On F733 with USB HS, CDC tx throughput is about the same as prior to this
commit.
- On F733 with USB HS, Python code is about 5% faster because of no SOF.
As part of this refactor, the serial port should no longer echo initial
characters when the serial port is first opened (this only used to happen
rarely on USB FS, but on USB HS is was more evident).
For s132 and s140, GAP_ADV_MAX_SIZE was currently set to
BLE_GATT_ATT_MTU_DEFAULT, which is 23. The correct value
should have been 31, but there are no define for this in
the s132/s140 header files as for s110.
Updating define in ble_drv.c to the correct value of 31.
The macros are MICROPY_HEAP_START and MICROPY_HEAP_END, and if not defined
by a board then the default values will be used (maximum heap from SRAM as
defined by linker symbols).
As part of this commit the SDRAM initialisation is moved to much earlier in
main() to potentially make it available to other peripherals and avoid
re-initialisation on soft-reboot. On boards with SDRAM enabled the heap
has been set to use that.
Add some more POSIX compatibility by adding a d_type field to the
dirent structure and defining corresponding macros so listdir_next
in the unix' port modos.c can use it, end result being uos.ilistdir
now reports the file type.
This will allow to e.g. implement HTTP Digest authentication.
Adds 540 bytes for x86_32, 332 for arm_thumb2 (for Unix port, which already
includes axTLS library).
This commit adds the math.factorial function in two variants:
- squared difference, which is faster than the naive version, relatively
compact, and non-recursive;
- a mildly optimised recursive version, faster than the above one.
There are some more optimisations that could be done, but they tend to take
more code, and more storage space. The recursive version seems like a
sensible compromise.
The new function is disabled by default, and uses the non-optimised version
by default if it is enabled. The options are MICROPY_PY_MATH_FACTORIAL
and MICROPY_OPT_MATH_FACTORIAL.
Configuring clocks is a critical operation and is best to avoid when
possible. If the clocks really need to be reset to the same values then
one can pass in a slightly higher value, eg 168000001 Hz to get 168MHz.
This ensures that on first boot the most optimal settings are used for the
voltage scaling and flash latency (for F7 MCUs).
This commit also provides more fine-grained control for the flash latency
settings.
Power and clock control is low-level functionality and it makes sense to
have it in a dedicated file, at least so it can be reused by other parts of
the code.
On F7s PLLSAI is used as a 48MHz clock source if the main PLL cannot
provide such a frequency, and on L4s PLLSAI1 is always used as a clock
source for the peripherals. This commit makes sure these PLLs are
re-enabled upon waking from stop mode so the peripherals work.
See issues #4022 and #4178 (L4 specific).
Changes made:
- make use of MP_OBJ_TO_PTR and MP_OBJ_FROM_PTR where necessary
- fix shadowing of index variable i, renamed to j
- fix type of above variable to size_t to prevent comparison warning
- fix shadowing of res variable
- use "(void)" instead of "()" for functions that take no arguments
This part is functionally similar to STM32F767xx (they share a datasheet)
so support is generally comparable. When adding board support the
stm32f767_af.csv and stm32f767.ld should be used.
If DTTOIF() macro is not defined, the code refers to MP_S_IFDIR, etc.
symbols defined in extmod/vfs.h, so should include it.
This fixes build for Android.
The HAL DMA functions enable SDMMC interrupts before fully resetting the
peripheral, and this can lead to a DTIMEOUT IRQ during the initialisation
of the DMA transfer, which then clears out the DMA state and leads to the
read/write not working at all. The DTIMEOUT is there from previous SDMMC
DMA transfers, even those that succeeded, and is of duration ~180 seconds,
which is 0xffffffff / 24MHz (default DTIMER value, and clock of
peripheral).
To work around this issue, fully reset the SDMMC peripheral before calling
the HAL SD DMA functions.
Fixes issue #4110.
The flash-IRQ handler is used to flush the storage cache, ie write
outstanding block data from RAM to flash. This is triggered by a timeout,
or by a direct call to flush all storage caches.
Prior to this commit, a timeout could trigger the cache flushing to occur
during the execution of a read/write to external SPI flash storage. In
such a case the storage subsystem would break down.
SPI storage transfers are already protected against USB IRQs, so by
changing the priority of the flash IRQ to that of the USB IRQ (what is
done in this commit) the SPI transfers can be protected against any
timeouts triggering a cache flush (the cache flush would be postponed until
after the transfer finished, but note that in the case of SPI writes the
timeout is rescheduled after the transfer finishes).
The handling of internal flash sync'ing needs to be changed to directly
call flash_bdev_irq_handler() sync may be called with the IRQ priority
already raised (eg when called from a USB MSC IRQ handler).
MCUs that have a PLLSAI can use it to generate a 48MHz clock for USB, SDIO
and RNG peripherals. In such cases the SYSCLK is not restricted to values
that allow the system PLL to generate 48MHz, but can be any frequency.
This patch allows such configurability for F7 MCUs, allowing the SYSCLK to
be set in 2MHz increments via machine.freq(). PLLSAI will only be enabled
if needed, and consumes about 1mA extra. This fine grained control of
frequency is useful to get accurate SPI baudrates, for example.
A recent version of arm-none-eabi-gcc (8.2.0) will warn about unused packed
attributes in USB_WritePacket and USB_ReadPacket. This patch suppresses
such warnings for this file only.
The aim here is to have spi.c contain the low-level SPI driver which is
independent (not fully but close) of MicroPython objects and methods, and
the higher-level bindings are separated out to pyb_spi.c and machine_spi.c.
Among other things, this requires putting bootloader object files in to
their relevant .a archive, so that they can be correctly referenced by the
ESP IDF's linker script.
- Allow configuration by a board of autorefresh number and burst length.
- Increase MPU region size to 8MiB.
- Make SDRAM region cacheable and executable.
"coverage" build uses different BUILD directory comparing to the normal
build. Previously, any build picked up libaxtls.a from normal build's
directory, but that was fixed recently. So, for each build, we must
build axtls explicitly.
This fixes Travis build in particular.
Use overrideable properties instead of hardcoding the use of the
default cl executable used by msvc toolsets. This allows using
arbitrary compiler commands for qstr header generation.
The CLToolExe and CLToolPath properties are used because they are,
even though absent from any official documentation, the de-facto
standard as used by the msvc toolsets themselves.
Requesting a baudrate of X should never configure the peripheral to have a
baudrate greater than X because connected hardware may not be able to
handle higher speeds. This patch makes sure to round the prescaler up so
that the actual baudrate is rounded down.
Prior to this patch, if VBAT was read via ADC.read() or
ADCAll.read_channel(), then it would remain enabled and subsequent reads
of TEMPSENSOR or VREFINT would not work. This patch makes sure that VBAT
is disabled for all cases that it could be read.
This patch in effect renames MICROPY_DEBUG_PRINTER_DEST to
MICROPY_DEBUG_PRINTER, moving its default definition from
lib/utils/printf.c to py/mpconfig.h to make it official and documented, and
makes this macro a pointer rather than the actual mp_print_t struct. This
is done to get consistency with MICROPY_ERROR_PRINTER, and provide this
macro for use outside just lib/utils/printf.c.
Ports are updated to use the new macro name.
The NRF52 define only covers nrf52832, so update the define checks
to use NRF52_SERIES to cover both nrf52832 and nrf52840.
Fixed machine_hard_pwm_instances table in modules/machine/pwm.c
This enables PWM(0) to PWM(3), RTCounter(2), Timer(3) and Timer(4),
in addition to NFC reset cause, on nrf52840.
When waking from stop mode most of the system is still in the same state as
before entering stop, so only minimal configuration is needed to bring the
system clock back online.
