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stm32/powerctrl: Fix configuring APB1/APB2 frequency when AHB also set. 

APB1/APB2 are derived from AHB, so if the user sets AHB!=SYSCLK then the
APB1/APB2 dividers must be computed from the new AHB.
This commit is contained in:
Damien George 2018-09-24 14:51:17 +10:00
parent dff14c740b
commit 9e4812771b
1 changed files with 5 additions and 2 deletions
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7
ports/stm32/powerctrl.c
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@ -110,13 +110,16 @@ set_clk:
} else {
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
}
#if !defined(STM32H7)
ahb = sysclk >> AHBPrescTable[RCC_ClkInitStruct.AHBCLKDivider >> RCC_CFGR_HPRE_Pos];
#endif
if (apb1 != 0) {
RCC_ClkInitStruct.APB1CLKDivider = calc_apb_div(sysclk / apb1);
RCC_ClkInitStruct.APB1CLKDivider = calc_apb_div(ahb / apb1);
} else {
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
}
if (apb2 != 0) {
RCC_ClkInitStruct.APB2CLKDivider = calc_apb_div(sysclk / apb2);
RCC_ClkInitStruct.APB2CLKDivider = calc_apb_div(ahb / apb2);
} else {
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
}