1acf58c08f
On F7s PLLSAI is used as a 48MHz clock source if the main PLL cannot provide such a frequency, and on L4s PLLSAI1 is always used as a clock source for the peripherals. This commit makes sure these PLLs are re-enabled upon waking from stop mode so the peripherals work. See issues #4022 and #4178 (L4 specific). |
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bare-arm | ||
cc3200 | ||
esp32 | ||
esp8266 | ||
minimal | ||
nrf | ||
pic16bit | ||
qemu-arm | ||
stm32 | ||
teensy | ||
unix | ||
windows | ||
zephyr |