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stm32/uart: Factor out code from machine_uart.c that computes baudrate.

This commit is contained in:
Damien George 2018-12-09 18:10:57 +11:00
parent a2271532be
commit 524e13b006
3 changed files with 49 additions and 40 deletions
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41
ports/stm32/machine_uart.c
View File

@ -245,46 +245,7 @@ STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const
}
// compute actual baudrate that was configured
// (this formula assumes UART_OVERSAMPLING_16)
uint32_t actual_baudrate = 0;
#if defined(STM32F0)
actual_baudrate = HAL_RCC_GetPCLK1Freq();
#elif defined(STM32F7) || defined(STM32H7)
UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED;
UART_GETCLOCKSOURCE(&self->uart, clocksource);
switch (clocksource) {
#if defined(STM32H7)
case UART_CLOCKSOURCE_D2PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break;
case UART_CLOCKSOURCE_D3PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break;
case UART_CLOCKSOURCE_D2PCLK2: actual_baudrate = HAL_RCC_GetPCLK2Freq(); break;
#else
case UART_CLOCKSOURCE_PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break;
case UART_CLOCKSOURCE_PCLK2: actual_baudrate = HAL_RCC_GetPCLK2Freq(); break;
case UART_CLOCKSOURCE_SYSCLK: actual_baudrate = HAL_RCC_GetSysClockFreq(); break;
#endif
#if defined(STM32H7)
case UART_CLOCKSOURCE_CSI: actual_baudrate = CSI_VALUE; break;
#endif
case UART_CLOCKSOURCE_HSI: actual_baudrate = HSI_VALUE; break;
case UART_CLOCKSOURCE_LSE: actual_baudrate = LSE_VALUE; break;
#if defined(STM32H7)
case UART_CLOCKSOURCE_PLL2:
case UART_CLOCKSOURCE_PLL3:
#endif
case UART_CLOCKSOURCE_UNDEFINED: break;
}
#else
if (self->uart.Instance == USART1
#if defined(USART6)
|| self->uart.Instance == USART6
#endif
) {
actual_baudrate = HAL_RCC_GetPCLK2Freq();
} else {
actual_baudrate = HAL_RCC_GetPCLK1Freq();
}
#endif
actual_baudrate /= self->uart.Instance->BRR;
uint32_t actual_baudrate = uart_get_baudrate(self);
// check we could set the baudrate within 5%
uint32_t baudrate_diff;

47
ports/stm32/uart.c
View File

@ -406,6 +406,53 @@ bool uart_init(pyb_uart_obj_t *uart_obj, uint32_t baudrate) {
}
*/
uint32_t uart_get_baudrate(pyb_uart_obj_t *self) {
uint32_t uart_clk = 0;
#if defined(STM32F0)
uart_clk = HAL_RCC_GetPCLK1Freq();
#elif defined(STM32F7) || defined(STM32H7)
UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED;
UART_GETCLOCKSOURCE(&self->uart, clocksource);
switch (clocksource) {
#if defined(STM32H7)
case UART_CLOCKSOURCE_D2PCLK1: uart_clk = HAL_RCC_GetPCLK1Freq(); break;
case UART_CLOCKSOURCE_D3PCLK1: uart_clk = HAL_RCC_GetPCLK1Freq(); break;
case UART_CLOCKSOURCE_D2PCLK2: uart_clk = HAL_RCC_GetPCLK2Freq(); break;
#else
case UART_CLOCKSOURCE_PCLK1: uart_clk = HAL_RCC_GetPCLK1Freq(); break;
case UART_CLOCKSOURCE_PCLK2: uart_clk = HAL_RCC_GetPCLK2Freq(); break;
case UART_CLOCKSOURCE_SYSCLK: uart_clk = HAL_RCC_GetSysClockFreq(); break;
#endif
#if defined(STM32H7)
case UART_CLOCKSOURCE_CSI: uart_clk = CSI_VALUE; break;
#endif
case UART_CLOCKSOURCE_HSI: uart_clk = HSI_VALUE; break;
case UART_CLOCKSOURCE_LSE: uart_clk = LSE_VALUE; break;
#if defined(STM32H7)
case UART_CLOCKSOURCE_PLL2:
case UART_CLOCKSOURCE_PLL3:
#endif
case UART_CLOCKSOURCE_UNDEFINED: break;
}
#else
if (self->uart.Instance == USART1
#if defined(USART6)
|| self->uart.Instance == USART6
#endif
) {
uart_clk = HAL_RCC_GetPCLK2Freq();
} else {
uart_clk = HAL_RCC_GetPCLK1Freq();
}
#endif
// This formula assumes UART_OVERSAMPLING_16
uint32_t baudrate = uart_clk / self->uart.Instance->BRR;
return baudrate;
}
mp_uint_t uart_rx_any(pyb_uart_obj_t *self) {
int buffer_bytes = self->read_buf_head - self->read_buf_tail;
if (buffer_bytes < 0) {

1
ports/stm32/uart.h
View File

@ -68,6 +68,7 @@ void uart_deinit(pyb_uart_obj_t *uart_obj);
void uart_irq_handler(mp_uint_t uart_id);
void uart_attach_to_repl(pyb_uart_obj_t *self, bool attached);
uint32_t uart_get_baudrate(pyb_uart_obj_t *self);
mp_uint_t uart_rx_any(pyb_uart_obj_t *uart_obj);
bool uart_rx_wait(pyb_uart_obj_t *self, uint32_t timeout);
int uart_rx_char(pyb_uart_obj_t *uart_obj);