This commit adds support for machine.I2S on the mimxrt port. The I2S API
is consistent with the existing stm32, esp32, and rp2 implementations.
I2S features:
- controller transmit and controller receive
- 16-bit and 32-bit sample sizes
- mono and stereo formats
- sampling frequencies from 8kHz to 48kHz
- 3 modes of operation:
- blocking
- non-blocking with callback
- uasyncio
- configurable internal buffer
- optional MCK
Tested with the following development boards:
- MIMXRT1010_EVK, MIMXRT1015_EVK, MIMXRT1020_EVK, MIMXRT1050_EVK
- Teensy 4.0, Teensy 4.1
- Olimex RT1010
- Seeed ARCH MIX
Tested with the following I2S hardware peripherals:
- UDA1334
- GY-SPH0645LM4H
- WM8960 codec on board the MIMXRT boards and separate breakout board
- INMP441
- PCM5102
- SGTL5000 on the Teensy audio shield
Signed-off-by: Mike Teachman <mike.teachman@gmail.com>
In particular, it is called by the constructor if the instance already
exists. So if the previous instance was deinit'd then it will be deinit'd
a second time.
Signed-off-by: Damien George <damien@micropython.org>
Tested on PYBV10 and PYBD_SF6, with MBOOT_FSLOAD enabled and programming
new firmware from a .dfu.gz file stored on the SD card.
Signed-off-by: Damien George <damien@micropython.org>
If enabled via MBOOT_ADDRESS_SPACE_64BIT (it's disabled by default) then
read addresses will be 64-bit.
Signed-off-by: Damien George <damien@micropython.org>
Even if MBOOT_FSLOAD is disabled, mboot should still check for 0x70ad0080
so it can immediately return to the application if this feature is not
enabled. Otherwise mboot will get stuck in DFU mode.
Signed-off-by: Damien George <damien@micropython.org>
The main functionality of this info function is available via the existing
micropython.mem_info() and micropython.qstr_info() functions. The printing
of the address space layout doesn't add much and removing esp.info() saves
about 600 bytes.
Signed-off-by: Damien George <damien@micropython.org>
Add a new function to control whether held pins will retain their function
through deep-sleep.
Also document this function and explain how to use this in quickref to
retain pin configuration during deep-sleep.
The current pull=Pin.PULL_HOLD argument doesn't make a lot of sense in the
context of what it actually does vs what the ESP32 quickref document says
it does.
This commit removes PULL_HOLD and adds a new hold=True|False keyword
argument to Pin()/Pin.init(). Setting this to True will cause the ESP32 to
lock the configuration of the pin – including direction, output value,
drive strength, pull-up/-down – such that it can't be accidentally changed
and will be retained through a watchdog or internal reset.
Fixes issue #8283, and see also #8284.
According to the C standard the free(void *ptr) function: if ptr is a null
pointer, no action occurs.
Signed-off-by: Peter Züger <zueger.peter@icloud.com>
All variants now use extmod/moduos.c as their uos module implementation.
In particular this means they all have MICROPY_VFS enabled and use VfsPosix
for their filesystem.
As part of this, the available functions in uos become more consistent with
other ports:
- coverage variant gets uos.urandom
- minimal and standard variant get: unlink, chdir, getcwd, listdir
Signed-off-by: Damien George <damien@micropython.org>
Ensure the symmetry of PWM: the duty rate of X and Q channels was not 50%,
when it should have been. That is evident at high frequencies, like 15Mhz
or 37.5 MHz. At low frequencies the deviation mattered less. The A/B
channels were fine.
Also round up or down non-integer division factors. Before, always the
floor value was used.
That caused Ethernet to lock up at high data rates after ~200MByte data
average in a row. Tested now with data bursts up to 10 GByte and overall
data rates of ~8MByte/s at the Eth100 port.
Sometimes frames could not be sent immediately because the controller was
still busy with previous frames. Then, an error was returned to lwip.
This fix adds a limited number of retries for this busy state, waiting
100µs before the next attempt. Typically the transmit succeeds now at the
second attempt.
Second change: Reset the controller for a clean state after soft reset.
OCOTP_Init() has been removed from mphalport.c. The library files are
missing for the MIMXRT1015, and for just reading the OCOTP the Init is not
required.
The disk_access header was moved to a different path in Zephyr v2.6.0.
The old path was deprecated for two releases (v2.6.0 and v2.7.0) and
will no longer be supported after Zephyr v2.7.0.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
If setting the frequency to a value used already by an existing timer, this
timer will be used. But still, the duty cycle for that channel may have to
be changed.
Fixes issues #8306 and #8345.
If MicroPython threads are enabled, loops waiting for an incoming event
should release the GIL and suspend, allowing other tasks to run while they
wait.
Prior to this commit, the problem can easily be observed by running a
thread that is both busy and regularly releases the GIL (for example a loop
doing something then sleeping a few ms after each iteration). When the
main task is at the REPL, the thread is significantly stalled. If the main
task is manually made to release the GIL (for example, by calling
utime.sleep_ms(500)) the other thread can be seen immediately working at
the expected speed again.
Additionally, there are various instances in where blocking functions run
MICROPY_EVENT_POLL_HOOK in a loop while they wait for a certain event/
condition. For example the uselect methods poll objects to determine
whether data is available, but uses 100% of CPU while it does, constantly
calling MICROPY_EVENT_POLL_HOOK in the process.
The MICROPY_EVENT_POLL_HOOK macro is only ever used in waiting loops, where
(if threads are enabled) it makes sense to yield for a single tick so that
these loops do not consume all CPU cycles but instead other threads may
execute. (In fact, the thing these loops wait for may even indirectly or
directly depend on another task being able to run.)
This change moves the sleep that was inside the REPL input function to
inside the MICROPY_EVENT_POLL_HOOK macro, where the GIL is already being
released, solving both the blocking REPL issue and the 100% CPU use issue
at the same time.
Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
The stack (and arg) of core1 is itself a root pointer, not just the entries
in it. Without this fix the GC could reclaim the entire stack (and
argument object).
Fixes issues #7124 and #7981.
.py files are valid source files and shouldn't be ignored. This line was
from the early days when .py files in the unix directory were used for
testing.
Signed-off-by: Damien George <damien@micropython.org>
The xmlns attribute is required for older msbuild version (e.g. for
VS2015). Add it where needed, and reorder the attributes so all
files look the same.
Background: .mpy files are precompiled .py files, built using mpy-cross,
that contain compiled bytecode functions (and can also contain machine
code). The benefit of using an .mpy file over a .py file is that they are
faster to import and take less memory when importing. They are also
smaller on disk.
But the real benefit of .mpy files comes when they are frozen into the
firmware. This is done by loading the .mpy file during compilation of the
firmware and turning it into a set of big C data structures (the job of
mpy-tool.py), which are then compiled and downloaded into the ROM of a
device. These C data structures can be executed in-place, ie directly from
ROM. This makes importing even faster because there is very little to do,
and also means such frozen modules take up much less RAM (because their
bytecode stays in ROM).
The downside of frozen code is that it requires recompiling and reflashing
the entire firmware. This can be a big barrier to entry, slows down
development time, and makes it harder to do OTA updates of frozen code
(because the whole firmware must be updated).
This commit attempts to solve this problem by providing a solution that
sits between loading .mpy files into RAM and freezing them into the
firmware. The .mpy file format has been reworked so that it consists of
data and bytecode which is mostly static and ready to run in-place. If
these new .mpy files are located in flash/ROM which is memory addressable,
the .mpy file can be executed (mostly) in-place.
With this approach there is still a small amount of unpacking and linking
of the .mpy file that needs to be done when it's imported, but it's still
much better than loading an .mpy from disk into RAM (although not as good
as freezing .mpy files into the firmware).
The main trick to make static .mpy files is to adjust the bytecode so any
qstrs that it references now go through a lookup table to convert from
local qstr number in the module to global qstr number in the firmware.
That means the bytecode does not need linking/rewriting of qstrs when it's
loaded. Instead only a small qstr table needs to be built (and put in RAM)
at import time. This means the bytecode itself is static/constant and can
be used directly if it's in addressable memory. Also the qstr string data
in the .mpy file, and some constant object data, can be used directly.
Note that the qstr table is global to the module (ie not per function).
In more detail, in the VM what used to be (schematically):
qst = DECODE_QSTR_VALUE;
is now (schematically):
idx = DECODE_QSTR_INDEX;
qst = qstr_table[idx];
That allows the bytecode to be fixed at compile time and not need
relinking/rewriting of the qstr values. Only qstr_table needs to be linked
when the .mpy is loaded.
Incidentally, this helps to reduce the size of bytecode because what used
to be 2-byte qstr values in the bytecode are now (mostly) 1-byte indices.
If the module uses the same qstr more than two times then the bytecode is
smaller than before.
The following changes are measured for this commit compared to the
previous (the baseline):
- average 7%-9% reduction in size of .mpy files
- frozen code size is reduced by about 5%-7%
- importing .py files uses about 5% less RAM in total
- importing .mpy files uses about 4% less RAM in total
- importing .py and .mpy files takes about the same time as before
The qstr indirection in the bytecode has only a small impact on VM
performance. For stm32 on PYBv1.0 the performance change of this commit
is:
diff of scores (higher is better)
N=100 M=100 baseline -> this-commit diff diff% (error%)
bm_chaos.py 371.07 -> 357.39 : -13.68 = -3.687% (+/-0.02%)
bm_fannkuch.py 78.72 -> 77.49 : -1.23 = -1.563% (+/-0.01%)
bm_fft.py 2591.73 -> 2539.28 : -52.45 = -2.024% (+/-0.00%)
bm_float.py 6034.93 -> 5908.30 : -126.63 = -2.098% (+/-0.01%)
bm_hexiom.py 48.96 -> 47.93 : -1.03 = -2.104% (+/-0.00%)
bm_nqueens.py 4510.63 -> 4459.94 : -50.69 = -1.124% (+/-0.00%)
bm_pidigits.py 650.28 -> 644.96 : -5.32 = -0.818% (+/-0.23%)
core_import_mpy_multi.py 564.77 -> 581.49 : +16.72 = +2.960% (+/-0.01%)
core_import_mpy_single.py 68.67 -> 67.16 : -1.51 = -2.199% (+/-0.01%)
core_qstr.py 64.16 -> 64.12 : -0.04 = -0.062% (+/-0.00%)
core_yield_from.py 362.58 -> 354.50 : -8.08 = -2.228% (+/-0.00%)
misc_aes.py 429.69 -> 405.59 : -24.10 = -5.609% (+/-0.01%)
misc_mandel.py 3485.13 -> 3416.51 : -68.62 = -1.969% (+/-0.00%)
misc_pystone.py 2496.53 -> 2405.56 : -90.97 = -3.644% (+/-0.01%)
misc_raytrace.py 381.47 -> 374.01 : -7.46 = -1.956% (+/-0.01%)
viper_call0.py 576.73 -> 572.49 : -4.24 = -0.735% (+/-0.04%)
viper_call1a.py 550.37 -> 546.21 : -4.16 = -0.756% (+/-0.09%)
viper_call1b.py 438.23 -> 435.68 : -2.55 = -0.582% (+/-0.06%)
viper_call1c.py 442.84 -> 440.04 : -2.80 = -0.632% (+/-0.08%)
viper_call2a.py 536.31 -> 532.35 : -3.96 = -0.738% (+/-0.06%)
viper_call2b.py 382.34 -> 377.07 : -5.27 = -1.378% (+/-0.03%)
And for unix on x64:
diff of scores (higher is better)
N=2000 M=2000 baseline -> this-commit diff diff% (error%)
bm_chaos.py 13594.20 -> 13073.84 : -520.36 = -3.828% (+/-5.44%)
bm_fannkuch.py 60.63 -> 59.58 : -1.05 = -1.732% (+/-3.01%)
bm_fft.py 112009.15 -> 111603.32 : -405.83 = -0.362% (+/-4.03%)
bm_float.py 246202.55 -> 247923.81 : +1721.26 = +0.699% (+/-2.79%)
bm_hexiom.py 615.65 -> 617.21 : +1.56 = +0.253% (+/-1.64%)
bm_nqueens.py 215807.95 -> 215600.96 : -206.99 = -0.096% (+/-3.52%)
bm_pidigits.py 8246.74 -> 8422.82 : +176.08 = +2.135% (+/-3.64%)
misc_aes.py 16133.00 -> 16452.74 : +319.74 = +1.982% (+/-1.50%)
misc_mandel.py 128146.69 -> 130796.43 : +2649.74 = +2.068% (+/-3.18%)
misc_pystone.py 83811.49 -> 83124.85 : -686.64 = -0.819% (+/-1.03%)
misc_raytrace.py 21688.02 -> 21385.10 : -302.92 = -1.397% (+/-3.20%)
The code size change is (firmware with a lot of frozen code benefits the
most):
bare-arm: +396 +0.697%
minimal x86: +1595 +0.979% [incl +32(data)]
unix x64: +2408 +0.470% [incl +800(data)]
unix nanbox: +1396 +0.309% [incl -96(data)]
stm32: -1256 -0.318% PYBV10
cc3200: +288 +0.157%
esp8266: -260 -0.037% GENERIC
esp32: -216 -0.014% GENERIC[incl -1072(data)]
nrf: +116 +0.067% pca10040
rp2: -664 -0.135% PICO
samd: +844 +0.607% ADAFRUIT_ITSYBITSY_M4_EXPRESS
As part of this change the .mpy file format version is bumped to version 6.
And mpy-tool.py has been improved to provide a good visualisation of the
contents of .mpy files.
In summary: this commit changes the bytecode to use qstr indirection, and
reworks the .mpy file format to be simpler and allow .mpy files to be
executed in-place. Performance is not impacted too much. Eventually it
will be possible to store such .mpy files in a linear, read-only, memory-
mappable filesystem so they can be executed from flash/ROM. This will
essentially be able to replace frozen code for most applications.
Signed-off-by: Damien George <damien@micropython.org>
The unix port's main.c gets used by unix and windows ports, and with a
variety of compilers, so it's convenient to see which version is actually
being used immediately when starting micropython. This is similar to what
CPython does.
If MBOOT_BOARD_ENTRY_INIT is defined by a board then that function must now
make sure system clocks are configured, eg by calling mboot_entry_init().
Signed-off-by: Damien George <damien@micropython.org>
If a board wants to customise the clocks it can define the following:
MBOOT_CLK_PLLM
MBOOT_CLK_PLLN
MBOOT_CLK_PLLP
MBOOT_CLK_PLLQ
MBOOT_CLK_PLLR (only needed on STM32H7)
MBOOT_FLASH_LATENCY
MBOOT_CLK_AHB_DIV
MBOOT_CLK_APB1_DIV
MBOOT_CLK_APB2_DIV
MBOOT_CLK_APB3_DIV (only needed on STM32H7)
MBOOT_CLK_APB4_DIV (only needed on STM32H7)
Signed-off-by: Damien George <damien@micropython.org>
In the `after_test` section, the current directory is `ports/windows` when
tests are run, so running `run-tests.py` without changing the directory or
specifying a path causes a file not found error.
This commit fixes the problem by changing the directory before calling
`run-tests.py`.
Signed-off-by: David Lechner <david@pybricks.com>
The UART hardware flow control was not working correctly, the receive FIFO
was always fetched and RTS was never deasserted. This is not a problem
when hardware flow control is not used: normally, if the receive FIFO is
full, the UART receiver won't receive data into the FIFO anymore, but the
current implementation fetches from the FIFO and discards it instead.
The problem is that data is discarded even when RTS is enabled.
This commit fixes the issue by only taking from the FIFO if there is room
in the ring buffer to put the character.
Signed-off-by: YoungJoon Chun <yjchun@mac.com>
Prior to this fix, if the ADC atten value was not explicitly given then
adc1_config_channel_atten() would never be called.
Fixes issue #8275.
Signed-off-by: Damien George <damien@micropython.org>
The correct day-of-week is stored in the RTC (0=Monday, 6=Sunday) so there
is no need to adjust it for the return value of time.localtime().
Fixes issue #7889.
Signed-off-by: Damien George <damien@micropython.org>
The default stm32lib remains lib/stm32lib, but it can now be easily
overriden at build time by specifying STM32LIB_DIR, or STM32LIB_CMSIS_DIR
and STM32LIB_HAL_DIR.
Signed-off-by: Damien George <damien@micropython.org>
This also fixes a possible race condition when exiting initialisation mode:
reading then writing to ISR (via ISR &= ~RTC_ISR_INIT) will clear any flags
that were set by the hardware between the read and the write. The correct
way to clear just the INIT bit is to just do a single write via ISR =
~RTC_ISR_INIT, which will not clear any other flags (they must be written
to 0 to clear), and that is exactly what LL_RTC_DisableInitMode does.
Signed-off-by: Damien George <damien@micropython.org>
And don't assert on the sector number in sector_erase, so it can support
erasing arbitrary sectors.
Signed-off-by: Damien George <damien@micropython.org>
The inclusion of `umachine` in the list of built-in modules is now done
centrally in py/objmodule.c. Enabling MICROPY_PY_MACHINE will include this
module.
As part of this, all ports now have `umachine` as the core module name
(previously some had only `machine` as the name).
Signed-off-by: Damien George <damien@micropython.org>
This change allows the same heap allocation rules to be used when using
malloc regardless if the board has SPRAM or normal RAM.
Integrating with the esp32-camera for example requires that ESP32 SPRAM be
allocatable using the esp-idf capabilities aware allocation functions. In
the case of esp32-camera it's for the framebuffer.
Detect when CONFIG_SPIRAM_USE_MALLOC is in use and use the standard
automatic configuration of leaving 1/2 of the SPRAM available to other
FreeRTOS tasks.
For example the ESP32-C3 has 2 TX channels and 2 RX channels in total, and
in this case channel 1 must be the default for bitstream.
Signed-off-by: Damien George <damien@micropython.org>
This commit adds support for the STM32G4 series of MCUs, and a board
definition for NUCLEO_G474RE. This board has the REPL on LPUART1 which is
connected to the on-board ST-link USB-UART.
It's needed at least on F4 because this file overrides the weak function
HAL_RCC_DeInit() from hal_rcc.c.
Signed-off-by: Damien George <damien@micropython.org>
PLL3-Q is more reliable than PLL1-Q for the USB clock source when entering
mboot from various reset states (eg power on vs MCU reset). (It was found
that if the main application used PLL3-Q then sometimes the USB clock
source would stay stuck on PLL3-Q and not switch to PLL1-Q after a reset.)
Other related changes:
- SystemCoreClockUpdate() should be called on H7 because the calculation
can be involved in some cases.
- __set_PRIMASK(0) should be called because on H7 the built-in ST DFU
bootloader exits with IRQs disabled.
Signed-off-by: Damien George <damien@micropython.org>
H7 MCUs have ECC and writes do not go through to SRAM until 64-bits have
been written (on another location is written). So use 64-bit writes for
the bootloader-state variable so it is committed before the system reset.
As part of this change, the lower byte of the bootloader address in
BL_STATE must now be the magic number 0x5a5 for the state to be valid
(previously this was 0x000 which is not as robust).
Signed-off-by: Damien George <damien@micropython.org>
The original code used a independent state with regards to the interrupt.
During heavy bus error conditions the internal state could become
out-of-sync with the interrupts.
Further explanation: during the development of an application using CAN
communication, a interrupt-run-away was found in some situations. It was
found that the error interrupt triggered (Warning, Passive or Bus-Off, all
triggered it) the run-away. The only recovery was a reset.
Two problems were found:
- the error interrupt is enabled but not cleared in the interrupt routine;
- an internal variable 'State' that was used to track the message received
state (empty, new, full, overflow) that was not directly related to
interrupt that indicated the state.
In this commit these issues are fixed by adding more values for the
interrupt reason (warning, passive, bus off) and clearing the error
interrupts, and making the internal state directly dependent on the
interrupt state for received messages.
Furthermore, introducing the FIFO1 in the CAN receive stage, another issue
existed. Even if the messages are received into the FIFO1 (by selecting
message filtering for FIFO0 and FIFO1), the interrupt firing was indicating
FIFO0 Rx. The configuration of the interrupts for this is now also fixed.
The CAN peripheral has 2 interrupt lines going into the NVIC controller.
The assignment of the interrupt reasons to these 2 interrupt lines was
missing. Now the reception of FIFO1 messages triggers the second interrupt
line. Other interrupts (Rx FIFO0 and bus error) are assigned to the first
interrupt line.
Tested on a Nucleo-G474, and also checked the HAL function to work with the
H7 family.
The board.json file is intentionally excluded, until the board will be
sold. But including it into the mimxrt series make it easier to keep
the build up-to-date.
- Manufacturer, set by MICROPY_HW_USB_STR_MANUF; default "MicroPython"
- Board name, as set by MICROPY_HW_BOARD_NAME
- Unique-ID, same as returned by machine.unique_id()
- USB Vendor ID, as set by MICROPY_HW_USB_VID; default 0xf055
- USB Product ID, as set by MICROPY_HW_USB_PID; default 0x9802
Using the keyword argument cs=nnn in the constructor. The cs1
pin has to be defined in mpconfigboard.h.
Note: Only a few boards have the CS1 pin exposed to the connectors.
The Pin config setting by IOMUXC_SetPinConfig() is supplied by a
bit pattern. That pattern is specific for a MCU family. In preparation
for supporting the MIMXRT117x family, the constant bit pattern is
replaced by a function call, such that the bit pattern is created
at a single place. The code for this functions was taken from
machine_pin.c.
Note: A working port for the MIMXRT1176 exists already.
This library file has a bug, in that TransferBlocking returns before the
transfer has finished. That is a problem if a write follows immediately
a read.
If in a board's mkconfigboard.mk the following symbol is set:
MICROPY_HW_BOARD_FLASH_FILES = 1
then the files:
($BOARD)_flexspi_flash_config.h and
qspi_nor_flash_config.c and/or
qspi_hyper_flash_config.c
are expected in the board directory. Otherwise the common files from
the hal directory are used.
The keyword "af" has been deprecated for some time and "alt" should be used
instead (but "af" still works).
Signed-off-by: Damien George <damien@micropython.org>
This follows up on #5489, where we changed the esp32 core pinning to core 0
in order to work around an issue with IDF < 4.2.0. Now that IDF > 4.2.0 is
available, we allow pinning back to core 1, which eliminates some
problematic callback latency with WiFi enabled.
NimBLE is also pinned to core 1 - the same core as MicroPython - when using
IDF >=4.2.
Rework the ADC implementation to follow the improved ADC/ADCBlock API.
This adds support for calibrated voltage readings and the ADC2 block. The
ADC API is backwards compatible with what it was before this change.
Resolves#6219.
The RP2040 I2C hardware can do writes of length 1 and 2, just not of length
0. So only use software I2C for writes of length 0, to improve
performance.
Also increase the software I2C timeout for zero-length writes to
accommodate the behaviour of a wider range of I2C devices.
Fixes issue #8167.
Signed-off-by: Damien George <damien@micropython.org>
Without these methods a lot of existing "portable" scripts are broken.
This change improves portability by making rp2 machine.UART more compliant
with the documented machine UART interface.
So that a board can access other HAL_RCC functions if it needs them (this
was not possible previously by just adding hal_rcc.c to the src list for a
board because it would clash with the custom HAL_RCC_GetHCLKFreq function).
Signed-off-by: Damien George <damien@micropython.org>
This adds MBEDTLS_MD_SHA1 to the list of default hashes for TLS 1.2
handshake signatures. Although SHA-1 is weak, this option is turned on in
the default mbedtls configuration file, and allows better compatibility
with older servers. In particular it allows an stm32-mbedtls-based client
to connect to an axtls-based client (eg default unix port and esp8266).
Signed-off-by: Damien George <damien@micropython.org>
The bit-bang implementation was replaced with the RMT implementation in
599b61c086. This commit brings back that
bit-bang code, and allows it to be selected via the new static method:
esp32.RMT.bitstream_channel(None)
The bit-bang implementation may be useful if the RMT needs to be used for
something else, or if bit-banging is more stable in certain applications.
Signed-off-by: Damien George <damien@micropython.org>
MicroPython currently runs on core 0 of the esp32. Calling
rmt_driver_install will mean that the RMT interrupt handler is also
serviced on core 0. This can lead to glitches in the RMT output if
WiFi is enabled (for esp32.RMT and machine.bitstream).
This patch calls rmt_driver_install on core 1, ensuring that the RMT
interrupt handler is serviced on core 1. This prevents glitches.
Fixes issue #8161.
Signed-off-by: Damien George <damien@micropython.org>
The main Makefile builds the mpy-cross executable automatically if
it doesn't exist since 78718fffb1,
so build it first to make sure it doesn't get needlessly rebuilt.
This board has only 2MiB of flash so the build needs to be reduced in size
to fit. Commit 549448e8bb made all boards
build with -O2 by default (for performance) so this overrides that default.
Signed-off-by: Damien George <damien@micropython.org>
This is needed because these ports allocate mbedtls data on the MicroPython
heap, and SSL socket objects must be fully cleaned up when they are garbage
collected, to free this memory allocated by mbedtls. As part of this,
gc_sweep_all() will now ensure that the MP_STATE_PORT(mbedtls_memory)
linked-list is fully deallocated on soft reset.
Signed-off-by: Damien George <damien@micropython.org>
CONFIG_USB was removed in Zephyr v2.7.0 after some Kconfig rework that
made it sufficient to use CONFIG_USB_DEVICE_STACK only.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Updates the Zephyr port to get the UART console device from devicetree
instead of Kconfig. The Kconfig option CONFIG_UART_CONSOLE_ON_DEV_NAME
was removed in Zephyr v2.7.0.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The reboot header was moved to a different path in Zephyr v2.6.0. The
old path was deprecated for two releases (v2.6.0 and v2.7.0) and will no
longer be supported after Zephyr v2.7.0.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
As a prerequisite to upgrading to Zephyr v2.7.0, upgrade the minimum
CMake version required for the Zephyr port to 3.20.0.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
After changing the bitstream implementation to use the RMT driver in
commit 72d86158121e32bbabaeade08f449d507bf40f9a
("esp32/machine_bitstream.c: Replace with RMT-based driver."), using
multiple `Neopixel` instances shows signal duplication between the
instances (i.e. a `write()` on one instance is written to all instances).
On invocation, the rmt driver configures the GPIO matrix to route the
output signal to the respective GPIO pin. When called for a different
`NeoPixel` instance using a different pin, the new route is established,
but the old route still exists. Now, the RMT output signal is sent to both
pins.
Fix this by setting the standard GPIO output function for the current pin
after uninstalling the RMT driver.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
In commit 86ce442607 the '.frozen' entry was
added at the start of sys.path, to allow control over when frozen modules
are searched during import, and retain existing behaviour whereby frozen
was searched before the filesystem.
But Python semantics of sys.path require sys.path[0] to be the directory of
the currently executing script, or ''.
This commit moves the '.frozen' entry to second place in sys.path, so
sys.path[0] retains its correct value (described above).
Signed-off-by: Damien George <damien@micropython.org>
Save and restore the same duty cycle when the frequency (or frequency
resolution) is changed. This allows a smooth frequency change.
Also update the esp32 PWM quickref to be clearer.
These removed ones are either unused by MicroPython or provided by osapi.h
in the SDK. In particular ets_delay_us() has different signatures for
different versions of the SDK, so best to let it provide the declaration.
Fixes issue #8095.
Signed-off-by: Damien George <damien@micropython.org>
If MICROPY_PY_SYS_PATH_ARGV_DEFAULTS is enabled (which it is by default)
then sys.path and sys.argv will be initialised and populated with default
values. This keeps all bare-metal ports aligned.
Signed-off-by: Damien George <damien@micropython.org>
Frozen modules will be searched preferentially, but gives the user the
ability to override this behavior.
This matches the previous behavior where "" was implicitly the frozen
search path, but the frozen list was checked before the filesystem.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This feature is not enabled on any port, it's not in CPython's io module,
and functionality is better suited to the micropython-lib implementation of
pkg_resources.
Default SPI pins are now correctly assigned by machine_hw_spi.c even for S2
and S3. mpconfigboard.h files define defaults with flipped SPI(1) and
SPI(2) to workaround a bug in machine_hw_spi.c - the bug is fixed.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Use IO_MUX pins as defined by ESP IDF in soc/esp32/include/soc/spi_pins.h
ESP32S2 and S3 don't have IO_MUX pins for SPI3, GPIO matrix is always used.
Choose suitable defaults for S2 and S3.
ESP32C3 does not have SPI3 at all. Don't define pin mappings for it.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Use IO_MUX pins as defined by ESP IDF in soc/esp32*/include/soc/spi_pins.h
Alternatively use now deprecated HSPI_IOMUX_PIN_NUM_xxx
(or FSPI_IOMUX_PIN_NUM_xxx for ESP32S2) for compatibility with IDF 4.2
and older.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
The index of machine_hw_spi_obj and machine_hw_spi_default_pins arrays is
assigned to 0 for ARG_id==HSPI_HOST and 1 for another SPI. On ESP32S2 and
S3 HSPI_HOST=2 so the first set (idx=0) of default pins is used for
SPI(id=2) aka HSPI/SPI3 and the second set (idx=1) for SPI(id=1) aka
FSPI/SPI2. This makes a misleading mess in MICROPY_HW_SPIxxxx definitions
and it is also in contradiction to the comments around the definitions.
Change the test of ARG_id to fix the order of machine_hw_spi_default_pins.
This change might require adjusting MICROPY_HW_SPIxxxx definitions in
mpconfigboard.h of S2/S3 based boards.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
- Move the qspi_xxxx_flash_config.c files to hal.
It turned out that they are less board than flash type specific.
- Change to a common flexspi_flash_config.h header file.
Thanks for the hint, Damien. The DEBUG build got very large recently.
The major difference is, that inline function are now inlined and
not included as a function. That's good and maybe bad. The good thing is,
that the code speed si now close to the final code. It could be worse
in single step debugging. I'll see.
Setting this option caused a new warning and a formatting error
to pop up at different places. Fixed as well.
The ID is read in a single function and used for:
- machine.unique_id()
- Ethernet MAC addresses.
- ...
That facilitates use of other MCU using a different access method for
the ID (e.g. i.MX RT1176).
Just another choice for the PHY interface.
Added: Keyword option phy_clock=LAN.IN or LAN.OUT
to define the source of the 50MHZ clock for the PHY
interface. The RMII clock is not enabled if it
is generated by a PYH board. Constants:
LAN.IN The clock is provided by the PHY board.
LAN.OUT The clock is provided by the MCU board.
The default is LAN.OUT or the value set in mpconfigboard.h, which
is currently set to IN only for the SEEED ARCH MIX board. Usage etc:
lan = LAN(phy_type=LAN.PHY_DP83848, phy_clock=LAN.IN)
The initial problem with a wrong ICMP checksum was caused by
the test code setting a checksum and the HW taking that probably as
the start value and ending up with 0xffff. With a checksum field of 0
set by the test code the HW creates the proper checksum.
Useful for boards without a PHY interface, where that has to be
attached. Like the Seed ARCH MIX board or Vision SOM. Phy drivers
supported so far are:
- KSZ8081
- DP83825
- LAN8720
More to come. Usage e.g.:
lan = LAN(phy_type=LAN.PHY_LAN8720, phy_addr=1)
The default values are those set in mpconfigboard.h.
UART 0 is attached to the Debug USB port. The settings are
115200 Baud, 8N1.
For MIMXRT1010_EVK this is identical to UART1. For the other boards,
this is an additional UART.
The pico-sdk 1.3.0 update in 97a7cc243b
introduced a change that broke RP2 Bluetooth UART, and possibly UART in
general, which stops working right after UART is initialized. The commit
raspberrypi/pico-sdk@2622e9b enables the UART receive timeout (RTIM) IRQ,
which is asserted when the receive FIFO is not empty, and no more
characters are received for a period of time.
This commit makes sure the RTIM IRQ is handled and cleared in
uart_service_interrupt.
The current ST HAL does not support reading the extended CSD so cannot
correctly detect the capacity of high-capacity cards. As a workaround, the
capacity can be forced via the MICROPY_HW_MMCARD_LOG_BLOCK_NBR config
option.
Signed-off-by: Damien George <damien@micropython.org>
These were commented correctly by their colour, but in the wrong order with
respect to the PCB silkscreen.
Fixes issue #8054.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
For the coverage build this reduces the binary size to about 1/4 of its
size, and seems to help gcov/lcov coverage analysis so that it doesn't miss
lines.
Signed-off-by: Damien George <damien@micropython.org>
The methods duty_u16() and duty_ns() are implemented to match the existing
docs. The duty will remain the same when the frequency is changed.
Standard ESP32 as well as S2, S3 and C3 are supported.
Thanks to @kdschlosser for the fix for rounding in resolution calculation.
Documentation is updated and examples expanded for esp32, including the
quickref and tutorial. Additional notes are added to the machine.PWM docs
regarding limitations of hardware PWM.
Instead of board pins, so that pins which have only the CPU specified in
pins.csv can still be used with mp_hal_pin_config_alt_static().
Signed-off-by: Damien George <damien@micropython.org>
A board can now define the following linker symbols to configure its flash
storage layout:
_micropy_hw_internal_flash_storage_start
_micropy_hw_internal_flash_storage_end
_micropy_hw_internal_flash_storage_ram_cache_start
_micropy_hw_internal_flash_storage_ram_cache_end
And optionally have a second flash segment by configuring
MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE_SEGMENT2 to 1 and defining:
_micropy_hw_internal_flash_storage2_start
_micropy_hw_internal_flash_storage2_end
Signed-off-by: Damien George <damien@micropython.org>
This reduces code size and code duplication, and fixes `pyb.usb_mode()` so
that it now returns the correct string when in multi-VCP mode (before, it
would return None when in one of these modes).
Signed-off-by: Damien George <damien@micropython.org>
Frequency range 15Hz/18Hz to > 1 MHz, with decreasing resolution of the
duty cycle. The basic API is supported as documentated, except that
keyword parameters are accepted for both the instatiaton and the
PWM.init() call.
Extensions: support PWM for channel pairs. Channel pairs are declared by
supplying 2-element tuples for the pins. The two channels of a pair must
be the A/B channel of a FLEXPWM module. These form than a complementary
pair.
Additional supported keyword arguments:
- center=value Defines the center position of a pulse within the pulse
cycle. The align keyword is actually shortcut for center.
- sync=True|False: If set to True, the channels will be synchronized to a
submodule 0 channel, which has already to be enabled.
- align=PWM.MIDDLE | PMW.BEGIN | PWM.END. It defines, whether synchronized
channels are Center-Aligned or Edge-aligned. The channels must be either
complementary a channel pair or a group of synchronized channels. It may
as well be applied to a single channel, but withiout any benefit.
- invert= 0..3. Controls ouput inversion of the pins. Bit 0 controls the
first pin, bit 1 the second.
- deadtime=time_ns time of complementary channels for delaying the rising
slope.
- xor=0|1|2 xor causes the output of channel A and B to be xored. If
applied to a X channel, it shows the value oif A ^ B. If applied to an A
or B channel, both channel show the xored signal for xor=1. For xor=2,
the xored signal is split between channels A and B. See also the
Reference Manual, chapter about double pulses. The behavior of xor=2 can
also be achieved using the center method for locating a pulse within a
clock period.
The output is enabled for board pins only.
CPU pins may still be used for FLEXPWM, e.g. as sync source, but the signal
will not be routed to the output. That applies only to FLEXPWM pins. The
use of QTMR pins which are not board pins will be rejected.
As part of this commit, the _WFE() statement is removed from
ticks_delay_us64() to prevent PWM glitching during calls to sleep().
This is to make the builds for all nucleo/discovery boards uniform, so they
can be treated the same by the auto build scripts.
The CI script is updated to explicitly enable mboot and packing, to test
these features.
Signed-off-by: Damien George <damien@micropython.org>
This prevents SPI4/5 from being used if SDIO and CYW43 are enabled, because
the DMA for the SDIO is used on an IRQ and must be exclusivly available for
use by the SDIO peripheral.
Signed-off-by: Damien George <damien@micropython.org>
Because DMA2 may be in use by other peripherals, eg SPI1.
On PYBD-SF6 it's possible to trigger a bug in the existing code by turning
on WLAN and connecting to an AP, pinging the IP address from a PC and
running the following code on the PYBD:
def spi_test(s):
while 1:
s.write('test')
s.read(4)
spi_test(machine.SPI(1,100000000))
This will eventually fail with `OSError: [Errno 110] ETIMEDOUT` because
DMA2 was turned off by the CYW43 driver during the SPI1 transfer.
This commit fixes the bug by removing the code that explicitly disables
DMA2. Instead DMA2 will be automatically disabled after an inactivity
timeout, see commit a96afae90f
Signed-off-by: Damien George <damien@micropython.org>
Quail (https://www.mikroe.com/quail, PID: MIKROE-1793) is based on an
STM32F427VI CPU, featuring 2048 kB of Flash memory and 192 kB of RAM. An
on-board Cypress S25FL164K adds 8 MB of SPI Flash.
Quail has 4 mikroBUS(TM) sockets for Mikroe click(TM) board connectivity,
along with 24 screw terminals for connecting additional electronics and two
USB ports (one for programming, the other for external mass storage).
4 UARTs, 2 SPIs and 1 I2C bus are available for communication.
Signed-off-by: Lorenzo Cappelletti <lorenzo.cappelletti@gmail.com>
Was incorrectly added as 7MB for an 8MB SPI flash, but this board has a
16MB chip, not 8MB, so it should be 15MB leaving 1MB for MicroPython.
Thanks to @robert-hh
The rp2.StateMachine.exec errors when supplying a sideset action. This
commit passes the sideset_opt from the StateMachine though to the parser.
It also adds some value validation to the sideset operator.
Additionally, the "word" method is added to the exec to allow any other
unsupported opcodes.
Fixes issue #7924.
- Makefile: update to use new ASF4 files, support frozen manifest, and
include source files in upcoming commits
- boards/manifest.py: add files to freeze
- boards/samd51p19a.ld: add linker script for this MCU
- help.c: add custom help text
- main.c: execute _boot.py, boot.py and main.py on start-up
- modules/_boot.py: startup file to freeze
- modutime.c: add gmtime, localtime, mktime, time functions
- mpconfigport.h: enabled more features for sys and io and modules
- mphalport.h: add mp_hal_pin_xxx macros
- mphalport.c: add mp_hal_stdio_poll
Don't force the 'HAL' string to be part of the platform string because
it doesn't have a sensible meaning for all possible platforms, and
swap it with the PLATFORM_ARCH string so the strings which most platforms
have come first.
Although the pyboard has only 4 LEDs, there are some boards that (may) have
more. This commit adds 2 more LEDs to the led.c file that if defined in
the board-specific config file will be compiled in.
- Add board.md files for MIMXRT1060_EVK and MIMXRT1064_EVK warning about
their experimental state.
- Add separate deploy_teensy.md and deploy_mimxrt.md files.
The ARCH MIX board exposes the Ethernet Pins at it's connectors. Therefore
the software is configured for using a LAN8720 PHY device. Breakout boards
with the LAN8720 are easily available.
This commit adds I2S protocol support for the rp2 port:
- I2S API is consistent with STM32 and ESP32 ports
- I2S configurations supported:
- master transmit and master receive
- 16-bit and 32-bit sample sizes
- mono and stereo formats
- sampling frequency
- 3 modes of operation:
- blocking
- non-blocking with callback
- uasyncio
- internal ring buffer size can be tuned
- DMA IRQs are managed on an I2S object basis, allowing other
RP2 entities to use DMA IRQs when I2S is not being used
- MicroPython documentation
- tested on Raspberry Pi Pico development board
- build metric changes for this commit: text(+4552), data(0), bss(+8)
Signed-off-by: Mike Teachman <mike.teachman@gmail.com>
Eliminate noise data from being sent to the I2S peripheral when the
transmitted sample stream is stopped.
Signed-off-by: Mike Teachman <mike.teachman@gmail.com>
Now that there are feature levels, and that this port uses
MICROPY_CONFIG_ROM_LEVEL_MINIMUM, it's easy to see what optional features
can be disabled. And this commit disables them.
Signed-off-by: Damien George <damien@micropython.org>
Word-size specific configuration is now done automatically, so it no longer
requires this to match the ARM configuration.
Also it's less common to have 32-bit compilation support installed, so this
will make it work "out of the box" for more people.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This is an stm32-specific feature that's accessed via the pyb module, so
not something that will be widely enabled.
Signed-off-by: Damien George <damien@micropython.org>
This commit is a no-op change. Future improvements can come from making
individual boards use CORE or BASIC.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Prior to this commit IRQs on STM32F4 could be lost because SR is cleared by
reading SR then reading DR. For example, if both RXNE and IDLE IRQs were
active upon entry to the IRQ handler, then IDLE is lost because the code
that handles RXNE comes first and accidentally clears SR (by reading SR
then DR to get the incoming character).
This commit fixes this problem by making the IRQ handler more atomic in the
following operations:
- get current IRQ status flags
- deal with RX character
- clear remaining status flags
- call user handler
On the STM32F4 it's very hard to get this right because the only way to
clear IRQ status flags is to read SR then DR, but the read of DR may read
some data which should remain in the register until the user wants to read
it. And it won't work to cache the read because RTS/CTS flow control will
then not work. So instead the new code disables interrupts if the DR is
full and waits for the user to read it before reenabling the interrupts.
Fixes issue mentioned in #4599 and #6082.
Signed-off-by: Damien George <damien@micropython.org>
Following on from ba940250a5, the change here
makes output about 15 times faster (now up to about 550 kbytes/sec).
tinyusb_cdcacm_write_queue will return the number of bytes written, so
there's no need to use tud_cdc_n_write_available.
Signed-off-by: Damien George <damien@micropython.org>
This will be used by https://micropython.org/download/ to generate the
full listing of boards and firmware files.
Optionally supports a board.md for additional customisation of the
download page, as well as deploy.md for flashing instructions.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
By moving code to ITCM, like vm, gc, parse, runtime. The change affects
mostly the execution speed of MicroPython code. The speed is increased by
up to a factor of 6, especially for MCU with small cache.
Andrew Leech
MikeTeachman
Damien George
iabdalkader
Kattni Rembor
Algy Tynan
robert-hh
wemos
Jonathan Hogg
Peter Züger
Philipp Ebensberger
Maureen Helm
Daniël van de Giessen
YoungJoon Chun
stijn
Christophe Priouzeau
David Lechner
Seon Rozenblum
Peter D. Gray
Emil Kondayan
Michael O'Cleirigh
IhorNehrutsa
Herwin Grobben
Andrew Leech
Jos Verlinde
ubi de feo
marcidy
Sean Coates
jason
Simon Baatz
Chris Boudacoff
Jim Mussared
Matt Trentini
Tomas Vanek
David Michieli
Frédéric Pierson
Peter Boin
Lorenzo Cappelletti
Mike Causer
oli
Peter van der Burg
retsyo
Matt van de Werken
Pooya Moradi
Henk Vergonet
Magnus von Wachenfeldt