stm32/mboot: Support H7 MCUs in fwupdate.py.
And optimise the speed of flash writing. Signed-off-by: Damien George <damien@micropython.org>
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Damien George
parent
29867a2439
commit
ca1914fb47
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@ -1,5 +1,5 @@
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# Update Mboot or MicroPython from a .dfu.gz file on the board's filesystem
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# MIT license; Copyright (c) 2019-2020 Damien P. George
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# MIT license; Copyright (c) 2019-2022 Damien P. George
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from micropython import const
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import struct, time
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@ -16,9 +16,6 @@ _ELEM_TYPE_MOUNT = const(2)
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_ELEM_TYPE_FSLOAD = const(3)
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_ELEM_TYPE_STATUS = const(4)
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FLASH_KEY1 = 0x45670123
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FLASH_KEY2 = 0xCDEF89AB
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def check_mem_contains(addr, buf):
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mem8 = stm.mem8
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@ -29,15 +26,6 @@ def check_mem_contains(addr, buf):
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return True
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def check_mem_erased(addr, size):
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mem16 = stm.mem16
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r = range(0, size, 2)
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for off in r:
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if mem16[addr + off] != 0xFFFF:
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return False
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return True
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def dfu_read(filename):
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f = open(filename, "rb")
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@ -85,39 +73,99 @@ def dfu_read(filename):
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return elems
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def flash_wait_not_busy():
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while stm.mem32[stm.FLASH + stm.FLASH_SR] & 1 << 16:
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machine.idle()
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class Flash:
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_FLASH_KEY1 = 0x45670123
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_FLASH_KEY2 = 0xCDEF89AB
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def __init__(self):
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import os, uctypes
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def flash_unlock():
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stm.mem32[stm.FLASH + stm.FLASH_KEYR] = FLASH_KEY1
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stm.mem32[stm.FLASH + stm.FLASH_KEYR] = FLASH_KEY2
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self.addressof = uctypes.addressof
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# Detect MCU.
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machine = os.uname().machine
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if "STM32F4" in machine or "STM32F7" in machine:
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dev_id = stm.mem32[0xE004_2000] & 0xFFF
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elif "STM32H7" in machine:
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dev_id = stm.mem32[0x5C00_1000] & 0xFFF
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else:
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dev_id = 0
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def flash_lock():
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stm.mem32[stm.FLASH + stm.FLASH_CR] = 1 << 31 # LOCK
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# Configure flash parameters based on MCU.
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if dev_id in (0x413, 0x419, 0x431, 0x451, 0x452):
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# 0x413: STM32F405/407, STM32F415/417
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# 0x419: STM32F42x/43x
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# 0x431: STM32F411
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# 0x451: STM32F76x/77x
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# 0x452: STM32F72x/73x
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self._keyr = stm.FLASH + stm.FLASH_KEYR
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self._sr = stm.FLASH + stm.FLASH_SR
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self._sr_busy = 1 << 16
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self._cr = stm.FLASH + stm.FLASH_CR
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self._cr_lock = 1 << 31
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self._cr_init_erase = lambda s: 2 << 8 | s << 3 | 1 << 1 # PSIZE=32-bits, SNB, SER
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self._cr_start_erase = 1 << 16 # STRT
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self._cr_init_write = 2 << 8 | 1 << 0 # PSIZE=32-bits, PG
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self._cr_flush = None
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self._write_multiple = 4
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if dev_id == 0x451 and stm.mem32[0x1FFF_0008] & 1 << 13: # check nDBANK
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# STM32F76x/77x in single-bank mode
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self.sector0_size = 32 * 1024
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else:
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self.sector0_size = 16 * 1024
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elif dev_id == 0x450:
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# 0x450: STM32H742, STM32H743/753, STM32H750
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self._keyr = stm.FLASH + stm.FLASH_KEYR1
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self._sr = stm.FLASH + stm.FLASH_SR1
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self._sr_busy = 1 << 2 # QW1
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self._cr = stm.FLASH + stm.FLASH_CR1
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self._cr_lock = 1 << 0 # LOCK1
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self._cr_init_erase = lambda s: s << 8 | 3 << 4 | 1 << 2 # SNB1, PSIZE1=64-bits, SER1
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self._cr_start_erase = 1 << 7 # START1
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self._cr_init_write = 3 << 4 | 1 << 1 # PSIZE1=64-bits, PG1=1
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self._cr_flush = 1 << 6 # FW1=1
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self._write_multiple = 16
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self.sector0_size = 128 * 1024
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else:
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raise Exception(f"unknown MCU {machine} DEV_ID=0x{dev_id:x}")
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def wait_not_busy(self):
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while stm.mem32[self._sr] & self._sr_busy:
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machine.idle()
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def flash_erase_sector(sector):
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assert 0 <= sector <= 7 # for F722
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flash_wait_not_busy()
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cr = 2 << 8 | sector << 3 | 1 << 1 # PSIZE = 32 bits # SNB # SER
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stm.mem32[stm.FLASH + stm.FLASH_CR] = cr
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stm.mem32[stm.FLASH + stm.FLASH_CR] = cr | 1 << 16 # STRT
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flash_wait_not_busy()
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stm.mem32[stm.FLASH + stm.FLASH_CR] = 0
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def unlock(self):
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if stm.mem32[self._cr] & self._cr_lock:
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stm.mem32[self._keyr] = self._FLASH_KEY1
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stm.mem32[self._keyr] = self._FLASH_KEY2
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def lock(self):
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stm.mem32[self._cr] = self._cr_lock
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def flash_write(addr, buf):
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assert len(buf) % 4 == 0
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flash_wait_not_busy()
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cr = 2 << 8 | 1 << 0 # PSIZE = 32 bits # PG
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stm.mem32[stm.FLASH + stm.FLASH_CR] = cr
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for off in range(0, len(buf), 4):
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stm.mem32[addr + off] = struct.unpack_from("I", buf, off)[0]
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flash_wait_not_busy()
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stm.mem32[stm.FLASH + stm.FLASH_CR] = 0
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def erase_sector(self, sector):
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assert 0 <= sector <= 7
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self.wait_not_busy()
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stm.mem32[self._cr] = self._cr_init_erase(sector)
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stm.mem32[self._cr] |= self._cr_start_erase
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self.wait_not_busy()
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stm.mem32[self._cr] = 0
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# This method is optimised for speed, to reduce the time data is being written.
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def write(self, addr, buf):
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assert len(buf) % 4 == 0
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mem32 = stm.mem32
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buf_addr = self.addressof(buf)
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r = range(0, len(buf), 4)
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self.wait_not_busy()
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mem32[self._cr] = self._cr_init_write
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for off in r:
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mem32[addr + off] = mem32[buf_addr + off]
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if off % self._write_multiple == 0:
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while mem32[self._sr] & self._sr_busy:
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pass
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if self._cr_flush is not None:
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mem32[self._cr] |= self._cr_flush
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self.wait_not_busy()
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mem32[self._cr] = 0
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def update_mboot(filename):
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@ -144,13 +192,14 @@ def update_mboot(filename):
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print("Programming Mboot, do not turn off!")
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time.sleep_ms(50)
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flash = Flash()
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irq = machine.disable_irq()
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flash_unlock()
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flash_erase_sector(0)
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if len(mboot_fw) > 16 * 1024 and not check_mem_erased(mboot_addr + 16 * 1024, 16 * 1024):
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flash_erase_sector(1)
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flash_write(mboot_addr, mboot_fw)
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flash_lock()
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flash.unlock()
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flash.erase_sector(0)
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if len(mboot_fw) > flash.sector0_size:
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flash.erase_sector(1)
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flash.write(mboot_addr, mboot_fw)
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flash.lock()
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machine.enable_irq(irq)
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print("New Mboot programmed.")
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