mimxrt/machine_pin: Change pin drive constants to DRIVE_x naming.
Updated DRIVE_x constants representing pin drive strength. Signed-off-by: Philipp Ebensberger
This commit is contained in:
parent
3ebc370344
commit
62cb2069bb
|
@ -195,7 +195,7 @@ void eth_init(eth_t *self, int mac_idx, const phy_operations_t *phy_ops, int phy
|
|||
|
||||
IOMUXC_SetPinMux(reset_pin->muxRegister, af_obj->af_mode, 0, 0, reset_pin->configRegister, 0U);
|
||||
IOMUXC_SetPinConfig(reset_pin->muxRegister, af_obj->af_mode, 0, 0, reset_pin->configRegister,
|
||||
pin_generate_config(PIN_PULL_DISABLED, PIN_MODE_OUT, PIN_DRIVE_POWER_5, reset_pin->configRegister));
|
||||
pin_generate_config(PIN_PULL_DISABLED, PIN_MODE_OUT, PIN_DRIVE_5, reset_pin->configRegister));
|
||||
GPIO_PinInit(reset_pin->gpio, reset_pin->pin, &gpio_config);
|
||||
#endif
|
||||
|
||||
|
@ -206,7 +206,7 @@ void eth_init(eth_t *self, int mac_idx, const phy_operations_t *phy_ops, int phy
|
|||
|
||||
IOMUXC_SetPinMux(int_pin->muxRegister, af_obj->af_mode, 0, 0, int_pin->configRegister, 0U);
|
||||
IOMUXC_SetPinConfig(int_pin->muxRegister, af_obj->af_mode, 0, 0, int_pin->configRegister,
|
||||
pin_generate_config(PIN_PULL_UP_47K, PIN_MODE_IN, PIN_DRIVE_POWER_5, int_pin->configRegister));
|
||||
pin_generate_config(PIN_PULL_UP_47K, PIN_MODE_IN, PIN_DRIVE_5, int_pin->configRegister));
|
||||
GPIO_PinInit(int_pin->gpio, int_pin->pin, &gpio_config);
|
||||
#endif
|
||||
|
||||
|
|
|
@ -190,7 +190,7 @@ STATIC mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_
|
|||
[PIN_INIT_ARG_MODE] { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT },
|
||||
[PIN_INIT_ARG_PULL] { MP_QSTR_pull, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE}},
|
||||
[PIN_INIT_ARG_VALUE] { MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}},
|
||||
[PIN_INIT_ARG_DRIVE] { MP_QSTR_drive, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = PIN_DRIVE_POWER_3}},
|
||||
[PIN_INIT_ARG_DRIVE] { MP_QSTR_drive, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = PIN_DRIVE_3}},
|
||||
// TODO: Implement additional arguments
|
||||
/*
|
||||
{ MP_QSTR_af, MP_ARG_INT, {.u_int = -1}}, // legacy
|
||||
|
@ -381,14 +381,14 @@ STATIC const mp_rom_map_elem_t machine_pin_locals_dict_table[] = {
|
|||
{ MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(PIN_PULL_DOWN_100K) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PULL_HOLD), MP_ROM_INT(PIN_PULL_HOLD) },
|
||||
|
||||
{ MP_ROM_QSTR(MP_QSTR_DRIVER_OFF), MP_ROM_INT(PIN_DRIVE_OFF) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_POWER_0), MP_ROM_INT(PIN_DRIVE_POWER_0) }, // R0 (150 Ohm @3.3V / 260 Ohm @ 1.8V)
|
||||
{ MP_ROM_QSTR(MP_QSTR_POWER_1), MP_ROM_INT(PIN_DRIVE_POWER_1) }, // R0/2
|
||||
{ MP_ROM_QSTR(MP_QSTR_POWER_2), MP_ROM_INT(PIN_DRIVE_POWER_2) }, // R0/3
|
||||
{ MP_ROM_QSTR(MP_QSTR_POWER_3), MP_ROM_INT(PIN_DRIVE_POWER_3) }, // R0/4
|
||||
{ MP_ROM_QSTR(MP_QSTR_POWER_4), MP_ROM_INT(PIN_DRIVE_POWER_4) }, // R0/5
|
||||
{ MP_ROM_QSTR(MP_QSTR_POWER_5), MP_ROM_INT(PIN_DRIVE_POWER_5) }, // R0/6
|
||||
{ MP_ROM_QSTR(MP_QSTR_POWER_6), MP_ROM_INT(PIN_DRIVE_POWER_6) }, // R0/7
|
||||
{ MP_ROM_QSTR(MP_QSTR_DRIVE_OFF), MP_ROM_INT(PIN_DRIVE_OFF) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_DRIVE_0), MP_ROM_INT(PIN_DRIVE_0) }, // R0 (150 Ohm @3.3V / 260 Ohm @ 1.8V)
|
||||
{ MP_ROM_QSTR(MP_QSTR_DRIVE_1), MP_ROM_INT(PIN_DRIVE_1) }, // R0/2
|
||||
{ MP_ROM_QSTR(MP_QSTR_DRIVE_2), MP_ROM_INT(PIN_DRIVE_2) }, // R0/3
|
||||
{ MP_ROM_QSTR(MP_QSTR_DRIVE_3), MP_ROM_INT(PIN_DRIVE_3) }, // R0/4
|
||||
{ MP_ROM_QSTR(MP_QSTR_DRIVE_4), MP_ROM_INT(PIN_DRIVE_4) }, // R0/5
|
||||
{ MP_ROM_QSTR(MP_QSTR_DRIVE_5), MP_ROM_INT(PIN_DRIVE_5) }, // R0/6
|
||||
{ MP_ROM_QSTR(MP_QSTR_DRIVE_6), MP_ROM_INT(PIN_DRIVE_6) }, // R0/7
|
||||
|
||||
{ MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(1) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(2) },
|
||||
|
|
|
@ -518,7 +518,7 @@ STATIC mp_obj_t mp_machine_pwm_make_new(const mp_obj_type_t *type, size_t n_args
|
|||
IOMUXC_SetPinMux(pin1->muxRegister, af_obj1->af_mode, af_obj1->input_register, af_obj1->input_daisy,
|
||||
pin1->configRegister, 0U);
|
||||
IOMUXC_SetPinConfig(pin1->muxRegister, af_obj1->af_mode, af_obj1->input_register, af_obj1->input_daisy,
|
||||
pin1->configRegister, pin_generate_config(PIN_PULL_DISABLED, PIN_MODE_OUT, PIN_DRIVE_POWER_5, pin1->configRegister));
|
||||
pin1->configRegister, pin_generate_config(PIN_PULL_DISABLED, PIN_MODE_OUT, PIN_DRIVE_5, pin1->configRegister));
|
||||
|
||||
// Settings for the second pin, if given.
|
||||
if (pin2 != NULL && pin2 != pin1) {
|
||||
|
@ -529,7 +529,7 @@ STATIC mp_obj_t mp_machine_pwm_make_new(const mp_obj_type_t *type, size_t n_args
|
|||
IOMUXC_SetPinMux(pin2->muxRegister, af_obj2->af_mode, af_obj2->input_register, af_obj2->input_daisy,
|
||||
pin2->configRegister, 0U);
|
||||
IOMUXC_SetPinConfig(pin2->muxRegister, af_obj2->af_mode, af_obj2->input_register, af_obj2->input_daisy,
|
||||
pin2->configRegister, pin_generate_config(PIN_PULL_DISABLED, PIN_MODE_OUT, PIN_DRIVE_POWER_5, pin2->configRegister));
|
||||
pin2->configRegister, pin_generate_config(PIN_PULL_DISABLED, PIN_MODE_OUT, PIN_DRIVE_5, pin2->configRegister));
|
||||
} else {
|
||||
self->complementary = 0;
|
||||
}
|
||||
|
|
|
@ -85,11 +85,11 @@ bool lpuart_set_iomux(int8_t uart) {
|
|||
if (TX.muxRegister != 0) {
|
||||
IOMUXC_SetPinMux(TX.muxRegister, TX.muxMode, TX.inputRegister, TX.inputDaisy, TX.configRegister, 0U);
|
||||
IOMUXC_SetPinConfig(TX.muxRegister, TX.muxMode, TX.inputRegister, TX.inputDaisy, TX.configRegister,
|
||||
pin_generate_config(PIN_PULL_UP_100K, PIN_MODE_OUT, PIN_DRIVE_POWER_6, TX.configRegister));
|
||||
pin_generate_config(PIN_PULL_UP_100K, PIN_MODE_OUT, PIN_DRIVE_6, TX.configRegister));
|
||||
|
||||
IOMUXC_SetPinMux(RX.muxRegister, RX.muxMode, RX.inputRegister, RX.inputDaisy, RX.configRegister, 0U);
|
||||
IOMUXC_SetPinConfig(RX.muxRegister, RX.muxMode, RX.inputRegister, RX.inputDaisy, RX.configRegister,
|
||||
pin_generate_config(PIN_PULL_UP_100K, PIN_MODE_IN, PIN_DRIVE_POWER_6, RX.configRegister));
|
||||
pin_generate_config(PIN_PULL_UP_100K, PIN_MODE_IN, PIN_DRIVE_6, RX.configRegister));
|
||||
return true;
|
||||
} else {
|
||||
return false;
|
||||
|
|
|
@ -99,7 +99,7 @@ uint32_t pin_generate_config(const uint32_t pull, const uint32_t mode, const uin
|
|||
if (!IS_GPIO_DRIVE(drive)) {
|
||||
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("invalid drive strength: %d"), drive);
|
||||
}
|
||||
pad_config |= IOMUXC_SW_PAD_CTL_PAD_DSE(drive >= PIN_DRIVE_POWER_4);
|
||||
pad_config |= IOMUXC_SW_PAD_CTL_PAD_DSE(drive >= PIN_DRIVE_4);
|
||||
}
|
||||
|
||||
#else
|
||||
|
|
|
@ -40,13 +40,13 @@
|
|||
((MODE) == PIN_MODE_ALT))
|
||||
|
||||
#define IS_GPIO_DRIVE(DRIVE) (((DRIVE) == PIN_DRIVE_OFF) || \
|
||||
((DRIVE) == PIN_DRIVE_POWER_0) || \
|
||||
((DRIVE) == PIN_DRIVE_POWER_1) || \
|
||||
((DRIVE) == PIN_DRIVE_POWER_2) || \
|
||||
((DRIVE) == PIN_DRIVE_POWER_3) || \
|
||||
((DRIVE) == PIN_DRIVE_POWER_4) || \
|
||||
((DRIVE) == PIN_DRIVE_POWER_5) || \
|
||||
((DRIVE) == PIN_DRIVE_POWER_6))
|
||||
((DRIVE) == PIN_DRIVE_0) || \
|
||||
((DRIVE) == PIN_DRIVE_1) || \
|
||||
((DRIVE) == PIN_DRIVE_2) || \
|
||||
((DRIVE) == PIN_DRIVE_3) || \
|
||||
((DRIVE) == PIN_DRIVE_4) || \
|
||||
((DRIVE) == PIN_DRIVE_5) || \
|
||||
((DRIVE) == PIN_DRIVE_6))
|
||||
|
||||
// ------------------------------------------------------------------------------------------------------------------ //
|
||||
|
||||
|
@ -82,13 +82,13 @@ enum {
|
|||
|
||||
enum {
|
||||
PIN_DRIVE_OFF = 0b000,
|
||||
PIN_DRIVE_POWER_0, // R0 (150 Ohm @3.3V / 260 Ohm @ 1.8V)
|
||||
PIN_DRIVE_POWER_1, // R0/2
|
||||
PIN_DRIVE_POWER_2, // R0/3
|
||||
PIN_DRIVE_POWER_3, // R0/4
|
||||
PIN_DRIVE_POWER_4, // R0/5
|
||||
PIN_DRIVE_POWER_5, // R0/6
|
||||
PIN_DRIVE_POWER_6, // R0/7
|
||||
PIN_DRIVE_0, // R0 (150 Ohm @3.3V / 260 Ohm @ 1.8V)
|
||||
PIN_DRIVE_1, // R0/2
|
||||
PIN_DRIVE_2, // R0/3
|
||||
PIN_DRIVE_3, // R0/4
|
||||
PIN_DRIVE_4, // R0/5
|
||||
PIN_DRIVE_5, // R0/6
|
||||
PIN_DRIVE_6, // R0/7
|
||||
};
|
||||
|
||||
|
||||
|
|
|
@ -728,14 +728,14 @@ void sdcard_init_pins(mimxrt_sdcard_obj_t *card) {
|
|||
const mimxrt_sdcard_obj_pins_t *pins = card->pins;
|
||||
|
||||
uint32_t default_config = pin_generate_config(
|
||||
PIN_PULL_UP_47K, PIN_MODE_SKIP, PIN_DRIVE_POWER_6, card->pins->clk.pin->configRegister);
|
||||
PIN_PULL_UP_47K, PIN_MODE_SKIP, PIN_DRIVE_6, card->pins->clk.pin->configRegister);
|
||||
#if USDHC_DATA3_PULL_DOWN_ON_BOARD
|
||||
// Pull down on the board -> must not enable internal PD.
|
||||
uint32_t no_cd_config = pin_generate_config(
|
||||
PIN_PULL_DISABLED, PIN_MODE_SKIP, PIN_DRIVE_POWER_6, card->pins->data3.pin->configRegister);
|
||||
PIN_PULL_DISABLED, PIN_MODE_SKIP, PIN_DRIVE_6, card->pins->data3.pin->configRegister);
|
||||
#else
|
||||
uint32_t no_cd_config = pin_generate_config(
|
||||
PIN_PULL_DOWN_100K, PIN_MODE_SKIP, PIN_DRIVE_POWER_6, card->pins->data3.pin->configRegister);
|
||||
PIN_PULL_DOWN_100K, PIN_MODE_SKIP, PIN_DRIVE_6, card->pins->data3.pin->configRegister);
|
||||
#endif // USDHC_DATA3_PULL_DOWN_ON_BOARD
|
||||
|
||||
sdcard_init_pin(card->pins->clk.pin, card->pins->clk.af_idx, default_config); // USDHC1_CLK
|
||||
|
|
Loading…
Reference in New Issue