This allows for the heap to fill all space but the stack. It also
allows us to designate space for memory outside the runtime for
things such as USB descriptors, flash cache and main filename.
Fixes#754
This patch adds support to mboot for programming external SPI flash. It
allows SPI flash to be programmed via a USB DFU utility in the same way
that internal MCU flash is programmed.
Prior to this patch the QSPI driver assumed that the length of all data
reads and writes was a multiple of 4. This patch allows any length. Reads
are optimised for speed by using 32-bit transfers when possible, but writes
always use a byte transfer because they only use a single data IO line and
are relatively slow.
These examples rely on machine and pyb modules, so they have to get.
Leaving 3 BLE examples that also rely on those modules, but can be
fixed to use CP's modules.
This commit cleans up the pin generation code, all the pins and their
AF (only ADC, for now) are specified in nrf52_af.csv and board use their
own csv file to specify which pins are available on that board and if
they have any special names.
With the only difference between a SD and non-SD build is the linker
file, there's no need to have two separate .mk per board files,
just use a conditional.
The DMA peripheral is limited to transferring 65535 elements at a time so
in order to send more than that the SPI driver must split the transfers up.
The user must be aware of this limit if they are relying on precise timing
of the entire SPI transfer, because there might be a small delay between
the split transfers.
Fixes issue #3851, and thanks to @kwagyeman for the original fix.
This behaviour of a NULL write C method on a stream that uses the write
adaptor objects is no longer supported. It was only ever used by the
coverage build for testing the fail path of mp_get_stream_raise().
If the user button is held down indefinitely (eg unintenionally, or because
the GPIO signal of the user button is connected to some external device)
then it makes sense to end the reset mode cycle with the default mode of
1, which executes code as normal.
It's possible (at least on F4 MCU's) to have RXNE and STOPF set at the same
time during a call to the slave IRQ handler. In such cases RXNE should be
handled before STOPF so that all bytes are processed before
i2c_slave_process_rx_end() is called.
Due to buffering of outgoing bytes on the I2C bus, detection of a NACK
using the ISR_NACKF flag needs to account for the case where ISR_NACKF
corresponds to the previous-to-previous byte.
This patch renames the existing SPI flash API functions to reflect the fact
that the go through the cache:
mp_spiflash_flush -> mp_spiflash_cache_flush
mp_spiflash_read -> mp_spiflash_cached_read
mp_spiflash_write -> mp_spiflash_cached_write
We now track the last time the background task ran and bail on the
PulseIn if it starves the background work. In practice, this
happens after the numbers from pulsein are no longer accurate.
This also adjusts interrupt priorities so most are the lowest level
except for the tick and USB interrupts.
Fixes#516 and #876
The DFU USB config descriptor returns 0x0800=2048 for the supported
transfer size, and this applies to both TX (IN) and RX (OUT). So increase
the rx_buf to support this size without having a buffer overflow on
received data.
With this patch mboot in USB DFU mode now works with dfu-util.
Currently <WLAN>.isconnected() always returns True if a static IP is set,
regardless of the state of the connection.
This patch introduces a new flag 'wifi_sta_connected' which is set in
event_handler() when GOT_IP event is received and reset when DISCONNECTED
event is received (unless re-connect is successful). isconnected() now
simply returns the status of this flag (for STA_IF).
The pre-existing flag misleadingly named 'wifi_sta_connected" is also
renamed to 'wifi_sta_connect_requested'.
Fixes issue #3837
MICROPY_PY_DELATTR_SETATTR can now be enabled without a performance hit for
classes that don't use this feature.
MICROPY_PY_BUILTINS_NOTIMPLEMENTED is a minor addition that improves
compatibility with CPython.
They are now efficient (in runtime performance) and provide a useful
feature that's hard to obtain without them enabled.
See issue #3644 and PR #3826 for background.
Now that the coverage build has fully switched to the VFS sub-system these
functions were no longer available, so add them to the uos_vfs module.
Also, vfs_open is no longer needed, it's available as the built-in open.
The unix coverage build is now switched fully to the VFS implementation, ie
the uos module is the uos_vfs module. For example, one can now sandbox uPy
to their home directory via:
$ ./micropython_coverage
>>> import uos
>>> uos.umount('/') # unmount existing root VFS
>>> vfs = uos.VfsPosix('/home/user') # create new POSIX VFS
>>> uos.mount(vfs, '/') # mount new POSIX VFS at root
Some filesystem/OS features may no longer work with the coverage build due
to this change, and these need to be gradually fixed.
The standard unix port remains unchanged, it still uses the traditional uos
module which directly accesses the underlying host filesystem.
This patch adds support for building the firmware with external SPI RAM
enabled. It is disabled by default because it adds overhead (due to
silicon workarounds) and reduces performance (because it's slower to have
bytecode and objects stored in external RAM).
To enable it, either use "make CONFIG_SPIRAM_SUPPORT=1", or add this line
to you custom makefile/GNUmakefile (before "include Makefile"):
CONFIG_SPIRAM_SUPPORT = 1
When this option is enabled the MicroPython heap is automatically allocated
in external SPI RAM.
Thanks to Angus Gratton for help with the compiler and linker settings.
Also, re-enable calibration storage for CircuitPlayground Express.
Tested with a 500hz PWMOut on Metro M0 with Saleae:
* with crystal 500hz
* with usb 500hz +- 0.1hz
* without either 487hz += 0.1hz
SAMD51 is skipped due to DFLL errata and the fact it defaults to a
factory calibrated 48mhz that works fine for USB.
Fixes#648
This uses the crystal to clock the RTC on boards which have a crystal.
Disable clock generator 2 which was enabled in commit
8e2080411f ("atmel-samd: Add rtc module support").
samd51 differs from samd21 when it comes to the RTC clock. samd51 doesn't
have an explicit clock peripheral so no need for a clock generator.
The same commit didn't even setup XOSC32K correctly, it missed EN1K and XTALEN.
The RTC uses the 1k clock output, so enable it on the OSCULP32K even if it works without it.
Refactor the convoluted asf4 clock setup into something more readable.
enable_clock_generator() has 2 changes:
- Set 'Output enabled' to match the current clock setup
- Handle divisors above 511
Add an enable_clock_generator_sync() version which makes it possible to setup
clocks without waiting for syncing. The bootup would hang without this.
I have checked these registers:
NVMCTRL->CTRLA = 0x00000004
Peripheral clocks (only non-zero shown):
PCHCTRL[1]=0x00000045
PCHCTRL[10]=0x00000041
Generator clocks (only non-zero shown):
GENCTRL[0] = 0x00010907
GENCTRL[1] = 0x00010906
-GENCTRL[2] = 0x00041104
+GENCTRL[2] = 0x00200904
GENCTRL[4] = 0x00010907
GENCTRL[5] = 0x00180906
DFLL clock:
OSCCTRL->DFLLCTRLA = 0x00000082
OSCCTRL->DFLLCTRLB = 0x00000000
OSCCTRL->DFLLVAL = 0x00008082
OSCCTRL->DFLLMUL = 0x00000000
DPLL clocks:
OSCCTRL->Dpll[0].DPLLCTRLA=0x00000002
OSCCTRL->Dpll[0].DPLLCTRLB=0x00000000
OSCCTRL->Dpll[0].DPLLRATIO=0x0000003b
OSCCTRL->Dpll[1].DPLLCTRLA=0x00000080
OSCCTRL->Dpll[1].DPLLCTRLB=0x00000020
OSCCTRL->Dpll[1].DPLLRATIO=0x00000000
OSC32KCTRL clock:
OSC32KCTRL->RTCCTRL = 0x00000000
OSC32KCTRL->XOSC32K = 0x00002082
OSC32KCTRL->CFDCTRL = 0x00000000
OSC32KCTRL->EVCTRL = 0x00000000
OSC32KCTRL->OSCULP32K = 0x00002300
Only gen2 changed which is due to samd51 having more bits in the simple
division register so DIVSEL wasn't necessary, and it didn't have OE set.
The Wiznet5k series of chips support a MACRAW mode which allows the host to
send and receive Ethernet frames directly. This can be hooked into the
lwIP stack to provide a full "socket" implementation using this Wiznet
Ethernet device. This patch adds support for this feature.
To enable the feature one must add the following to mpconfigboard.mk, or
mpconfigport.mk:
MICROPY_PY_WIZNET5K = 5500
and the following to mpconfigboard.h, or mpconfigport.h:
#define MICROPY_PY_LWIP (1)
After wiring up the module (X5=CS, X4=RST), usage on a pyboard is:
import time, network
nic = network.WIZNET5K(pyb.SPI(1), pyb.Pin.board.X5, pyb.Pin.board.X4)
nic.active(1)
while not nic.isconnected():
time.sleep_ms(50) # needed to poll the NIC
print(nic.ifconfig())
Then use the socket module as usual.
Compared to using the built-in TCP/IP stack on the Wiznet module, some
performance is lost in MACRAW mode: with a lot of memory allocated to lwIP
buffers, lwIP gives Around 750,000 bytes/sec max TCP download, compared
with 1M/sec when using the TCP/IP stack on the Wiznet module.
It should be up to the NIC itself to decide if the network interface is
removed upon soft reset. Some NICs can keep the interface up over a soft
reset, which improves usability of the network.
Pins with multiple alt-funcs for the same peripheral (eg USART_CTS_NSS)
need to be split into individual alt-funcs for make-pins.py to work
correctly.
This patch changes the following:
- Split `..._CTS_NSS` into `..._CTS/..._NSS`
- Split `..._RTS_DE` into `..._RTS/..._DE`
- Split `JTDO_SWO` into `JTDO/TRACESWO` for consistency
- Fixed `TRACECK` to `TRACECLK` for consistency
If no block devices are defined by a board then storage support will be
disabled. This means there is no filesystem provided by either the
internal flash or external SPI flash. But the VFS system can still be
enabled and filesystems provided on external devices like an SD card.
