esp32: Update to latest ESP IDF.
This commit is contained in:
Damien George
parent
7be4a23c0c
commit
d61d119c94
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@ -21,7 +21,7 @@ FLASH_FREQ ?= 40m
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FLASH_SIZE ?= 4MB
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CROSS_COMPILE ?= xtensa-esp32-elf-
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ESPIDF_SUPHASH := 1f7b41e206646417adc572da928175d33c986bd3
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ESPIDF_SUPHASH := 9a55b42f0841b3d38a61089b1dda4bf28135decd
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# paths to ESP IDF and its components
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ifeq ($(ESPIDF),)
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@ -93,6 +93,7 @@ INC_ESPCOMP += -I$(ESPCOMP)/ethernet/include
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INC_ESPCOMP += -I$(ESPCOMP)/app_trace/include
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INC_ESPCOMP += -I$(ESPCOMP)/app_update/include
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INC_ESPCOMP += -I$(ESPCOMP)/pthread/include
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INC_ESPCOMP += -I$(ESPCOMP)/smartconfig_ack/include
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# these flags are common to C and C++ compilation
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CFLAGS_COMMON = -Os -ffunction-sections -fdata-sections -fstrict-volatile-bitfields \
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@ -271,7 +272,7 @@ ESPIDF_ESP32_O = $(addprefix $(ESPCOMP)/esp32/,\
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intr_alloc.o \
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dport_access.o \
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wifi_init.o \
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wifi_internal.o \
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wifi_os_adapter.o \
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sleep_modes.o \
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spiram.o \
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spiram_psram.o \
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@ -291,6 +292,7 @@ ESPIDF_SOC_O = $(addprefix $(ESPCOMP)/soc/,\
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esp32/rtc_sleep.o \
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esp32/rtc_time.o \
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esp32/soc_memory_layout.o \
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esp32/spi_periph.o \
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)
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ESPIDF_CXX_O = $(addprefix $(ESPCOMP)/cxx/,\
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@ -331,7 +333,7 @@ $(BUILD)/$(ESPCOMP)/freertos/portasm.o: CFLAGS = $(CFLAGS_ASM)
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$(BUILD)/$(ESPCOMP)/freertos/xtensa_context.o: CFLAGS = $(CFLAGS_ASM)
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$(BUILD)/$(ESPCOMP)/freertos/xtensa_intr_asm.o: CFLAGS = $(CFLAGS_ASM)
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$(BUILD)/$(ESPCOMP)/freertos/xtensa_vectors.o: CFLAGS = $(CFLAGS_ASM)
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$(BUILD)/$(ESPCOMP)/freertos/%.o: CFLAGS = $(CFLAGS_BASE) -I. $(INC_ESPCOMP) -I$(ESPCOMP)/freertos/include/freertos
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$(BUILD)/$(ESPCOMP)/freertos/%.o: CFLAGS = $(CFLAGS_BASE) -I. $(INC_ESPCOMP) -I$(ESPCOMP)/freertos/include/freertos -D_ESP_FREERTOS_INTERNAL
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ESPIDF_FREERTOS_O = $(addprefix $(ESPCOMP)/freertos/,\
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croutine.o \
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event_groups.o \
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@ -429,6 +431,10 @@ ESPIDF_NVS_FLASH_O = $(addprefix $(ESPCOMP)/nvs_flash/,\
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ESPIDF_OPENSSL_O = $(addprefix $(ESPCOMP)/openssl/,\
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)
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ESPIDF_SMARTCONFIG_ACK_O = $(addprefix $(ESPCOMP)/smartconfig_ack/,\
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smartconfig_ack.o \
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)
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ESPIDF_SPI_FLASH_O = $(addprefix $(ESPCOMP)/spi_flash/,\
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flash_mmap.o \
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partition.o \
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@ -629,6 +635,7 @@ OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_APP_UPDATE_O))
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OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_NGHTTP_O))
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OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_NVS_FLASH_O))
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OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_OPENSSL_O))
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OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_SMARTCONFIG_ACK_O))
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OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_SPI_FLASH_O))
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OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_ULP_O))
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OBJ_ESPIDF += $(addprefix $(BUILD)/, $(ESPIDF_WPA_SUPPLICANT_O))
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@ -666,7 +673,7 @@ APP_LD_ARGS += -L$(dir $(LIBGCC_FILE_NAME)) -lgcc
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APP_LD_ARGS += -L$(dir $(LIBSTDCXX_FILE_NAME)) -lstdc++
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APP_LD_ARGS += $(LIBC_LIBM)
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APP_LD_ARGS += $(ESPCOMP)/esp32/libhal.a
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APP_LD_ARGS += -L$(ESPCOMP)/esp32/lib -lcore -lnet80211 -lphy -lrtc -lpp -lwpa -lsmartconfig -lcoexist -lwps -lwpa2
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APP_LD_ARGS += -L$(ESPCOMP)/esp32/lib -lcore -lmesh -lnet80211 -lphy -lrtc -lpp -lwpa -lsmartconfig -lcoexist -lwps -lwpa2
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APP_LD_ARGS += $(OBJ)
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APP_LD_ARGS += --end-group
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@ -11,7 +11,7 @@ SECTIONS
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. = ALIGN(4);
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*(.rtc.literal .rtc.text)
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*rtc_wake_stub*.o(.literal .text .literal.* .text.*)
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} >rtc_iram_seg
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} > rtc_iram_seg
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/* RTC slow memory holds RTC wake stub
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data/rodata, including from any source file
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@ -35,6 +35,20 @@ SECTIONS
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_rtc_bss_end = ABSOLUTE(.);
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} > rtc_slow_seg
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/* This section holds data that should not be initialized at power up
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and will be retained during deep sleep. The section located in
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RTC SLOW Memory area. User data marked with RTC_NOINIT_ATTR will be placed
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into this section. See the file "esp_attr.h" for more information.
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*/
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.rtc_noinit (NOLOAD):
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{
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. = ALIGN(4);
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_rtc_noinit_start = ABSOLUTE(.);
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*(.rtc_noinit .rtc_noinit.*)
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. = ALIGN(4) ;
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_rtc_noinit_end = ABSOLUTE(.);
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} > rtc_slow_seg
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/* Send .iram0 code to iram */
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.iram0.vectors :
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{
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@ -99,7 +113,7 @@ SECTIONS
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*py/scheduler.o*(.literal .text .literal.* .text.*)
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_iram_text_end = ABSOLUTE(.);
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} > iram0_0_seg
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.dram0.data :
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{
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_data_start = ABSOLUTE(.);
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@ -125,7 +139,21 @@ SECTIONS
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INCLUDE esp32.spiram.rom-functions-dram.ld
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_data_end = ABSOLUTE(.);
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. = ALIGN(4);
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} >dram0_0_seg
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} > dram0_0_seg
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/*This section holds data that should not be initialized at power up.
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The section located in Internal SRAM memory region. The macro _NOINIT
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can be used as attribute to place data into this section.
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See the esp_attr.h file for more information.
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*/
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.noinit (NOLOAD):
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{
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. = ALIGN(4);
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_noinit_start = ABSOLUTE(.);
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*(.noinit .noinit.*)
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. = ALIGN(4) ;
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_noinit_end = ABSOLUTE(.);
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} > dram0_0_seg
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/* Shared RAM */
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.dram0.bss (NOLOAD) :
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@ -148,8 +176,9 @@ SECTIONS
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*(COMMON)
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. = ALIGN (8);
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_bss_end = ABSOLUTE(.);
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/* The heap starts right after end of this section */
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_heap_start = ABSOLUTE(.);
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} >dram0_0_seg
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} > dram0_0_seg
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.flash.rodata :
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{
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