This UART_HandleTypeDef is quite large (around 70 bytes in RAM needed for
each UART object) and is not needed: instead the state of the peripheral
held in its registers provides all the required information.
The pin alternate function information is derived from ST's datasheet
https://www.st.com/resource/en/datasheet/stm32l432kc.pdf
In the datasheet, the line 2 of AF4 includes I2C2 but actually the chip
does not have I2C2 so it is removed.
As per the machine.UART documentation, this is used to set the length of
the RX buffer. The legacy read_buf_len argument is retained for backwards
compatibility, with rxbuf overriding it if provided.
Also change the order of printing of flow so it is after stop (so bits,
parity, stop are one after the other), and reduce code size by using
mp_print_str instead of mp_printf where possible.
See issue #1981.
This is necessary for two reasons: 1) FreeRTOS still needs the TCB data
structure even after vPortCleanUpTCB has been called, so this latter hook
function cannot free the TCB, and there is no where else to safely delete
it (this behaviour has changed recently in the ESP IDF); 2) when using
external SPI RAM the uPy heap is in this external memory but the task stack
must be allocated from internal SRAM.
Fixes issue #3904.
We standardized to provide uos.remove() as a more obvious and user-friendly
name. That's what written in the docs. The Unix port implementation
predates this convention, so update it now.
Building axtls gives a lot of warnings with -Wall enabled, and explicitly
disabling all of them cannot be done in a way compatible with gcc and
clang, and likely other compilers. So just use -Wno-all to prevent all of
the extra warnings (in addition to the necessary -Wno-unused-parameter,
-Wno-uninitialized, -Wno-sign-compare and -Wno-old-style-definition).
Fixes issue #4182.
Configurable via MICROPY_MODULE_GETATTR, disabled by default. Among other
things __getattr__ for modules can help to build lazy loading / code
unloading at runtime.
Configurable via MICROPY_PY_BUILTINS_STR_COUNT. Default is enabled.
Disabled for bare-arm, minimal, unix-minimal and zephyr ports. Disabling
it saves 408 bytes on x86.
1. Return correct error code for non-blocking vs timed out socket
(POSIX returns EAGAIN for both, we want ETIMEDOUT in case of timed
out socket). To achieve this, blocking/non-blocking flag is added
to the mp_obj_socket_t, to avoid issuing fcntl() syscall each time
EAGAIN occurs. (mp_obj_socket_t used to be 8 bytes, having some room
in a standard 16-byte alloc block.)
2. Handle socket.settimeout(0) properly - in Python, that means
non-blocking mode, but SO_RCVTIMEO/SO_SNDTIMEO of 0 is infinite
timeout.
3. Overall, make sure that socket.settimeout() call switches blocking
state as expected.
Prior to this commit the USB CDC used the USB start-of-frame (SOF) IRQ to
regularly check if buffered data needed to be sent out to the USB host.
This wasted resources (CPU, power) if no data needed to be sent.
This commit changes how the USB CDC transmits buffered data:
- When new data is first available to send the data is queued immediately
on the USB IN endpoint, ready to be sent as soon as possible.
- Subsequent additions to the buffer (via usbd_cdc_try_tx()) will wait.
- When the low-level USB driver has finished sending out the data queued
in the USB IN endpoint it calls usbd_cdc_tx_ready() which immediately
queues any outstanding data, waiting for the next IN frame.
The benefits on this new approach are:
- SOF IRQ does not need to run continuously so device has a better chance
to sleep for longer, and be more responsive to other IRQs.
- Because SOF IRQ is off, current consumption is reduced by a small amount,
roughly 200uA when USB is connected (measured on PYBv1.0).
- CDC tx throughput (USB IN) on PYBv1.0 is about 2.3 faster (USB OUT is
unchanged).
- When USB is connected, Python code that is executing is slightly faster
because SOF IRQ no longer interrupts continuously.
- On F733 with USB HS, CDC tx throughput is about the same as prior to this
commit.
- On F733 with USB HS, Python code is about 5% faster because of no SOF.
As part of this refactor, the serial port should no longer echo initial
characters when the serial port is first opened (this only used to happen
rarely on USB FS, but on USB HS is was more evident).
For s132 and s140, GAP_ADV_MAX_SIZE was currently set to
BLE_GATT_ATT_MTU_DEFAULT, which is 23. The correct value
should have been 31, but there are no define for this in
the s132/s140 header files as for s110.
Updating define in ble_drv.c to the correct value of 31.
The macros are MICROPY_HEAP_START and MICROPY_HEAP_END, and if not defined
by a board then the default values will be used (maximum heap from SRAM as
defined by linker symbols).
As part of this commit the SDRAM initialisation is moved to much earlier in
main() to potentially make it available to other peripherals and avoid
re-initialisation on soft-reboot. On boards with SDRAM enabled the heap
has been set to use that.
Add some more POSIX compatibility by adding a d_type field to the
dirent structure and defining corresponding macros so listdir_next
in the unix' port modos.c can use it, end result being uos.ilistdir
now reports the file type.
This will allow to e.g. implement HTTP Digest authentication.
Adds 540 bytes for x86_32, 332 for arm_thumb2 (for Unix port, which already
includes axTLS library).
This commit adds the math.factorial function in two variants:
- squared difference, which is faster than the naive version, relatively
compact, and non-recursive;
- a mildly optimised recursive version, faster than the above one.
There are some more optimisations that could be done, but they tend to take
more code, and more storage space. The recursive version seems like a
sensible compromise.
The new function is disabled by default, and uses the non-optimised version
by default if it is enabled. The options are MICROPY_PY_MATH_FACTORIAL
and MICROPY_OPT_MATH_FACTORIAL.
Configuring clocks is a critical operation and is best to avoid when
possible. If the clocks really need to be reset to the same values then
one can pass in a slightly higher value, eg 168000001 Hz to get 168MHz.
This ensures that on first boot the most optimal settings are used for the
voltage scaling and flash latency (for F7 MCUs).
This commit also provides more fine-grained control for the flash latency
settings.
Power and clock control is low-level functionality and it makes sense to
have it in a dedicated file, at least so it can be reused by other parts of
the code.
On F7s PLLSAI is used as a 48MHz clock source if the main PLL cannot
provide such a frequency, and on L4s PLLSAI1 is always used as a clock
source for the peripherals. This commit makes sure these PLLs are
re-enabled upon waking from stop mode so the peripherals work.
See issues #4022 and #4178 (L4 specific).
Changes made:
- make use of MP_OBJ_TO_PTR and MP_OBJ_FROM_PTR where necessary
- fix shadowing of index variable i, renamed to j
- fix type of above variable to size_t to prevent comparison warning
- fix shadowing of res variable
- use "(void)" instead of "()" for functions that take no arguments
This part is functionally similar to STM32F767xx (they share a datasheet)
so support is generally comparable. When adding board support the
stm32f767_af.csv and stm32f767.ld should be used.
If DTTOIF() macro is not defined, the code refers to MP_S_IFDIR, etc.
symbols defined in extmod/vfs.h, so should include it.
This fixes build for Android.
The HAL DMA functions enable SDMMC interrupts before fully resetting the
peripheral, and this can lead to a DTIMEOUT IRQ during the initialisation
of the DMA transfer, which then clears out the DMA state and leads to the
read/write not working at all. The DTIMEOUT is there from previous SDMMC
DMA transfers, even those that succeeded, and is of duration ~180 seconds,
which is 0xffffffff / 24MHz (default DTIMER value, and clock of
peripheral).
To work around this issue, fully reset the SDMMC peripheral before calling
the HAL SD DMA functions.
Fixes issue #4110.
The flash-IRQ handler is used to flush the storage cache, ie write
outstanding block data from RAM to flash. This is triggered by a timeout,
or by a direct call to flush all storage caches.
Prior to this commit, a timeout could trigger the cache flushing to occur
during the execution of a read/write to external SPI flash storage. In
such a case the storage subsystem would break down.
SPI storage transfers are already protected against USB IRQs, so by
changing the priority of the flash IRQ to that of the USB IRQ (what is
done in this commit) the SPI transfers can be protected against any
timeouts triggering a cache flush (the cache flush would be postponed until
after the transfer finished, but note that in the case of SPI writes the
timeout is rescheduled after the transfer finishes).
The handling of internal flash sync'ing needs to be changed to directly
call flash_bdev_irq_handler() sync may be called with the IRQ priority
already raised (eg when called from a USB MSC IRQ handler).
MCUs that have a PLLSAI can use it to generate a 48MHz clock for USB, SDIO
and RNG peripherals. In such cases the SYSCLK is not restricted to values
that allow the system PLL to generate 48MHz, but can be any frequency.
This patch allows such configurability for F7 MCUs, allowing the SYSCLK to
be set in 2MHz increments via machine.freq(). PLLSAI will only be enabled
if needed, and consumes about 1mA extra. This fine grained control of
frequency is useful to get accurate SPI baudrates, for example.
A recent version of arm-none-eabi-gcc (8.2.0) will warn about unused packed
attributes in USB_WritePacket and USB_ReadPacket. This patch suppresses
such warnings for this file only.
The aim here is to have spi.c contain the low-level SPI driver which is
independent (not fully but close) of MicroPython objects and methods, and
the higher-level bindings are separated out to pyb_spi.c and machine_spi.c.
Among other things, this requires putting bootloader object files in to
their relevant .a archive, so that they can be correctly referenced by the
ESP IDF's linker script.
- Allow configuration by a board of autorefresh number and burst length.
- Increase MPU region size to 8MiB.
- Make SDRAM region cacheable and executable.
"coverage" build uses different BUILD directory comparing to the normal
build. Previously, any build picked up libaxtls.a from normal build's
directory, but that was fixed recently. So, for each build, we must
build axtls explicitly.
This fixes Travis build in particular.
Use overrideable properties instead of hardcoding the use of the
default cl executable used by msvc toolsets. This allows using
arbitrary compiler commands for qstr header generation.
The CLToolExe and CLToolPath properties are used because they are,
even though absent from any official documentation, the de-facto
standard as used by the msvc toolsets themselves.
Requesting a baudrate of X should never configure the peripheral to have a
baudrate greater than X because connected hardware may not be able to
handle higher speeds. This patch makes sure to round the prescaler up so
that the actual baudrate is rounded down.
Prior to this patch, if VBAT was read via ADC.read() or
ADCAll.read_channel(), then it would remain enabled and subsequent reads
of TEMPSENSOR or VREFINT would not work. This patch makes sure that VBAT
is disabled for all cases that it could be read.
This patch in effect renames MICROPY_DEBUG_PRINTER_DEST to
MICROPY_DEBUG_PRINTER, moving its default definition from
lib/utils/printf.c to py/mpconfig.h to make it official and documented, and
makes this macro a pointer rather than the actual mp_print_t struct. This
is done to get consistency with MICROPY_ERROR_PRINTER, and provide this
macro for use outside just lib/utils/printf.c.
Ports are updated to use the new macro name.
The NRF52 define only covers nrf52832, so update the define checks
to use NRF52_SERIES to cover both nrf52832 and nrf52840.
Fixed machine_hard_pwm_instances table in modules/machine/pwm.c
This enables PWM(0) to PWM(3), RTCounter(2), Timer(3) and Timer(4),
in addition to NFC reset cause, on nrf52840.
When waking from stop mode most of the system is still in the same state as
before entering stop, so only minimal configuration is needed to bring the
system clock back online.
A recent version of arm-none-eabi-gcc (8.2.0) will warn about unused packed
attributes in USB_WritePacket and USB_ReadPacket. This patch suppresses
such warnings for this file only.
Works with pins declared normally in mpconfigboard.h, eg. (pin_XX), as well
as (pyb_pin_XX).
Provides new mp_hal_pin_config_alt_static(pin_obj, mode, pull, fn_type)
function declared in pin_static_af.h to allow configuring pin alternate
functions by name at compile time.
This mechanism will scale to to an arbitrary number of pollable objects, so
long as they implement the MP_STREAM_GET_FILENO ioctl. Since ussl objects
pass through ioctl requests transparently to the underlying socket object,
it will allow ussl sockets to be polled. And a user object with uio.IOBase
as a base could support polling.
The code was dereferencing 0x800 and loading a value from there, trying to
use a literal value (not address) defined in the linker script
(_ram_fs_cache_block_size) which was 0x800.
Adding MICROPY_FATFS as makefile flag in order to explicitly
include oofatfs files to be compiled into the build.
The flag is set to 0 by default. Must be set in addition to
MICROPY_VFS and MICROPY_VFS_FAT in mpconfigport.h.
Temporarly solving the issue of
"differ from the size of original declaration [-Werror=lto-type-mismatch]
until linker is fixed in upcomming release of gcc.
Bug is reported by others, and will be fixed in next version of arm-gcc.
However, this patch makes it possible to use modmusic and modimage
with current compilers.
Alternativly, the code can be compiled with LTO=0, but uses valuable 9K
more on this already squeezed target (microbit).
Support added for s132/s140 v6 in linker scripts and boards.
Support removed for s132 v2/3/5.
Download script updated to fetch new stacks and removed the
non-supported ones.
ble_drv.c updated to only handle s110 v8, and s132/s140 v6.
ubluepy updated to continue scanning after each individual scan
report reported to the module to keep old behaviour of the
Scanner class.
This patch generalize the feather52 target to be a board without
an in-built Bluetooth stack or bootloader giving all flash memory to
micropython code.
This way the feather52 target can run any supported Bluetooth LE
stack the port supports for other nrf52832 targets. Hence, this
make Makefiles/linker scripts and BLE driver support easier
to maintain in the future.
Current adoption on top of nrfx only reads the GPIO->IN register.
In order to read back an output state, nrf_gpio_pin_out_read has
to be called.
This patch concatinate the two read functions such that, if
either IN or OUT register has a value 1 it will return this,
else 0.
Updating lib/nrfx submodule to latest version of master to get
the new GPIO API to read pin direction.
(nrfx: d37b16f2b894b0928395f6f56ca741287a31a244)
Cleaning up use of "pyb" module.
Moving the file to a new folder and updating the
makefile accordingly. New module created called
"board" to take over the functionality of the legacy
"pyb" module.
Updating outdated documentation referring to pyb.Pin,
to now point to machine.Pin.
As EasyDMA variant of SPI(M) might clock out an additional byte
in single byte transactions this patch moves the nrf52832 to
use SPI and not SPIM to get more stable data transactions.
Ref: nrf52832 rev2 errata v1.1, suggested workaround is:
"Use the SPI module (deprecated but still available) or
use the following workaround with SPIM ..."
Current nrfx SPIM driver does not contain this workaround,
and in the meanwhile moving back to SPI fixes the issue.
Also, tabbing the nrfx_config.h a bit to make it more readable.
This patch moves the check of SPI configuration before
including any SPI header files. As targets might disable SPI
support, current code ends up in including SPIM if not SPI
is configured. Hence, this is why the check whether the module is
enabled should be done before including headers.
dfu-gen .PHONY target is run unconditionally as first build
target when included, and might fail if the hex file is not
yet generated.
To prevent this, the dfu-gen and dfu-flash targets are moved
to the main Makefile and only exposed if feather52 is the
defined BOARD.
Update configuration define from
MICROPY_HW_HAS_BUILTIN_FLASH to MICROPY_MBFS.
MICROPY_MBFS will enable the builtin flash as
part of enabling the micro:bit FS.
Clang understands only -fshort-enums, not --short-enums. As
--short-enums isn't even mentioned in the gcc man page, I think this
alias exists more for backwards compatibility.
Removing unused nrf52832_512k_64k_s132_5.0.0.ld.
Adding new linker script s132_5.0.0 following new
linker script scheme.
Updating ble_drv.c to handle de-increment of
outstanding tx packets on hvx for s132 v5.
After nrfx 1.0.0 a new macro was introduced to do a common
hardware timeout. The macro function triggers a counter of
retries or a timeout in us. However, in many cases, like in
nrfx_adc.c the timeout value is set to 0, leading to a infinite
loop in mp_hal_delay_us. This patch prevents this from happening.
Path of error:
nrfx_adc.c -> NRFX_WAIT_FOR -> NRFX_DELAY_US -> mp_hal_delay_us.
This patch also opens up for all arguments to be set as positional
arguments such that an external user of the make_new function can set
provide all parameters as positional arguments.
machine/i2c already uses mp_hal_get_pin_obj which
points to pin_find function in order to locate correct
pin object to use.
The pin_find function was recently updated to also
being able to locate pins based on an integer value,
such that pin number can be used as argument to object
constructors.
This patch modfies and uniforms pin object lookup for
SPI, music and pwm.
Renaming config for enabling random module with hw
random number generator from MICROPY_PY_HW_RNG to
MICROPY_PY_RANDOM_HW_RNG to indicate which module it
is configuring.
Also, disabling the config by default in mpconfigport.h.
Adding the enable of RNG in all board configs.
Moving ifdef in modrandom, which test for the config being
set, earlier in the code. This is to prevent un-necessary
includes if not needed.
Increase the maximum number of queued notifications from 1 to 6. This
massively speeds up the NUS console - especially when printing large
amounts of text. The reason is that multiple transfers can be done in a
single connection event, in ideal cases 6 at a time.
This patch moves all nrf52 targets to use SPIM backend
for SPI which features EasyDMA. The main benefit of doing
this is to utilize the SPIM3 on nrf52840 which is
EasyDMA only peripheral.
This patch ads irq method to the pin object. Handlers
registered in the irq method will be kept as part of the
ROOT_POINTERS.
In order to resolve which pin object is the root of the
IRQ, the pin_find has been extended to also be able to
search up Pin objects based on mp_int_t pin number.
This also implies that the Pin.new API is now also supporting
creation of Pin objects based on the integer value of the
pin instead of old style mandating string name of the Pin.
All boards have been updated to use real pin number from
0-48 instead of pin_Pxx for UART/SPI and music module pins.
UART/SPI/modmusic has also been updated to use pin number
provided directly or look up the Pin object based on the
integer value of the pin (modmusic).
Pin generation has been updated to create a list of pins, where
the board/cpu dicts are now refering to an index in this list
instead of having one const declaration for each pin. This new
const table makes it possible to iterate through all pins generated
in order to locate the correct Pin object.
In order to be able to support GPIO1 port on nrf52840
the port has been removed from the Pin object.
All pins on port1 will now be incrementally on top of
the pin numbers for gpio0. Hence, Pin 1.00 will become
P32, and Pin 1.15 will become P47.
The modification is done to address the new gpio HAL
interface in nrfx, which resolves the port to be
configured base on a multiple of 32.
The patch also affects the existing devices which does
not have a second GPIO port in the way that the
port indication A and B is removed from Pin generation.
This means that the port which was earlier addressed
as PA0 is now P0, and PA31 is P31.
Also, this patch removes the gpio member which earlier
pointed to the perihperal GPIO base address. This is not
needed anymore, hence removed.
With all the variation in chips and boards it's tedious to copy and
redefine linker scripts for every option. Making linker scripts more
modular also opens up more possibilities, like enabling/disabling the
flash file system from the Makefile - or even defining it's size from a
Makefile argument (FS_SIZE=12 for a 12kB filesystem if tight on space).
Summarized this squashed PR replaces the hal/ folder in the port. This has been replaced the official
HAL layer from Nordic Semiconductor; https://github.com/NordicSemiconductor/nrfx.
A Git submodule has been added under lib/nrfx, for the nrfx dependency.
The drivers / modules has been updated to use this new HAL layer; nrfx at v1.0.0.
Also, header files and system files for nrf51/nrf52x chip variants has been deleted from the device/ folder, only keeping back the startup files written in C. All other files are now fetched from nrfx.
3 new header files in the ports/nrf/ folder has been added to configure nrfx (nrfx_config.h), logging (nrfx_log.h) and glue nrfx together with the drivers and modules from micropython (nrfx_glue.h).
The PR has been a joint effort from @aykevl (Ayke van Laethem) and @glennrub.
For reference, the commit log will be kept to get an overview of the changes done:
* ports/nrf: Initial commit for moving hal to Nordic Semiconductor BSD-3 licensed nrfx-hal.
* ports/nrf: Adding nrfx, Nordic Semiconductor BSD-3 hal layer, as git submodule checked out at lib/nrfx.
* ports/nrf/modules/machine/uart: Fixing bug which set hwfc to parity excluded, always resulting in no flow control, hence corrupted output. Also adding an extra loop on uart_tx_char to prevent any tx when any ongoing tx is in progress.
* ports/nrf/i2c: Moving I2C over to nrfx driver.
* ports/nrf/modules/machine/i2c: Alignment. Renaming print function param 'o' to 'self_in'
* ports/nrf/spi: Updating SPI machine module to use nrfx drivers.
* ports/nrf: Renaming modules/machine/rtc.c/.h to rtcounter.c/.h to not confuse the peripheral with Real-Time Clock:
* ports/nrf: Updating various files after renaming machine module RTC to RTCounter.
* ports/nrf: Renaming RTC to RTCounter in modmachine globals dict table. Also updating object type name to reflect new module name.
* ports/nrf: Fixing leftovers after renaming rtc to rtcounter.
* ports/nrf: Early untested adoption of nrfx_rtc in RTCounter. Untested.
* nrf/modules/machine/i2c: Improve keyword argument handling
* ports/nrf/modules/temp: Updating Temp machine module to use nrfx defined hal nrf_temp.h. Moving logic of BLE stack awareness to machine module.
* ports/nrf/boards/pca10040: Enable machine Temp module.
* nrf/modules/machine/rtcounter: Remove magic constants.
* ports/nrf: Adding base support for nrfx module logging. Adding option to disable logging of UART as it might log its own setup over UART while the peripheral is not yet set up. Logging of UART could make sense if other transport of log is used.
* ports/nrf: updating nrfx_log.h with more correct parenthisis on macro grouping.
* ports/nrf: Updating nrfx logging with configuration to disable logging of UART module. The pattern can be used to turn off other modules as well. However, for now UART is the only module locking itself by logging before the peripheral is configured. Logging is turned off by default, can be enabled in nrfx_config.h by setting NRFX_LOG_ENABLED=1.
* ports/nrf/modules/random: Updating modrandom to use nrfx hal for rng. Not using nrfx-driver for this peripheral as its blocking mode would do the trick on RNG. Moving softdevice aware code from legacy hal to modrandom.c.
* nrf: Enable Peripheral Resource Sharing.
This enables TWI and SPI to be enabled at the same time.
* nrf/Makefile: Define MCU sub variant (e.g. NRF51822/NRF51422)
* nrf: Port TIMER peripheral to nrfx HAL.
* nrf/modules/machine/uart: Optimize UART module
For a nRF51, this results in a size reduction of:
.text: -68 bytes
.data: -56 bytes
* nrf/modules/machine/uart: Don't use magic index numbers.
* nrf/modules/machine/uart: Fix off-by-one error.
For nrf51:
.text: -40 bytes
* nrf/modules/machine/rtcounter: Update for nrfx HAL.
* nrf/modules/machine/i2c: Reduce RAM consumption.
Reductions for the nrf51:
flash: -108 bytes
RAM: -72 bytes
* nrf/mpconfigport: Avoid unnecessary root pointers.
This saves 92 bytes of RAM.
* nrf: Support SoftDevice with nrfx HAL.
* nrf: Add NVMC peripheral (microbitfs) support.
There is no support yet for a SoftDevice.
It also fixes a potentially serious bug in start_index generation.
* nrf/modules/machine/spi: Optimize SPI peripheral.
nrf51:
text: -340 bytes
data: -72 bytes
nrf52:
text: -352 bytes
data: -108 bytes
* nrf/modules/random: Forgot to commit header file.
* nrf: Make nrfx_config.h universal for all boards.
* nrf: Use SoftDevice API for flash access when built for SD
* nrf/drivers/bluetooth: Remove legacy HAL driver includes.
These were not used anymore so can be removed.
* ports/nrf/microbit: Port microbit targets to nrfx HAL
Initial port of microbit modules to use nrfx HAL layer.
Tested display/image and modmusic on micro:bit to verify that
softpwm and ticker for nrf51 is working as expected.
Changing IRQ priority on timer to priority 2, as 1 might collide if
used side by side of SD110 BLE stack.
The patch reserves Timer1 peripheral compile time. This is not ideal
and should be resolved in seperate task.
* nrf/boards/microbit: Remove custom nrfx_config.h from microbit target, adding disablement of timer1 if softpwm is enabled.
* nrf/adc: Update ADC module to use nrfx
* nrf/modules/machine/pwm: Updating machine PWM module to use nrfx HAL driver.
examples/nrf52_pwm.py and examples/nrf52_servo.py tested on pca10040.
* nrf: Removing hal folder and boards nrf5x_hal_conf.h headers.
* nrf/nrfx_glue: Adding direct NVIC access for S110 BLE stack
If SoftDevice s110 has not yet been initialized, the IRQ will not be forwarded to
the application using the sd_nvic* function calls. Hence, direct access to cmsi
nvic functions are used instead if SoftDevice is not enabled.
* nrf/drivers/ticker: Setting IRQ priority 3 on Timer1
SoftDevice fails to initilize if Timer1 has been configured to priority
level 2 before enabling the SD. The timer is set to priority 1, higher than BLE
stack in order to provide better quality of music rendering when used with the
music module. This might be too high, time will show.
* nrf/examples: Updating ubluepy_temp after moving RTCounter to nrfx.
* nrf: delete duplicate files from device folder which can be located in nrfx/mdk.
* nrf/Makefile: Fetch system files from nrfx.
Testing on each device sub-variant to figure out which system file to
use. Reason for this is that nrf52.c is actually defining nrf52832.
Removing NRF_DEFINES parameter setting the device in use into the
same sub-variant test, as NRF52 is unique to nrf52832 when using nrfx.
Without this exclusion of -DNRF52 in compilation for nrf52840, the
device will be interpreted as a nrf52, hence nrf52832.
Also, changing name on variable SRC_NRF_HAL to SRC_NRFX_HAL to
explicitly tell the origin of the file.
* nrf: Updating device #ifdefs to be more open to non-nrf51 targets.
* nrf/modules/machine/uart: Removing second instance of UART for nrf52840 as it only has one non-DMA variant.
* nrf/device: Removing system files as these are now used from nrfx/mdk
* nrf: Moving startup files in device one level up as there is no need for deep hierarchy.
* nrf: Use NRF52_SERIES defined in nrfx/mdk/nrf.h as define value when testing for both nrf52(832) and nrf52840 variants.
* nrf/modules/machine/uart: Enable UART RX by default
Enable rx by default after intiialization of the peripheral.
Else, the nrfx driver will re-enable rx for each byte read
on uart REPL, clearing the EVENT_RXDRDY before second byte,
which again will make second byte get lost and read will get stuck.
This happens if the bytes are transmitted nrf(51) while still
processing the previous byte. Not seen on nrf52, but should
also become an issue at higher speeds.
This patch sets rx to always be enabled. Hence, not clearing the event
between read bytes, and it will be able to detect next byte recieved
upon finishing the first.
* nrf/modules/machine/timer: Fixing defines excluding Timer1 if ticker/softpwm is used.
* nrf: Switching import form mpconfigboard.h to mpconfigport.h in nrfx_config.h as mpconfigboard.h might define default values for defines not set by board specific header.
* nrf/modules/machine/i2c: nrfx integration fixes
Increasing speed to 400K.
Returning Address NACK's as MP error code; MP_ENODEV.
Returning MP_ETIMEOUT on all other error codes from TWI nrfx driver
except the ANACK.
Enabling and disabling the TWI peripheral before and after each transaction.
* nrf/examples: Updating ssd1306_mod.py to split framebuffer transfer into multiple chunks
* nrf/modules/machine/i2c: Return MP_EIO error if Data NACK occurs.
* nrf: Addressing review comments.
* nrf: Updating git submodule and users to nrfx v1.0.0.
* nrf/modules/machine/adc: Update adc module to follow v1.0.0 nrfx API.
* nrf/modules/machine/spi: Implement init and deinit functions
Extending SPI objects with a config member such that
configuration can be kept between new() and init().
Moving initialization done in new() to common init
function shared between the module functions.
If SPI is already configured, the SPI peripheral will
be uninitialized before initalized again.
Adding logic to handle initialization of polarity and
phase. As well, updating default speed to 1M from 500K.
* nrf/modules/machine: Removing unused nrfx includes in machine module header files
When compiling for microbit with LTO=0, a compiler error occurs due to
'ms' variable in the microbit_sleep function has not been initialized.
This patch initialize the variable to 0.
The nrf51x22_256k_16k_s110_8.0.0.ld had a stack size of only 1kB, which
is way too low. Additionally, the indicated _minimum_stack_size (set at
2kB for that chip) isn't respected.
This commit sets the heap end based on the stack size (heap end = RAM
end - stack size) making it much easier to configure.
Additionally, the stack/heap size of nrf52 chips has been set to a more
sane value of 8kB.
Leave it enabled by default on all targets.
This is only possible when using UART-over-BLE (NUS) instead of the
default hardware peripheral. The flash area saved is quite substantial
(about 2.2KB) so this is useful for custom builds that do not need UART.
Feather52 target which is using SD s132 v.2.0.1 cannot compile
due to variable containing RAM start address is not used.
This patch enables the correct sd_ble_enable variant for this SD.
Similar commit to this one:
6e56e6269f
When .text + .data oveflow available flash, the linker may not show an
error. This change makes sure .data is included in the size calculation.
This frees 128 bytes of .bss RAM on the nRF51, at the cost of possibly
more expensive GC cycles. Leave it as-is on the nRF52 as that chip has a
lot more RAM.
This is also done in the micro:bit:
a7544718a7/inc/microbit/mpconfigport.h (L6)
Damien George
boochow
roland
Paul Sokolovsky
Michael Paul Coder
Tobias Badertscher
Paul m. p. P
Eric Poulsen
iabdalkader
Danielle Madeley
Glenn Ruben Bakke
Andrew Leech
stijn
Christopher Swenson
Andrew Leech
Siarhei Farbotka
forester3
David Lechner
Ayke van Laethem
Stig Bjørlykke
Peter D. Gray