Also, re-enable calibration storage for CircuitPlayground Express.
Tested with a 500hz PWMOut on Metro M0 with Saleae:
* with crystal 500hz
* with usb 500hz +- 0.1hz
* without either 487hz += 0.1hz
SAMD51 is skipped due to DFLL errata and the fact it defaults to a
factory calibrated 48mhz that works fine for USB.
Fixes#648
This uses the crystal to clock the RTC on boards which have a crystal.
Disable clock generator 2 which was enabled in commit
8e2080411f ("atmel-samd: Add rtc module support").
samd51 differs from samd21 when it comes to the RTC clock. samd51 doesn't
have an explicit clock peripheral so no need for a clock generator.
The same commit didn't even setup XOSC32K correctly, it missed EN1K and XTALEN.
The RTC uses the 1k clock output, so enable it on the OSCULP32K even if it works without it.
Refactor the convoluted asf4 clock setup into something more readable.
enable_clock_generator() has 2 changes:
- Set 'Output enabled' to match the current clock setup
- Handle divisors above 511
Add an enable_clock_generator_sync() version which makes it possible to setup
clocks without waiting for syncing. The bootup would hang without this.
I have checked these registers:
NVMCTRL->CTRLA = 0x00000004
Peripheral clocks (only non-zero shown):
PCHCTRL[1]=0x00000045
PCHCTRL[10]=0x00000041
Generator clocks (only non-zero shown):
GENCTRL[0] = 0x00010907
GENCTRL[1] = 0x00010906
-GENCTRL[2] = 0x00041104
+GENCTRL[2] = 0x00200904
GENCTRL[4] = 0x00010907
GENCTRL[5] = 0x00180906
DFLL clock:
OSCCTRL->DFLLCTRLA = 0x00000082
OSCCTRL->DFLLCTRLB = 0x00000000
OSCCTRL->DFLLVAL = 0x00008082
OSCCTRL->DFLLMUL = 0x00000000
DPLL clocks:
OSCCTRL->Dpll[0].DPLLCTRLA=0x00000002
OSCCTRL->Dpll[0].DPLLCTRLB=0x00000000
OSCCTRL->Dpll[0].DPLLRATIO=0x0000003b
OSCCTRL->Dpll[1].DPLLCTRLA=0x00000080
OSCCTRL->Dpll[1].DPLLCTRLB=0x00000020
OSCCTRL->Dpll[1].DPLLRATIO=0x00000000
OSC32KCTRL clock:
OSC32KCTRL->RTCCTRL = 0x00000000
OSC32KCTRL->XOSC32K = 0x00002082
OSC32KCTRL->CFDCTRL = 0x00000000
OSC32KCTRL->EVCTRL = 0x00000000
OSC32KCTRL->OSCULP32K = 0x00002300
Only gen2 changed which is due to samd51 having more bits in the simple
division register so DIVSEL wasn't necessary, and it didn't have OE set.
The Wiznet5k series of chips support a MACRAW mode which allows the host to
send and receive Ethernet frames directly. This can be hooked into the
lwIP stack to provide a full "socket" implementation using this Wiznet
Ethernet device. This patch adds support for this feature.
To enable the feature one must add the following to mpconfigboard.mk, or
mpconfigport.mk:
MICROPY_PY_WIZNET5K = 5500
and the following to mpconfigboard.h, or mpconfigport.h:
#define MICROPY_PY_LWIP (1)
After wiring up the module (X5=CS, X4=RST), usage on a pyboard is:
import time, network
nic = network.WIZNET5K(pyb.SPI(1), pyb.Pin.board.X5, pyb.Pin.board.X4)
nic.active(1)
while not nic.isconnected():
time.sleep_ms(50) # needed to poll the NIC
print(nic.ifconfig())
Then use the socket module as usual.
Compared to using the built-in TCP/IP stack on the Wiznet module, some
performance is lost in MACRAW mode: with a lot of memory allocated to lwIP
buffers, lwIP gives Around 750,000 bytes/sec max TCP download, compared
with 1M/sec when using the TCP/IP stack on the Wiznet module.
It should be up to the NIC itself to decide if the network interface is
removed upon soft reset. Some NICs can keep the interface up over a soft
reset, which improves usability of the network.
Pins with multiple alt-funcs for the same peripheral (eg USART_CTS_NSS)
need to be split into individual alt-funcs for make-pins.py to work
correctly.
This patch changes the following:
- Split `..._CTS_NSS` into `..._CTS/..._NSS`
- Split `..._RTS_DE` into `..._RTS/..._DE`
- Split `JTDO_SWO` into `JTDO/TRACESWO` for consistency
- Fixed `TRACECK` to `TRACECLK` for consistency
If no block devices are defined by a board then storage support will be
disabled. This means there is no filesystem provided by either the
internal flash or external SPI flash. But the VFS system can still be
enabled and filesystems provided on external devices like an SD card.
Mboot is a custom bootloader for STM32 MCUs. It can provide a USB DFU
interface on either the FS or HS peripherals, as well as a custom I2C
bootloader interface.
These files provide no additional information, all the version and license
information is captured in the relevant files in these subdirectories.
Thanks to @JoeSc for the original patch.
This patch allows to use lwIP as the implementation of the usocket module,
instead of the existing socket-multiplexer that delegates the entire TCP/IP
layer to the NIC itself.
This is disabled by default, and enabled by defining MICROPY_PY_LWIP to 1.
When enabled, the lwIP TCP/IP stack will be included in the build with
default settings for memory usage and performance (see
lwip_inc/lwipopts.h). It is then up to a particular NIC to register itself
with lwIP using the standard lwIP netif API.
Some boards (like the uGame10) may want to have their own set of extra
modules. This change lets them override EXTRA_BUILTIN_MODULES in their
mpconfigboard.h and makes the ugame10 board do that.
This patch makes it so that UART(0) can by dynamically attached to and
detached from the REPL by using the uos.dupterm function. Since WebREPL
uses dupterm slot 0 the UART uses dupterm slot 1 (a slot which is newly
introduced by this patch). UART(0) must now be attached manually in
boot.py (or otherwise) and inisetup.py is changed to provide code to do
this. For example, to attach use:
import uos, machine
uart = machine.UART(0, 115200)
uos.dupterm(uart, 1)
and to detach use:
uos.dupterm(None, 1)
When attached, all incoming chars on UART(0) go straight to stdin so
uart.read() will always return None. Use sys.stdin.read() if it's needed
to read characters from the UART(0) while it's also used for the REPL (or
detach, read, then reattach). When detached the UART(0) can be used for
other purposes.
If there are no objects in any of the dupterm slots when the REPL is
started (on hard or soft reset) then UART(0) is automatically attached.
Without this, the only way to recover a board without a REPL would be to
completely erase and reflash (which would install the default boot.py which
attaches the REPL).
Add CONFIG_NET_DHCPV4, which, after
https://github.com/zephyrproject-rtos/zephyr/pull/5750 works as follows:
static addresses are configured after boot, and DHCP requests are sent
at the same time. If valid DHCP reply is received, it overrides static
addresses.
This setup works out of the box for both direct connection to a
workstation (DHCP server usually is not available) and for connection
to a router (DHCP is available and required).
define CIRCUITPY_BOOT_OUTPUT_FILE will cause mp_hal_stdout_tx_strn() to
invoke before serial_init() is called. Solution is skipped output to
serial if it is not inited.
This patch adds the configuration MICROPY_HW_USB_ENABLE_CDC2 which enables
a new USB device configuration at runtime: VCP+VCP+MSC. It will give two
independent VCP interfaces available via pyb.USB_VCP(0) and pyb.USB_VCP(1).
The first one is the usual one and has the REPL on it. The second one is
available for general use.
This configuration is disabled by default because if the mode is not used
then it takes up about 2200 bytes of RAM. Also, F4 MCUs can't support this
mode on their USB FS peripheral (eg PYBv1.x) because they don't have enough
endpoints. The USB HS peripheral of an F4 supports it, as well as both the
USB FS and USB HS peripherals of F7 MCUs.
The documentation (including the examples) for elapsed_millis and
elapsed_micros can be found in docs/library/pyb.rst so doesn't need to be
written in full in the source code.
When disabled, the pyb.I2C class saves around 8k of code space and 172
bytes of RAM. The same functionality is now available in machine.I2C
(for F4 and F7 MCUs).
It is still enabled by default.
This driver uses low-level register access to control the I2C peripheral
(ie it doesn't rely on the ST HAL) and provides the same C-level API as the
existing F7 hardware driver.
- Updated supported git hash to current IDF version.
- Added missing targets and includes to Makefile.
- Updated error codes for networking module.
- Added required constant to sdkconfig configuration.
These modules would be very handy to have in order to implement a
more robust replacement for ampy. It costs around 2KiB of text and
no data or bss.
'binascii' has base64 encoding, which can be used to create a fully
8-bit-clean transport above the slightly cooked serial connection of
these boards.
'hashlib' is a bit less critical, but I have found it handy to
be able to robustly checksum remote files.
I see this as only being useful on ports which don't have USB block
device support, so atmel-samd doesn't need it. These modules are
already on esp8266 so I think nrf52 seems like the only one that
needs it.
this renames symbols in modutime.c so that it no longer conflicts with
the time module. This commit does not enable the utime module; it
simply makes it easier for a local developer to do so.
Make clock setup explicit instead of using the convoluted asf4 macro setup.
enable_clock_generator():
- Add GCLK_GENCTRL_OE to stick with the current setup.
- Handle divisor larger than 31 for generator 2
- Change the source argument so it can take the GCLK_GENCTRL_SRC_XXXX_Val
macros without casting to uint8_t.
This patch should not introduce any functional changes except keeping
GCLK_GENCTRL_OE enabled when the I2S clock is enabled.
On this 32-bit arch there's no need to use the long version of the format
specifier. It's only there to appease the compiler which checks the type
of the args passed to printf. Removing the "l" saves a bit of code space.
in recent circuitpython builds, `ubinascii` is available as
`binascii`. This modifies `modules/inisetup.py` to use the same
import semantics as `modules/websocket_helper.py`: first try importing
`ubinascii`, and if that fails, fall back to importing `binascii`.
Closesadafruit/circuitpython#795
This commit replaces the literal calls to `esptool.py` with the
`$(ESPTOOL)` Makefile variable. This allows one to set the esptool
invocation on the Make command line:
make ESPTOOL="python2 $(which esptool.py)"
(or via the environment, an include file, etc)
Closes#793
If a socket is cleanly shut down by the peer then reads on this socket
should continue to return zero bytes. The lwIP socket API does not have
this behaviour (it only returns zero once, then blocks on subsequent calls)
so this patch adds explicit checks and logic for peer closed sockets.
Add --init to the submodule update example, thus, all submodules get
initialised including the nested (--recursive) ones. Without it there
might not be a submodule init.
Disabling this saves around 6000 bytes of code space and gets the 512k
build fitting in the available flash again (it increased lately due to an
increase in the size of the ESP8266 SDK).
For a given IRQn (eg UART) there's no need to carry around both a PRI and
SUBPRI value (eg IRQ_PRI_UART, IRQ_SUBPRI_UART). Instead, the IRQ_PRI_UART
value has been changed in this patch to be the encoded hardware value,
using NVIC_EncodePriority. This way the NVIC_SetPriority function can be
used directly, instead of going through HAL_NVIC_SetPriority which must do
extra processing to encode the PRI+SUBPRI.
For a priority grouping of 4 (4 bits for preempt priority, 0 bits for the
sub-priority), which is used in the stm32 port, the IRQ_PRI_xxx constants
remain unchanged in their value.
This patch also "fixes" the use of raise_irq_pri() which should be passed
the encoded value (but as mentioned above the unencoded value is the same
as the encoded value for priority grouping 4, so there was no bug from this
error).
The problem is the existing code which tries to optimise the
reinitialisation of the DMA breaks the abstraction of the HAL. For the
STM32L4 the HAL's DMA setup code maintains two private vars (ChannelIndex,
DmaBaseAddress) and updates a hardware register (CCR).
In HAL_DMA_Init(), the CCR is updated to set the direction of the DMA.
This is a problem because, when using the SD Card interface, the same DMA
channel is used in both directions, so the direction bit in the CCR must
follow that.
A quick and effective fix for the L4 is to simply call HAL_DMA_DeInit() and
HAL_DMA_Init() every time.
I2SOut.
The API is almost the same except the frequency attribute has been
renamed to sample_rate so that its less likely to be confused with
frequencies within the audio itself.
Fixes#263.
ADC3 is used because the H7's internal ADC channels are connected to ADC3
and the uPy driver doesn't support more than one ADC.
Only 12-bit resolution is supported because 12 is hard-coded and 14/16 bits
are not recommended on some ADC3 pins (see errata).
Values from internal ADC channels are known to give wrong values at
present.
The esp8266 uses modlwip.c for its usocket implementation, which allows to
easily support callbacks on socket events (like when a socket becomes ready
for reading). This is not as easy to do for the esp32 which uses the
ESP-IDF-provided lwIP POSIX socket API. Socket events are needed to get
WebREPL working, and this patch provides a way for such events to work by
explicitly polling registered sockets for readability, and then calling the
associated callback if the socket is readable.
After calling HAL_SYSTICK_Config the SysTick IRQ priority is set to 15, the
lowest priority. This commit reconfigures the IRQ priority to the desired
TICK_INT_PRIORITY value.
By default the stm module is included in the build, but a board can now
define MICROPY_PY_STM to 0 to not include this module. This reduces the
firmware by about 7k.
