stm32: Enable UART7/8 on F4 series that have these peripherals.

This commit is contained in:
Ryan Shaw 2018-05-15 12:46:58 +10:00 committed by Damien George
parent cdaace1fdf
commit b9ff46f1ed
4 changed files with 20 additions and 8 deletions

View File

@ -241,6 +241,8 @@ g_pfnVectors:
.word 0 /* CRYP crypto */
.word HASH_RNG_IRQHandler /* Hash and Rng */
.word FPU_IRQHandler /* FPU */
.word UART7_IRQHandler /* UART7 */
.word UART8_IRQHandler /* UART8 */
/*******************************************************************************
*
@ -519,4 +521,10 @@ g_pfnVectors:
.weak FPU_IRQHandler
.thumb_set FPU_IRQHandler,Default_Handler
.weak UART7_IRQHandler
.thumb_set UART7_IRQHandler,Default_Handler
.weak UART8_IRQHandler
.thumb_set UART8_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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@ -64,15 +64,15 @@ PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS,,,,,FMC_A17,,,EVENTOUT,
PortD,PD13,,,TIM4_CH2,,,,,,,,,,FMC_A18,,,EVENTOUT,
PortD,PD14,,,TIM4_CH3,,,,,,,,,,FMC_D0,,,EVENTOUT,
PortD,PD15,,,TIM4_CH4,,,,,,,,,,FMC_D1,,,EVENTOUT,
PortE,PE0,,,TIM4_ETR,,,,,,UART8_Rx,,,,FMC_NBL0,DCMI_D2,,EVENTOUT,
PortE,PE1,,,,,,,,,UART8_Tx,,,,FMC_NBL1,DCMI_D3,,EVENTOUT,
PortE,PE0,,,TIM4_ETR,,,,,,UART8_RX,,,,FMC_NBL0,DCMI_D2,,EVENTOUT,
PortE,PE1,,,,,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT,
PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT,
PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT,
PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT,
PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT,
PortE,PE6,TRACED3,,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT,
PortE,PE7,,TIM1_ETR,,,,,,,UART7_Rx,,,,FMC_D4,,,EVENTOUT,
PortE,PE8,,TIM1_CH1N,,,,,,,UART7_Tx,,,,FMC_D5,,,EVENTOUT,
PortE,PE7,,TIM1_ETR,,,,,,,UART7_RX,,,,FMC_D4,,,EVENTOUT,
PortE,PE8,,TIM1_CH1N,,,,,,,UART7_TX,,,,FMC_D5,,,EVENTOUT,
PortE,PE9,,TIM1_CH1,,,,,,,,,,,FMC_D6,,,EVENTOUT,
PortE,PE10,,TIM1_CH2N,,,,,,,,,,,FMC_D7,,,EVENTOUT,
PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,SPI3_NSS,,,,,,FMC_D8,,LCD_G3,EVENTOUT,
@ -86,8 +86,8 @@ PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,
PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT,ADC3_IN9
PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT,ADC3_IN14
PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT,ADC3_IN15
PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_Rx,,,,FMC_NIORD,,,EVENTOUT,ADC3_IN4
PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_Tx,,,,FMC_NREG,,,EVENTOUT,ADC3_IN5
PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,,,,FMC_NIORD,,,EVENTOUT,ADC3_IN4
PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,,,,FMC_NREG,,,EVENTOUT,ADC3_IN5
PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,,TIM13_CH1,,,FMC_NIOWR,,,EVENTOUT,ADC3_IN6
PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,,TIM14_CH1,,,FMC_CD,,,EVENTOUT,ADC3_IN7
PortF,PF10,,,,,,,,,,,,,FMC_INTR,DCMI_D11,LCD_DE,EVENTOUT,ADC3_IN8

1 Port AF0 AF1 AF2 AF3 AF4 AF5 AF6 AF7 AF8 AF9 AF10 AF11 AF12 AF13 AF14 AF15
64 PortD PD13 TIM4_CH2 FMC_A18 EVENTOUT
65 PortD PD14 TIM4_CH3 FMC_D0 EVENTOUT
66 PortD PD15 TIM4_CH4 FMC_D1 EVENTOUT
67 PortE PE0 TIM4_ETR UART8_Rx UART8_RX FMC_NBL0 DCMI_D2 EVENTOUT
68 PortE PE1 UART8_Tx UART8_TX FMC_NBL1 DCMI_D3 EVENTOUT
69 PortE PE2 TRACECLK SPI4_SCK SAI1_MCLK_A ETH_MII_TXD3 FMC_A23 EVENTOUT
70 PortE PE3 TRACED0 SAI1_SD_B FMC_A19 EVENTOUT
71 PortE PE4 TRACED1 SPI4_NSS SAI1_FS_A FMC_A20 DCMI_D4 LCD_B0 EVENTOUT
72 PortE PE5 TRACED2 TIM9_CH1 SPI4_MISO SAI1_SCK_A FMC_A21 DCMI_D6 LCD_G0 EVENTOUT
73 PortE PE6 TRACED3 TIM9_CH2 SPI4_MOSI SAI1_SD_A FMC_A22 DCMI_D7 LCD_G1 EVENTOUT
74 PortE PE7 TIM1_ETR UART7_Rx UART7_RX FMC_D4 EVENTOUT
75 PortE PE8 TIM1_CH1N UART7_Tx UART7_TX FMC_D5 EVENTOUT
76 PortE PE9 TIM1_CH1 FMC_D6 EVENTOUT
77 PortE PE10 TIM1_CH2N FMC_D7 EVENTOUT
78 PortE PE11 TIM1_CH2 SPI4_NSS SPI3_NSS FMC_D8 LCD_G3 EVENTOUT
86 PortF PF3 FMC_A3 EVENTOUT ADC3_IN9
87 PortF PF4 FMC_A4 EVENTOUT ADC3_IN14
88 PortF PF5 FMC_A5 EVENTOUT ADC3_IN15
89 PortF PF6 TIM10_CH1 SPI5_NSS SAI1_SD_B UART7_Rx UART7_RX FMC_NIORD EVENTOUT ADC3_IN4
90 PortF PF7 TIM11_CH1 SPI5_SCK SAI1_MCLK_B UART7_Tx UART7_TX FMC_NREG EVENTOUT ADC3_IN5
91 PortF PF8 SPI5_MISO SAI1_SCK_B TIM13_CH1 FMC_NIOWR EVENTOUT ADC3_IN6
92 PortF PF9 SPI5_MOSI SAI1_FS_B TIM14_CH1 FMC_CD EVENTOUT ADC3_IN7
93 PortF PF10 FMC_INTR DCMI_D11 LCD_DE EVENTOUT ADC3_IN8

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@ -116,7 +116,11 @@
#define MP_HAL_UNIQUE_ID_ADDRESS (0x1fff7a10)
#define PYB_EXTI_NUM_VECTORS (23)
#define MICROPY_HW_MAX_TIMER (14)
#ifdef UART8
#define MICROPY_HW_MAX_UART (8)
#else
#define MICROPY_HW_MAX_UART (6)
#endif
// Configuration for STM32F7 series
#elif defined(STM32F7)

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@ -720,7 +720,7 @@ void USART6_IRQHandler(void) {
IRQ_EXIT(USART6_IRQn);
}
#if defined(MICROPY_HW_UART7_TX)
#if defined(UART8)
void UART7_IRQHandler(void) {
IRQ_ENTER(UART7_IRQn);
uart_irq_handler(7);
@ -728,7 +728,7 @@ void UART7_IRQHandler(void) {
}
#endif
#if defined(MICROPY_HW_UART8_TX)
#if defined(UART8)
void UART8_IRQHandler(void) {
IRQ_ENTER(UART8_IRQn);
uart_irq_handler(8);