2014-05-03 18:27:38 -04:00
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/*
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2017-06-30 03:22:17 -04:00
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* This file is part of the MicroPython project, http://micropython.org/
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2014-05-03 18:27:38 -04:00
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2014-04-19 19:16:30 -04:00
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#include <stdio.h>
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#include <string.h>
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2015-01-01 16:06:20 -05:00
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#include "py/runtime.h"
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2015-10-30 19:03:58 -04:00
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#include "py/mphal.h"
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2016-09-01 02:37:15 -04:00
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#include "extmod/machine_spi.h"
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2014-12-02 18:41:30 -05:00
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#include "irq.h"
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2014-04-19 19:16:30 -04:00
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#include "pin.h"
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2014-04-20 19:10:04 -04:00
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#include "bufhelper.h"
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2014-04-19 19:16:30 -04:00
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#include "spi.h"
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2014-04-29 17:55:34 -04:00
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/// \moduleref pyb
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/// \class SPI - a master-driven serial protocol
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///
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/// SPI is a serial protocol that is driven by a master. At the physical level
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/// there are 3 lines: SCK, MOSI, MISO.
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///
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/// See usage model of I2C; SPI is very similar. Main difference is
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/// parameters to init the SPI bus:
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///
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/// from pyb import SPI
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2014-10-26 09:54:31 -04:00
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/// spi = SPI(1, SPI.MASTER, baudrate=600000, polarity=1, phase=0, crc=0x7)
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2014-04-29 17:55:34 -04:00
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///
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/// Only required parameter is mode, SPI.MASTER or SPI.SLAVE. Polarity can be
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2014-10-26 09:54:31 -04:00
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/// 0 or 1, and is the level the idle clock line sits at. Phase can be 0 or 1
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/// to sample data on the first or second clock edge respectively. Crc can be
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/// None for no CRC, or a polynomial specifier.
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2014-04-29 17:55:34 -04:00
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///
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/// Additional method for SPI:
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///
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/// data = spi.send_recv(b'1234') # send 4 bytes and receive 4 bytes
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/// buf = bytearray(4)
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/// spi.send_recv(b'1234', buf) # send 4 bytes and receive 4 into buf
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/// spi.send_recv(buf, buf) # send/recv 4 bytes from/to buf
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2014-04-20 20:59:43 -04:00
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2015-06-10 08:06:48 -04:00
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// Possible DMA configurations for SPI busses:
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// SPI1_TX: DMA2_Stream3.CHANNEL_3 or DMA2_Stream5.CHANNEL_3
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// SPI1_RX: DMA2_Stream0.CHANNEL_3 or DMA2_Stream2.CHANNEL_3
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// SPI2_TX: DMA1_Stream4.CHANNEL_0
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// SPI2_RX: DMA1_Stream3.CHANNEL_0
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// SPI3_TX: DMA1_Stream5.CHANNEL_0 or DMA1_Stream7.CHANNEL_0
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// SPI3_RX: DMA1_Stream0.CHANNEL_0 or DMA1_Stream2.CHANNEL_0
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2015-12-08 09:41:47 -05:00
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// SPI4_TX: DMA2_Stream4.CHANNEL_5 or DMA2_Stream1.CHANNEL_4
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// SPI4_RX: DMA2_Stream3.CHANNEL_5 or DMA2_Stream0.CHANNEL_4
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// SPI5_TX: DMA2_Stream4.CHANNEL_2 or DMA2_Stream6.CHANNEL_7
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// SPI5_RX: DMA2_Stream3.CHANNEL_2 or DMA2_Stream5.CHANNEL_7
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// SPI6_TX: DMA2_Stream5.CHANNEL_1
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// SPI6_RX: DMA2_Stream6.CHANNEL_1
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2015-06-10 08:06:48 -04:00
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2015-12-12 10:02:02 -05:00
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#if defined(MICROPY_HW_SPI1_SCK)
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2014-04-19 19:16:30 -04:00
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SPI_HandleTypeDef SPIHandle1 = {.Instance = NULL};
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2014-04-20 14:06:15 -04:00
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#endif
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2015-12-12 10:02:02 -05:00
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#if defined(MICROPY_HW_SPI2_SCK)
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2014-04-19 19:16:30 -04:00
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SPI_HandleTypeDef SPIHandle2 = {.Instance = NULL};
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2015-01-16 00:45:21 -05:00
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#endif
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2015-12-12 10:02:02 -05:00
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#if defined(MICROPY_HW_SPI3_SCK)
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2014-04-19 19:16:30 -04:00
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SPI_HandleTypeDef SPIHandle3 = {.Instance = NULL};
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2014-04-20 14:06:15 -04:00
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#endif
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2015-12-08 09:41:47 -05:00
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#if defined(MICROPY_HW_SPI4_SCK)
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SPI_HandleTypeDef SPIHandle4 = {.Instance = NULL};
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#endif
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#if defined(MICROPY_HW_SPI5_SCK)
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SPI_HandleTypeDef SPIHandle5 = {.Instance = NULL};
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#endif
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#if defined(MICROPY_HW_SPI6_SCK)
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SPI_HandleTypeDef SPIHandle6 = {.Instance = NULL};
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#endif
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2014-04-19 19:16:30 -04:00
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2018-02-04 21:44:31 -05:00
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const spi_t spi_obj[6] = {
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2015-12-12 10:02:02 -05:00
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#if defined(MICROPY_HW_SPI1_SCK)
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2018-02-04 21:44:31 -05:00
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{&SPIHandle1, &dma_SPI_1_TX, &dma_SPI_1_RX},
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2015-12-12 10:02:02 -05:00
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#else
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2018-02-04 21:44:31 -05:00
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{NULL, NULL, NULL},
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2015-12-12 10:02:02 -05:00
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#endif
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#if defined(MICROPY_HW_SPI2_SCK)
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2018-02-04 21:44:31 -05:00
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{&SPIHandle2, &dma_SPI_2_TX, &dma_SPI_2_RX},
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2015-12-12 10:02:02 -05:00
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#else
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2018-02-04 21:44:31 -05:00
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{NULL, NULL, NULL},
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2015-12-12 10:02:02 -05:00
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#endif
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#if defined(MICROPY_HW_SPI3_SCK)
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2018-02-04 21:44:31 -05:00
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{&SPIHandle3, &dma_SPI_3_TX, &dma_SPI_3_RX},
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2015-12-12 10:02:02 -05:00
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#else
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2018-02-04 21:44:31 -05:00
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{NULL, NULL, NULL},
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2015-12-12 10:02:02 -05:00
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#endif
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2015-12-08 09:41:47 -05:00
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#if defined(MICROPY_HW_SPI4_SCK)
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2018-02-04 21:44:31 -05:00
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{&SPIHandle4, &dma_SPI_4_TX, &dma_SPI_4_RX},
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2015-12-08 09:41:47 -05:00
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#else
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2018-02-04 21:44:31 -05:00
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{NULL, NULL, NULL},
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2015-12-08 09:41:47 -05:00
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#endif
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#if defined(MICROPY_HW_SPI5_SCK)
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2018-02-04 21:44:31 -05:00
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{&SPIHandle5, &dma_SPI_5_TX, &dma_SPI_5_RX},
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2015-12-08 09:41:47 -05:00
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#else
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2018-02-04 21:44:31 -05:00
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{NULL, NULL, NULL},
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2015-12-08 09:41:47 -05:00
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#endif
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#if defined(MICROPY_HW_SPI6_SCK)
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2018-02-04 21:44:31 -05:00
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{&SPIHandle6, &dma_SPI_6_TX, &dma_SPI_6_RX},
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2015-12-08 09:41:47 -05:00
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#else
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2018-02-04 21:44:31 -05:00
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{NULL, NULL, NULL},
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2015-12-08 09:41:47 -05:00
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#endif
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2015-06-10 08:06:48 -04:00
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};
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2014-12-02 18:41:30 -05:00
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2014-04-19 19:16:30 -04:00
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void spi_init0(void) {
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2018-02-02 03:01:11 -05:00
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// Initialise the SPI handles.
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// The structs live on the BSS so all other fields will be zero after a reset.
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2015-12-12 10:02:02 -05:00
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#if defined(MICROPY_HW_SPI1_SCK)
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2014-04-19 19:16:30 -04:00
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SPIHandle1.Instance = SPI1;
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2015-12-12 10:02:02 -05:00
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#endif
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#if defined(MICROPY_HW_SPI2_SCK)
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2014-04-19 19:16:30 -04:00
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SPIHandle2.Instance = SPI2;
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2015-12-12 10:02:02 -05:00
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#endif
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#if defined(MICROPY_HW_SPI3_SCK)
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2014-04-19 19:16:30 -04:00
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SPIHandle3.Instance = SPI3;
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2015-12-12 10:02:02 -05:00
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#endif
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2015-12-08 09:41:47 -05:00
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#if defined(MICROPY_HW_SPI4_SCK)
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SPIHandle4.Instance = SPI4;
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#endif
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#if defined(MICROPY_HW_SPI5_SCK)
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SPIHandle5.Instance = SPI5;
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#endif
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#if defined(MICROPY_HW_SPI6_SCK)
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SPIHandle6.Instance = SPI6;
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#endif
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2014-04-19 19:16:30 -04:00
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}
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2016-10-03 01:45:46 -04:00
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STATIC int spi_find(mp_obj_t id) {
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if (MP_OBJ_IS_STR(id)) {
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// given a string id
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const char *port = mp_obj_str_get_str(id);
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if (0) {
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#ifdef MICROPY_HW_SPI1_NAME
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} else if (strcmp(port, MICROPY_HW_SPI1_NAME) == 0) {
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return 1;
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#endif
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#ifdef MICROPY_HW_SPI2_NAME
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} else if (strcmp(port, MICROPY_HW_SPI2_NAME) == 0) {
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return 2;
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#endif
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#ifdef MICROPY_HW_SPI3_NAME
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} else if (strcmp(port, MICROPY_HW_SPI3_NAME) == 0) {
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return 3;
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#endif
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2018-02-02 01:44:05 -05:00
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#ifdef MICROPY_HW_SPI4_NAME
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} else if (strcmp(port, MICROPY_HW_SPI4_NAME) == 0) {
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return 4;
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#endif
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#ifdef MICROPY_HW_SPI5_NAME
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} else if (strcmp(port, MICROPY_HW_SPI5_NAME) == 0) {
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return 5;
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#endif
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#ifdef MICROPY_HW_SPI6_NAME
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} else if (strcmp(port, MICROPY_HW_SPI6_NAME) == 0) {
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return 6;
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#endif
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2016-10-03 01:45:46 -04:00
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}
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nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError,
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2017-06-14 22:02:14 -04:00
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"SPI(%s) doesn't exist", port));
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2016-10-03 01:45:46 -04:00
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} else {
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// given an integer id
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int spi_id = mp_obj_get_int(id);
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2018-02-04 21:44:31 -05:00
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if (spi_id >= 1 && spi_id <= MP_ARRAY_SIZE(spi_obj)
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&& spi_obj[spi_id - 1].spi != NULL) {
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2016-10-03 01:45:46 -04:00
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return spi_id;
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}
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nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError,
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2017-06-14 22:02:14 -04:00
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"SPI(%d) doesn't exist", spi_id));
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2016-10-03 01:45:46 -04:00
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}
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}
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// sets the parameters in the SPI_InitTypeDef struct
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// if an argument is -1 then the corresponding parameter is not changed
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2018-02-04 21:44:31 -05:00
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STATIC void spi_set_params(const spi_t *spi_obj, uint32_t prescale, int32_t baudrate,
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2016-10-03 01:45:46 -04:00
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int32_t polarity, int32_t phase, int32_t bits, int32_t firstbit) {
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2018-02-04 21:44:31 -05:00
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SPI_HandleTypeDef *spi = spi_obj->spi;
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2016-10-03 01:45:46 -04:00
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SPI_InitTypeDef *init = &spi->Init;
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if (prescale != 0xffffffff || baudrate != -1) {
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if (prescale == 0xffffffff) {
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// prescaler not given, so select one that yields at most the requested baudrate
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mp_uint_t spi_clock;
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2018-05-28 04:10:53 -04:00
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#if defined(STM32F0)
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spi_clock = HAL_RCC_GetPCLK1Freq();
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#else
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2016-10-03 01:45:46 -04:00
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if (spi->Instance == SPI2 || spi->Instance == SPI3) {
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// SPI2 and SPI3 are on APB1
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spi_clock = HAL_RCC_GetPCLK1Freq();
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} else {
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// SPI1, SPI4, SPI5 and SPI6 are on APB2
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spi_clock = HAL_RCC_GetPCLK2Freq();
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}
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2018-05-28 04:10:53 -04:00
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#endif
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2018-08-10 02:39:47 -04:00
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prescale = (spi_clock + baudrate - 1) / baudrate;
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2016-10-03 01:45:46 -04:00
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}
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if (prescale <= 2) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; }
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else if (prescale <= 4) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; }
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else if (prescale <= 8) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; }
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else if (prescale <= 16) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; }
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else if (prescale <= 32) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; }
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else if (prescale <= 64) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; }
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else if (prescale <= 128) { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128; }
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else { init->BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; }
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}
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if (polarity != -1) {
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init->CLKPolarity = polarity == 0 ? SPI_POLARITY_LOW : SPI_POLARITY_HIGH;
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}
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if (phase != -1) {
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init->CLKPhase = phase == 0 ? SPI_PHASE_1EDGE : SPI_PHASE_2EDGE;
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}
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if (bits != -1) {
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init->DataSize = (bits == 16) ? SPI_DATASIZE_16BIT : SPI_DATASIZE_8BIT;
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}
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if (firstbit != -1) {
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init->FirstBit = firstbit;
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}
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}
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2014-04-19 19:16:30 -04:00
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// TODO allow to take a list of pins to use
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2018-02-04 21:44:31 -05:00
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void spi_init(const spi_t *self, bool enable_nss_pin) {
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SPI_HandleTypeDef *spi = self->spi;
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2017-12-20 10:39:30 -05:00
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const pin_obj_t *pins[4] = { NULL, NULL, NULL, NULL };
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2015-06-10 08:06:48 -04:00
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2014-04-20 14:06:15 -04:00
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if (0) {
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2015-12-12 10:02:02 -05:00
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#if defined(MICROPY_HW_SPI1_SCK)
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2014-04-20 14:06:15 -04:00
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} else if (spi->Instance == SPI1) {
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2016-07-15 19:44:26 -04:00
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#if defined(MICROPY_HW_SPI1_NSS)
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2018-03-28 01:13:21 -04:00
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pins[0] = MICROPY_HW_SPI1_NSS;
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2016-07-15 19:44:26 -04:00
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#endif
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2018-03-28 01:13:21 -04:00
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pins[1] = MICROPY_HW_SPI1_SCK;
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2017-12-20 10:39:30 -05:00
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#if defined(MICROPY_HW_SPI1_MISO)
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2018-03-28 01:13:21 -04:00
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pins[2] = MICROPY_HW_SPI1_MISO;
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2017-12-20 10:39:30 -05:00
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#endif
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[3] = MICROPY_HW_SPI1_MOSI;
|
2014-04-20 14:06:15 -04:00
|
|
|
// enable the SPI clock
|
2018-02-12 23:53:08 -05:00
|
|
|
__HAL_RCC_SPI1_CLK_ENABLE();
|
2015-12-12 10:02:02 -05:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI2_SCK)
|
2014-04-20 14:06:15 -04:00
|
|
|
} else if (spi->Instance == SPI2) {
|
2016-07-15 19:44:26 -04:00
|
|
|
#if defined(MICROPY_HW_SPI2_NSS)
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[0] = MICROPY_HW_SPI2_NSS;
|
2016-07-15 19:44:26 -04:00
|
|
|
#endif
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[1] = MICROPY_HW_SPI2_SCK;
|
2017-12-20 10:39:30 -05:00
|
|
|
#if defined(MICROPY_HW_SPI2_MISO)
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[2] = MICROPY_HW_SPI2_MISO;
|
2017-12-20 10:39:30 -05:00
|
|
|
#endif
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[3] = MICROPY_HW_SPI2_MOSI;
|
2014-04-20 14:06:15 -04:00
|
|
|
// enable the SPI clock
|
2018-02-12 23:53:08 -05:00
|
|
|
__HAL_RCC_SPI2_CLK_ENABLE();
|
2015-12-12 10:02:02 -05:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI3_SCK)
|
2014-04-20 14:06:15 -04:00
|
|
|
} else if (spi->Instance == SPI3) {
|
2016-07-15 19:44:26 -04:00
|
|
|
#if defined(MICROPY_HW_SPI3_NSS)
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[0] = MICROPY_HW_SPI3_NSS;
|
2016-07-15 19:44:26 -04:00
|
|
|
#endif
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[1] = MICROPY_HW_SPI3_SCK;
|
2017-12-20 10:39:30 -05:00
|
|
|
#if defined(MICROPY_HW_SPI3_MISO)
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[2] = MICROPY_HW_SPI3_MISO;
|
2017-12-20 10:39:30 -05:00
|
|
|
#endif
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[3] = MICROPY_HW_SPI3_MOSI;
|
2014-04-20 14:06:15 -04:00
|
|
|
// enable the SPI clock
|
2018-02-12 23:53:08 -05:00
|
|
|
__HAL_RCC_SPI3_CLK_ENABLE();
|
2015-12-12 10:02:02 -05:00
|
|
|
#endif
|
2015-12-08 09:41:47 -05:00
|
|
|
#if defined(MICROPY_HW_SPI4_SCK)
|
|
|
|
} else if (spi->Instance == SPI4) {
|
2016-07-15 19:44:26 -04:00
|
|
|
#if defined(MICROPY_HW_SPI4_NSS)
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[0] = MICROPY_HW_SPI4_NSS;
|
2016-07-15 19:44:26 -04:00
|
|
|
#endif
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[1] = MICROPY_HW_SPI4_SCK;
|
2017-12-20 10:39:30 -05:00
|
|
|
#if defined(MICROPY_HW_SPI4_MISO)
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[2] = MICROPY_HW_SPI4_MISO;
|
2017-12-20 10:39:30 -05:00
|
|
|
#endif
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[3] = MICROPY_HW_SPI4_MOSI;
|
2015-12-08 09:41:47 -05:00
|
|
|
// enable the SPI clock
|
2018-02-12 23:53:08 -05:00
|
|
|
__HAL_RCC_SPI4_CLK_ENABLE();
|
2015-12-08 09:41:47 -05:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI5_SCK)
|
|
|
|
} else if (spi->Instance == SPI5) {
|
2016-07-15 19:44:26 -04:00
|
|
|
#if defined(MICROPY_HW_SPI5_NSS)
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[0] = MICROPY_HW_SPI5_NSS;
|
2016-07-15 19:44:26 -04:00
|
|
|
#endif
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[1] = MICROPY_HW_SPI5_SCK;
|
2017-12-20 10:39:30 -05:00
|
|
|
#if defined(MICROPY_HW_SPI5_MISO)
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[2] = MICROPY_HW_SPI5_MISO;
|
2017-12-20 10:39:30 -05:00
|
|
|
#endif
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[3] = MICROPY_HW_SPI5_MOSI;
|
2015-12-08 09:41:47 -05:00
|
|
|
// enable the SPI clock
|
2018-02-12 23:53:08 -05:00
|
|
|
__HAL_RCC_SPI5_CLK_ENABLE();
|
2015-12-08 09:41:47 -05:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI6_SCK)
|
|
|
|
} else if (spi->Instance == SPI6) {
|
2016-07-15 19:44:26 -04:00
|
|
|
#if defined(MICROPY_HW_SPI6_NSS)
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[0] = MICROPY_HW_SPI6_NSS;
|
2016-07-15 19:44:26 -04:00
|
|
|
#endif
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[1] = MICROPY_HW_SPI6_SCK;
|
2017-12-20 10:39:30 -05:00
|
|
|
#if defined(MICROPY_HW_SPI6_MISO)
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[2] = MICROPY_HW_SPI6_MISO;
|
2017-12-20 10:39:30 -05:00
|
|
|
#endif
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[3] = MICROPY_HW_SPI6_MOSI;
|
2015-12-08 09:41:47 -05:00
|
|
|
// enable the SPI clock
|
2018-02-12 23:53:08 -05:00
|
|
|
__HAL_RCC_SPI6_CLK_ENABLE();
|
2015-12-08 09:41:47 -05:00
|
|
|
#endif
|
2014-04-20 14:06:15 -04:00
|
|
|
} else {
|
|
|
|
// SPI does not exist for this board (shouldn't get here, should be checked by caller)
|
|
|
|
return;
|
2014-04-19 19:16:30 -04:00
|
|
|
}
|
|
|
|
|
2016-11-11 01:53:45 -05:00
|
|
|
// init the GPIO lines
|
|
|
|
uint32_t mode = MP_HAL_PIN_MODE_ALT;
|
|
|
|
uint32_t pull = spi->Init.CLKPolarity == SPI_POLARITY_LOW ? MP_HAL_PIN_PULL_DOWN : MP_HAL_PIN_PULL_UP;
|
2017-12-20 10:39:30 -05:00
|
|
|
for (uint i = (enable_nss_pin ? 0 : 1); i < 4; i++) {
|
|
|
|
if (pins[i] == NULL) {
|
|
|
|
continue;
|
|
|
|
}
|
2018-02-04 21:44:31 -05:00
|
|
|
mp_hal_pin_config_alt(pins[i], mode, pull, AF_FN_SPI, (self - &spi_obj[0]) + 1);
|
2014-04-19 19:16:30 -04:00
|
|
|
}
|
|
|
|
|
2014-04-20 14:06:15 -04:00
|
|
|
// init the SPI device
|
2014-04-19 19:16:30 -04:00
|
|
|
if (HAL_SPI_Init(spi) != HAL_OK) {
|
|
|
|
// init error
|
|
|
|
// TODO should raise an exception, but this function is not necessarily going to be
|
|
|
|
// called via Python, so may not be properly wrapped in an NLR handler
|
2014-10-23 09:25:32 -04:00
|
|
|
printf("OSError: HAL_SPI_Init failed\n");
|
2014-04-19 19:16:30 -04:00
|
|
|
return;
|
|
|
|
}
|
2014-12-02 18:41:30 -05:00
|
|
|
|
2015-06-10 08:06:48 -04:00
|
|
|
// After calling HAL_SPI_Init() it seems that the DMA gets disconnected if
|
|
|
|
// it was previously configured. So we invalidate the DMA channel to force
|
|
|
|
// an initialisation the next time we use it.
|
2016-03-22 06:28:35 -04:00
|
|
|
dma_invalidate_channel(self->tx_dma_descr);
|
|
|
|
dma_invalidate_channel(self->rx_dma_descr);
|
2014-04-19 19:16:30 -04:00
|
|
|
}
|
|
|
|
|
2018-02-04 21:44:31 -05:00
|
|
|
void spi_deinit(const spi_t *spi_obj) {
|
|
|
|
SPI_HandleTypeDef *spi = spi_obj->spi;
|
2014-04-19 19:16:30 -04:00
|
|
|
HAL_SPI_DeInit(spi);
|
2014-04-20 14:06:15 -04:00
|
|
|
if (0) {
|
2015-12-12 10:02:02 -05:00
|
|
|
#if defined(MICROPY_HW_SPI1_SCK)
|
2014-04-20 14:06:15 -04:00
|
|
|
} else if (spi->Instance == SPI1) {
|
2018-02-12 23:53:08 -05:00
|
|
|
__HAL_RCC_SPI1_FORCE_RESET();
|
|
|
|
__HAL_RCC_SPI1_RELEASE_RESET();
|
|
|
|
__HAL_RCC_SPI1_CLK_DISABLE();
|
2015-12-12 10:02:02 -05:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI2_SCK)
|
2014-04-19 19:16:30 -04:00
|
|
|
} else if (spi->Instance == SPI2) {
|
2018-02-12 23:53:08 -05:00
|
|
|
__HAL_RCC_SPI2_FORCE_RESET();
|
|
|
|
__HAL_RCC_SPI2_RELEASE_RESET();
|
|
|
|
__HAL_RCC_SPI2_CLK_DISABLE();
|
2015-12-12 10:02:02 -05:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI3_SCK)
|
2014-04-20 03:06:03 -04:00
|
|
|
} else if (spi->Instance == SPI3) {
|
2018-02-12 23:53:08 -05:00
|
|
|
__HAL_RCC_SPI3_FORCE_RESET();
|
|
|
|
__HAL_RCC_SPI3_RELEASE_RESET();
|
|
|
|
__HAL_RCC_SPI3_CLK_DISABLE();
|
2015-12-12 10:02:02 -05:00
|
|
|
#endif
|
2015-12-08 09:41:47 -05:00
|
|
|
#if defined(MICROPY_HW_SPI4_SCK)
|
|
|
|
} else if (spi->Instance == SPI4) {
|
2018-02-12 23:53:08 -05:00
|
|
|
__HAL_RCC_SPI4_FORCE_RESET();
|
|
|
|
__HAL_RCC_SPI4_RELEASE_RESET();
|
|
|
|
__HAL_RCC_SPI4_CLK_DISABLE();
|
2015-12-08 09:41:47 -05:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI5_SCK)
|
|
|
|
} else if (spi->Instance == SPI5) {
|
2018-02-12 23:53:08 -05:00
|
|
|
__HAL_RCC_SPI5_FORCE_RESET();
|
|
|
|
__HAL_RCC_SPI5_RELEASE_RESET();
|
|
|
|
__HAL_RCC_SPI5_CLK_DISABLE();
|
2015-12-08 09:41:47 -05:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_SPI6_SCK)
|
|
|
|
} else if (spi->Instance == SPI6) {
|
2018-02-12 23:53:08 -05:00
|
|
|
__HAL_RCC_SPI6_FORCE_RESET();
|
|
|
|
__HAL_RCC_SPI6_RELEASE_RESET();
|
|
|
|
__HAL_RCC_SPI6_CLK_DISABLE();
|
2015-12-08 09:41:47 -05:00
|
|
|
#endif
|
2014-04-19 19:16:30 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-06-18 03:36:52 -04:00
|
|
|
STATIC HAL_StatusTypeDef spi_wait_dma_finished(const spi_t *spi, uint32_t t_start, uint32_t timeout) {
|
2018-02-04 21:44:31 -05:00
|
|
|
volatile HAL_SPI_StateTypeDef *state = &spi->spi->State;
|
2018-01-31 19:45:29 -05:00
|
|
|
for (;;) {
|
|
|
|
// Do an atomic check of the state; WFI will exit even if IRQs are disabled
|
|
|
|
uint32_t irq_state = disable_irq();
|
2018-02-04 21:44:31 -05:00
|
|
|
if (*state == HAL_SPI_STATE_READY) {
|
2018-01-31 19:45:29 -05:00
|
|
|
enable_irq(irq_state);
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
__WFI();
|
|
|
|
enable_irq(irq_state);
|
2018-06-18 03:36:52 -04:00
|
|
|
if (HAL_GetTick() - t_start >= timeout) {
|
2014-12-02 18:41:30 -05:00
|
|
|
return HAL_TIMEOUT;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
|
2017-03-29 01:02:43 -04:00
|
|
|
// A transfer of "len" bytes should take len*8*1000/baudrate milliseconds.
|
|
|
|
// To simplify the calculation we assume the baudrate is never less than 8kHz
|
|
|
|
// and use that value for the baudrate in the formula, plus a small constant.
|
|
|
|
#define SPI_TRANSFER_TIMEOUT(len) ((len) + 100)
|
|
|
|
|
2018-02-04 21:44:31 -05:00
|
|
|
STATIC void spi_transfer(const spi_t *self, size_t len, const uint8_t *src, uint8_t *dest, uint32_t timeout) {
|
2016-09-01 02:36:41 -04:00
|
|
|
// Note: there seems to be a problem sending 1 byte using DMA the first
|
|
|
|
// time directly after the SPI/DMA is initialised. The cause of this is
|
|
|
|
// unknown but we sidestep the issue by using polling for 1 byte transfer.
|
|
|
|
|
2018-06-18 03:36:52 -04:00
|
|
|
// Note: DMA transfers are limited to 65535 bytes at a time.
|
|
|
|
|
2016-09-01 02:36:41 -04:00
|
|
|
HAL_StatusTypeDef status;
|
|
|
|
|
2016-10-02 21:47:56 -04:00
|
|
|
if (dest == NULL) {
|
2016-09-01 02:36:41 -04:00
|
|
|
// send only
|
2016-10-02 21:47:56 -04:00
|
|
|
if (len == 1 || query_irq() == IRQ_STATE_DISABLED) {
|
|
|
|
status = HAL_SPI_Transmit(self->spi, (uint8_t*)src, len, timeout);
|
2016-09-01 02:36:41 -04:00
|
|
|
} else {
|
|
|
|
DMA_HandleTypeDef tx_dma;
|
|
|
|
dma_init(&tx_dma, self->tx_dma_descr, self->spi);
|
|
|
|
self->spi->hdmatx = &tx_dma;
|
|
|
|
self->spi->hdmarx = NULL;
|
2017-03-27 21:54:01 -04:00
|
|
|
MP_HAL_CLEAN_DCACHE(src, len);
|
2018-06-18 03:36:52 -04:00
|
|
|
uint32_t t_start = HAL_GetTick();
|
|
|
|
do {
|
|
|
|
uint32_t l = MIN(len, 65535);
|
|
|
|
status = HAL_SPI_Transmit_DMA(self->spi, (uint8_t*)src, l);
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
status = spi_wait_dma_finished(self, t_start, timeout);
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
len -= l;
|
|
|
|
src += l;
|
|
|
|
} while (len);
|
2016-09-01 02:36:41 -04:00
|
|
|
dma_deinit(self->tx_dma_descr);
|
|
|
|
}
|
2016-10-02 21:47:56 -04:00
|
|
|
} else if (src == NULL) {
|
2016-09-01 02:36:41 -04:00
|
|
|
// receive only
|
2016-10-02 21:47:56 -04:00
|
|
|
if (len == 1 || query_irq() == IRQ_STATE_DISABLED) {
|
|
|
|
status = HAL_SPI_Receive(self->spi, dest, len, timeout);
|
2016-09-01 02:36:41 -04:00
|
|
|
} else {
|
|
|
|
DMA_HandleTypeDef tx_dma, rx_dma;
|
|
|
|
if (self->spi->Init.Mode == SPI_MODE_MASTER) {
|
|
|
|
// in master mode the HAL actually does a TransmitReceive call
|
|
|
|
dma_init(&tx_dma, self->tx_dma_descr, self->spi);
|
|
|
|
self->spi->hdmatx = &tx_dma;
|
|
|
|
} else {
|
|
|
|
self->spi->hdmatx = NULL;
|
|
|
|
}
|
|
|
|
dma_init(&rx_dma, self->rx_dma_descr, self->spi);
|
|
|
|
self->spi->hdmarx = &rx_dma;
|
2017-03-27 21:54:01 -04:00
|
|
|
MP_HAL_CLEANINVALIDATE_DCACHE(dest, len);
|
2018-06-18 03:36:52 -04:00
|
|
|
uint32_t t_start = HAL_GetTick();
|
|
|
|
do {
|
|
|
|
uint32_t l = MIN(len, 65535);
|
|
|
|
status = HAL_SPI_Receive_DMA(self->spi, dest, l);
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
status = spi_wait_dma_finished(self, t_start, timeout);
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
len -= l;
|
|
|
|
dest += l;
|
|
|
|
} while (len);
|
2016-09-01 02:36:41 -04:00
|
|
|
if (self->spi->hdmatx != NULL) {
|
|
|
|
dma_deinit(self->tx_dma_descr);
|
|
|
|
}
|
|
|
|
dma_deinit(self->rx_dma_descr);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// send and receive
|
2016-10-02 21:47:56 -04:00
|
|
|
if (len == 1 || query_irq() == IRQ_STATE_DISABLED) {
|
|
|
|
status = HAL_SPI_TransmitReceive(self->spi, (uint8_t*)src, dest, len, timeout);
|
2016-09-01 02:36:41 -04:00
|
|
|
} else {
|
|
|
|
DMA_HandleTypeDef tx_dma, rx_dma;
|
|
|
|
dma_init(&tx_dma, self->tx_dma_descr, self->spi);
|
|
|
|
self->spi->hdmatx = &tx_dma;
|
|
|
|
dma_init(&rx_dma, self->rx_dma_descr, self->spi);
|
|
|
|
self->spi->hdmarx = &rx_dma;
|
2017-03-27 21:54:01 -04:00
|
|
|
MP_HAL_CLEAN_DCACHE(src, len);
|
|
|
|
MP_HAL_CLEANINVALIDATE_DCACHE(dest, len);
|
2018-06-18 03:36:52 -04:00
|
|
|
uint32_t t_start = HAL_GetTick();
|
|
|
|
do {
|
|
|
|
uint32_t l = MIN(len, 65535);
|
|
|
|
status = HAL_SPI_TransmitReceive_DMA(self->spi, (uint8_t*)src, dest, l);
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
status = spi_wait_dma_finished(self, t_start, timeout);
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
len -= l;
|
|
|
|
src += l;
|
|
|
|
dest += l;
|
|
|
|
} while (len);
|
2016-09-01 02:36:41 -04:00
|
|
|
dma_deinit(self->tx_dma_descr);
|
|
|
|
dma_deinit(self->rx_dma_descr);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (status != HAL_OK) {
|
|
|
|
mp_hal_raise(status);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-02-04 21:44:31 -05:00
|
|
|
STATIC void spi_print(const mp_print_t *print, const spi_t *spi_obj, bool legacy) {
|
|
|
|
SPI_HandleTypeDef *spi = spi_obj->spi;
|
|
|
|
|
2015-12-08 09:41:47 -05:00
|
|
|
uint spi_num = 1; // default to SPI1
|
2016-10-03 01:45:46 -04:00
|
|
|
if (spi->Instance == SPI2) { spi_num = 2; }
|
2018-05-28 04:10:53 -04:00
|
|
|
#if defined(SPI3)
|
2016-10-03 01:45:46 -04:00
|
|
|
else if (spi->Instance == SPI3) { spi_num = 3; }
|
2018-05-28 04:10:53 -04:00
|
|
|
#endif
|
2015-12-08 09:41:47 -05:00
|
|
|
#if defined(SPI4)
|
2016-10-03 01:45:46 -04:00
|
|
|
else if (spi->Instance == SPI4) { spi_num = 4; }
|
2015-12-08 09:41:47 -05:00
|
|
|
#endif
|
|
|
|
#if defined(SPI5)
|
2016-10-03 01:45:46 -04:00
|
|
|
else if (spi->Instance == SPI5) { spi_num = 5; }
|
2015-12-08 09:41:47 -05:00
|
|
|
#endif
|
|
|
|
#if defined(SPI6)
|
2016-10-03 01:45:46 -04:00
|
|
|
else if (spi->Instance == SPI6) { spi_num = 6; }
|
2015-12-08 09:41:47 -05:00
|
|
|
#endif
|
2014-04-19 19:16:30 -04:00
|
|
|
|
2016-10-03 01:45:46 -04:00
|
|
|
mp_printf(print, "SPI(%u", spi_num);
|
|
|
|
if (spi->State != HAL_SPI_STATE_RESET) {
|
|
|
|
if (spi->Init.Mode == SPI_MODE_MASTER) {
|
2014-04-19 19:16:30 -04:00
|
|
|
// compute baudrate
|
|
|
|
uint spi_clock;
|
2018-05-28 04:10:53 -04:00
|
|
|
#if defined(STM32F0)
|
|
|
|
spi_clock = HAL_RCC_GetPCLK1Freq();
|
|
|
|
#else
|
2016-10-03 01:45:46 -04:00
|
|
|
if (spi->Instance == SPI2 || spi->Instance == SPI3) {
|
2014-04-19 19:16:30 -04:00
|
|
|
// SPI2 and SPI3 are on APB1
|
|
|
|
spi_clock = HAL_RCC_GetPCLK1Freq();
|
2015-12-08 09:41:47 -05:00
|
|
|
} else {
|
|
|
|
// SPI1, SPI4, SPI5 and SPI6 are on APB2
|
|
|
|
spi_clock = HAL_RCC_GetPCLK2Freq();
|
2014-04-19 19:16:30 -04:00
|
|
|
}
|
2018-05-28 04:10:53 -04:00
|
|
|
#endif
|
2016-10-03 01:45:46 -04:00
|
|
|
uint log_prescaler = (spi->Init.BaudRatePrescaler >> 3) + 1;
|
2014-12-08 16:34:07 -05:00
|
|
|
uint baudrate = spi_clock >> log_prescaler;
|
2016-10-03 01:45:46 -04:00
|
|
|
if (legacy) {
|
|
|
|
mp_printf(print, ", SPI.MASTER");
|
|
|
|
}
|
|
|
|
mp_printf(print, ", baudrate=%u", baudrate);
|
|
|
|
if (legacy) {
|
|
|
|
mp_printf(print, ", prescaler=%u", 1 << log_prescaler);
|
|
|
|
}
|
2014-04-19 19:16:30 -04:00
|
|
|
} else {
|
2016-10-03 01:45:46 -04:00
|
|
|
mp_printf(print, ", SPI.SLAVE");
|
2014-04-19 19:16:30 -04:00
|
|
|
}
|
2016-10-03 01:45:46 -04:00
|
|
|
mp_printf(print, ", polarity=%u, phase=%u, bits=%u", spi->Init.CLKPolarity == SPI_POLARITY_LOW ? 0 : 1, spi->Init.CLKPhase == SPI_PHASE_1EDGE ? 0 : 1, spi->Init.DataSize == SPI_DATASIZE_8BIT ? 8 : 16);
|
2018-02-12 23:37:35 -05:00
|
|
|
if (spi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) {
|
2016-10-03 01:45:46 -04:00
|
|
|
mp_printf(print, ", crc=0x%x", spi->Init.CRCPolynomial);
|
2014-04-20 19:10:04 -04:00
|
|
|
}
|
2014-04-19 19:16:30 -04:00
|
|
|
}
|
2016-10-03 01:45:46 -04:00
|
|
|
mp_print_str(print, ")");
|
|
|
|
}
|
|
|
|
|
|
|
|
/******************************************************************************/
|
|
|
|
/* MicroPython bindings for legacy pyb API */
|
|
|
|
|
2018-02-04 21:44:31 -05:00
|
|
|
typedef struct _pyb_spi_obj_t {
|
|
|
|
mp_obj_base_t base;
|
|
|
|
const spi_t *spi;
|
|
|
|
} pyb_spi_obj_t;
|
|
|
|
|
|
|
|
STATIC const pyb_spi_obj_t pyb_spi_obj[] = {
|
|
|
|
{{&pyb_spi_type}, &spi_obj[0]},
|
|
|
|
{{&pyb_spi_type}, &spi_obj[1]},
|
|
|
|
{{&pyb_spi_type}, &spi_obj[2]},
|
|
|
|
{{&pyb_spi_type}, &spi_obj[3]},
|
|
|
|
{{&pyb_spi_type}, &spi_obj[4]},
|
|
|
|
{{&pyb_spi_type}, &spi_obj[5]},
|
|
|
|
};
|
|
|
|
|
2016-10-03 01:45:46 -04:00
|
|
|
STATIC void pyb_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
|
2018-07-08 09:25:11 -04:00
|
|
|
pyb_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
|
2016-10-03 01:45:46 -04:00
|
|
|
spi_print(print, self->spi, true);
|
2014-04-19 19:16:30 -04:00
|
|
|
}
|
|
|
|
|
2014-10-26 09:54:31 -04:00
|
|
|
/// \method init(mode, baudrate=328125, *, polarity=1, phase=0, bits=8, firstbit=SPI.MSB, ti=False, crc=None)
|
2014-04-29 17:55:34 -04:00
|
|
|
///
|
|
|
|
/// Initialise the SPI bus with the given parameters:
|
|
|
|
///
|
|
|
|
/// - `mode` must be either `SPI.MASTER` or `SPI.SLAVE`.
|
|
|
|
/// - `baudrate` is the SCK clock rate (only sensible for a master).
|
2017-08-29 20:59:58 -04:00
|
|
|
STATIC mp_obj_t pyb_spi_init_helper(const pyb_spi_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
2014-12-02 18:41:30 -05:00
|
|
|
static const mp_arg_t allowed_args[] = {
|
|
|
|
{ MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} },
|
|
|
|
{ MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 328125} },
|
2014-12-08 16:34:07 -05:00
|
|
|
{ MP_QSTR_prescaler, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} },
|
2014-12-02 18:41:30 -05:00
|
|
|
{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} },
|
|
|
|
{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
|
|
|
|
{ MP_QSTR_dir, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_DIRECTION_2LINES} },
|
|
|
|
{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
|
|
|
|
{ MP_QSTR_nss, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_NSS_SOFT} },
|
|
|
|
{ MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_FIRSTBIT_MSB} },
|
|
|
|
{ MP_QSTR_ti, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} },
|
2018-07-08 09:25:11 -04:00
|
|
|
{ MP_QSTR_crc, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_PTR(&mp_const_none_obj)} },
|
2014-12-02 18:41:30 -05:00
|
|
|
};
|
2014-04-19 19:16:30 -04:00
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
// parse args
|
2014-12-02 18:41:30 -05:00
|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
|
|
|
mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
2014-04-19 19:16:30 -04:00
|
|
|
|
|
|
|
// set the SPI configuration values
|
2018-02-04 21:44:31 -05:00
|
|
|
SPI_InitTypeDef *init = &self->spi->spi->Init;
|
2014-12-02 18:41:30 -05:00
|
|
|
init->Mode = args[0].u_int;
|
2014-04-19 19:16:30 -04:00
|
|
|
|
2016-10-03 01:45:46 -04:00
|
|
|
spi_set_params(self->spi, args[2].u_int, args[1].u_int, args[3].u_int, args[4].u_int,
|
|
|
|
args[6].u_int, args[8].u_int);
|
|
|
|
|
2014-12-08 16:34:07 -05:00
|
|
|
init->Direction = args[5].u_int;
|
|
|
|
init->NSS = args[7].u_int;
|
2018-02-12 23:37:35 -05:00
|
|
|
init->TIMode = args[9].u_bool ? SPI_TIMODE_ENABLE : SPI_TIMODE_DISABLE;
|
2014-12-08 16:34:07 -05:00
|
|
|
if (args[10].u_obj == mp_const_none) {
|
2018-02-12 23:37:35 -05:00
|
|
|
init->CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
2014-04-19 19:16:30 -04:00
|
|
|
init->CRCPolynomial = 0;
|
|
|
|
} else {
|
2018-02-12 23:37:35 -05:00
|
|
|
init->CRCCalculation = SPI_CRCCALCULATION_ENABLE;
|
2014-12-08 16:34:07 -05:00
|
|
|
init->CRCPolynomial = mp_obj_get_int(args[10].u_obj);
|
2014-04-19 19:16:30 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// init the SPI bus
|
2014-09-30 17:26:59 -04:00
|
|
|
spi_init(self->spi, init->NSS != SPI_NSS_SOFT);
|
2014-04-19 19:16:30 -04:00
|
|
|
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
|
2014-04-29 17:55:34 -04:00
|
|
|
/// \classmethod \constructor(bus, ...)
|
|
|
|
///
|
|
|
|
/// Construct an SPI object on the given bus. `bus` can be 1 or 2.
|
|
|
|
/// With no additional parameters, the SPI object is created but not
|
|
|
|
/// initialised (it has the settings from the last initialisation of
|
|
|
|
/// the bus, if any). If extra arguments are given, the bus is initialised.
|
|
|
|
/// See `init` for parameters of initialisation.
|
2014-05-04 09:28:11 -04:00
|
|
|
///
|
|
|
|
/// The physical pins of the SPI busses are:
|
|
|
|
///
|
|
|
|
/// - `SPI(1)` is on the X position: `(NSS, SCK, MISO, MOSI) = (X5, X6, X7, X8) = (PA4, PA5, PA6, PA7)`
|
|
|
|
/// - `SPI(2)` is on the Y position: `(NSS, SCK, MISO, MOSI) = (Y5, Y6, Y7, Y8) = (PB12, PB13, PB14, PB15)`
|
|
|
|
///
|
|
|
|
/// At the moment, the NSS pin is not used by the SPI driver and is free
|
|
|
|
/// for other use.
|
2017-01-04 08:10:42 -05:00
|
|
|
STATIC mp_obj_t pyb_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
|
2014-04-19 19:16:30 -04:00
|
|
|
// check arguments
|
|
|
|
mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
|
|
|
|
|
2015-05-27 12:21:42 -04:00
|
|
|
// work out SPI bus
|
2016-10-03 01:45:46 -04:00
|
|
|
int spi_id = spi_find(args[0]);
|
2014-04-19 19:16:30 -04:00
|
|
|
|
|
|
|
// get SPI object
|
2015-05-27 12:21:42 -04:00
|
|
|
const pyb_spi_obj_t *spi_obj = &pyb_spi_obj[spi_id - 1];
|
2014-04-19 19:16:30 -04:00
|
|
|
|
|
|
|
if (n_args > 1 || n_kw > 0) {
|
|
|
|
// start the peripheral
|
|
|
|
mp_map_t kw_args;
|
|
|
|
mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
|
|
|
|
pyb_spi_init_helper(spi_obj, n_args - 1, args + 1, &kw_args);
|
|
|
|
}
|
|
|
|
|
2018-07-08 09:25:11 -04:00
|
|
|
return MP_OBJ_FROM_PTR(spi_obj);
|
2014-04-19 19:16:30 -04:00
|
|
|
}
|
|
|
|
|
2017-08-29 20:59:58 -04:00
|
|
|
STATIC mp_obj_t pyb_spi_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
|
2018-07-08 09:25:11 -04:00
|
|
|
return pyb_spi_init_helper(MP_OBJ_TO_PTR(args[0]), n_args - 1, args + 1, kw_args);
|
2014-04-19 19:16:30 -04:00
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_init_obj, 1, pyb_spi_init);
|
|
|
|
|
2014-04-29 17:55:34 -04:00
|
|
|
/// \method deinit()
|
|
|
|
/// Turn off the SPI bus.
|
2014-04-19 19:16:30 -04:00
|
|
|
STATIC mp_obj_t pyb_spi_deinit(mp_obj_t self_in) {
|
2018-07-08 09:25:11 -04:00
|
|
|
pyb_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
|
2014-04-19 19:16:30 -04:00
|
|
|
spi_deinit(self->spi);
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_spi_deinit_obj, pyb_spi_deinit);
|
|
|
|
|
2014-04-29 17:55:34 -04:00
|
|
|
/// \method send(send, *, timeout=5000)
|
|
|
|
/// Send data on the bus:
|
|
|
|
///
|
|
|
|
/// - `send` is the data to send (an integer to send, or a buffer object).
|
|
|
|
/// - `timeout` is the timeout in milliseconds to wait for the send.
|
|
|
|
///
|
|
|
|
/// Return value: `None`.
|
2017-08-29 20:59:58 -04:00
|
|
|
STATIC mp_obj_t pyb_spi_send(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
2014-04-19 19:16:30 -04:00
|
|
|
// TODO assumes transmission size is 8-bits wide
|
|
|
|
|
2014-12-02 18:41:30 -05:00
|
|
|
static const mp_arg_t allowed_args[] = {
|
|
|
|
{ MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
|
|
|
{ MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} },
|
|
|
|
};
|
2014-04-19 19:16:30 -04:00
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
// parse args
|
2018-07-08 09:25:11 -04:00
|
|
|
pyb_spi_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
|
2014-12-02 18:41:30 -05:00
|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
|
|
|
mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
2014-04-20 19:10:04 -04:00
|
|
|
|
|
|
|
// get the buffer to send from
|
2014-04-19 19:16:30 -04:00
|
|
|
mp_buffer_info_t bufinfo;
|
2014-04-20 19:10:04 -04:00
|
|
|
uint8_t data[1];
|
2014-12-02 18:41:30 -05:00
|
|
|
pyb_buf_get_for_send(args[0].u_obj, &bufinfo, data);
|
2014-04-19 19:16:30 -04:00
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
// send the data
|
2018-02-04 21:44:31 -05:00
|
|
|
spi_transfer(self->spi, bufinfo.len, bufinfo.buf, NULL, args[1].u_int);
|
2014-04-19 19:16:30 -04:00
|
|
|
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
2014-04-20 19:10:04 -04:00
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_send_obj, 1, pyb_spi_send);
|
|
|
|
|
2014-04-29 17:55:34 -04:00
|
|
|
/// \method recv(recv, *, timeout=5000)
|
|
|
|
///
|
|
|
|
/// Receive data on the bus:
|
|
|
|
///
|
|
|
|
/// - `recv` can be an integer, which is the number of bytes to receive,
|
|
|
|
/// or a mutable buffer, which will be filled with received bytes.
|
|
|
|
/// - `timeout` is the timeout in milliseconds to wait for the receive.
|
|
|
|
///
|
|
|
|
/// Return value: if `recv` is an integer then a new buffer of the bytes received,
|
|
|
|
/// otherwise the same buffer that was passed in to `recv`.
|
2017-08-29 20:59:58 -04:00
|
|
|
STATIC mp_obj_t pyb_spi_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
2014-04-19 19:16:30 -04:00
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// TODO assumes transmission size is 8-bits wide
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2014-12-02 18:41:30 -05:00
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_recv, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} },
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};
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2014-04-20 19:10:04 -04:00
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// parse args
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2018-07-08 09:25:11 -04:00
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pyb_spi_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
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2014-12-02 18:41:30 -05:00
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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2014-04-19 19:16:30 -04:00
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2014-04-20 19:10:04 -04:00
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// get the buffer to receive into
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2015-01-21 17:48:37 -05:00
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vstr_t vstr;
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mp_obj_t o_ret = pyb_buf_get_for_recv(args[0].u_obj, &vstr);
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2014-04-20 19:10:04 -04:00
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// receive the data
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2018-02-04 21:44:31 -05:00
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spi_transfer(self->spi, vstr.len, NULL, (uint8_t*)vstr.buf, args[1].u_int);
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2014-04-19 19:16:30 -04:00
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2014-04-20 19:10:04 -04:00
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// return the received data
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2015-01-21 17:48:37 -05:00
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if (o_ret != MP_OBJ_NULL) {
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return o_ret;
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2014-04-20 19:10:04 -04:00
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} else {
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2015-01-21 17:48:37 -05:00
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return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr);
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2014-04-20 19:10:04 -04:00
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}
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2014-04-19 19:16:30 -04:00
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}
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2014-04-20 19:10:04 -04:00
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STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_recv_obj, 1, pyb_spi_recv);
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2014-04-19 19:16:30 -04:00
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2014-04-29 17:55:34 -04:00
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/// \method send_recv(send, recv=None, *, timeout=5000)
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///
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/// Send and receive data on the bus at the same time:
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///
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/// - `send` is the data to send (an integer to send, or a buffer object).
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/// - `recv` is a mutable buffer which will be filled with received bytes.
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/// It can be the same as `send`, or omitted. If omitted, a new buffer will
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/// be created.
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/// - `timeout` is the timeout in milliseconds to wait for the receive.
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///
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/// Return value: the buffer with the received bytes.
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2017-08-29 20:59:58 -04:00
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STATIC mp_obj_t pyb_spi_send_recv(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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2014-04-19 19:16:30 -04:00
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// TODO assumes transmission size is 8-bits wide
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2014-12-02 18:41:30 -05:00
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_recv, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} },
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};
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2014-04-19 19:16:30 -04:00
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2014-04-20 19:10:04 -04:00
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// parse args
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2018-07-08 09:25:11 -04:00
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pyb_spi_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
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2014-12-02 18:41:30 -05:00
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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2014-04-20 19:10:04 -04:00
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// get buffers to send from/receive to
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mp_buffer_info_t bufinfo_send;
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2014-04-19 19:16:30 -04:00
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uint8_t data_send[1];
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2014-04-20 19:10:04 -04:00
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mp_buffer_info_t bufinfo_recv;
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2015-01-21 17:48:37 -05:00
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vstr_t vstr_recv;
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2014-04-20 19:10:04 -04:00
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mp_obj_t o_ret;
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2014-12-02 18:41:30 -05:00
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if (args[0].u_obj == args[1].u_obj) {
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2014-04-20 19:10:04 -04:00
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// same object for send and receive, it must be a r/w buffer
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2014-12-02 18:41:30 -05:00
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mp_get_buffer_raise(args[0].u_obj, &bufinfo_send, MP_BUFFER_RW);
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2014-04-20 19:10:04 -04:00
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bufinfo_recv = bufinfo_send;
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2015-01-21 17:48:37 -05:00
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o_ret = args[0].u_obj;
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2014-04-19 19:16:30 -04:00
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} else {
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2014-04-20 19:10:04 -04:00
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// get the buffer to send from
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2014-12-02 18:41:30 -05:00
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pyb_buf_get_for_send(args[0].u_obj, &bufinfo_send, data_send);
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2014-04-20 19:10:04 -04:00
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// get the buffer to receive into
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2014-12-02 18:41:30 -05:00
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if (args[1].u_obj == MP_OBJ_NULL) {
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2014-04-20 19:10:04 -04:00
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// only send argument given, so create a fresh buffer of the send length
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2015-01-21 17:48:37 -05:00
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vstr_init_len(&vstr_recv, bufinfo_send.len);
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bufinfo_recv.len = vstr_recv.len;
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bufinfo_recv.buf = vstr_recv.buf;
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o_ret = MP_OBJ_NULL;
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2014-04-20 19:10:04 -04:00
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} else {
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// recv argument given
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2014-12-02 18:41:30 -05:00
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mp_get_buffer_raise(args[1].u_obj, &bufinfo_recv, MP_BUFFER_WRITE);
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2014-04-20 20:59:43 -04:00
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if (bufinfo_recv.len != bufinfo_send.len) {
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2017-08-09 00:40:45 -04:00
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mp_raise_ValueError("recv must be same length as send");
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2014-04-20 20:59:43 -04:00
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}
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2015-01-21 17:48:37 -05:00
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o_ret = args[1].u_obj;
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2014-04-20 19:10:04 -04:00
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}
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2014-04-19 19:16:30 -04:00
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}
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|
2016-09-01 02:36:41 -04:00
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// do the transfer
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2018-02-04 21:44:31 -05:00
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spi_transfer(self->spi, bufinfo_send.len, bufinfo_send.buf, bufinfo_recv.buf, args[2].u_int);
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2014-04-19 19:16:30 -04:00
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2014-04-20 19:10:04 -04:00
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// return the received data
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2015-01-21 17:48:37 -05:00
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if (o_ret != MP_OBJ_NULL) {
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return o_ret;
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2014-04-20 19:10:04 -04:00
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} else {
|
2015-01-21 17:48:37 -05:00
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return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr_recv);
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2014-04-20 19:10:04 -04:00
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}
|
2014-04-19 19:16:30 -04:00
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}
|
2014-04-20 19:10:04 -04:00
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STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_spi_send_recv_obj, 1, pyb_spi_send_recv);
|
2014-04-19 19:16:30 -04:00
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|
2017-05-06 03:03:40 -04:00
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STATIC const mp_rom_map_elem_t pyb_spi_locals_dict_table[] = {
|
2014-04-19 19:16:30 -04:00
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// instance methods
|
2017-05-06 03:03:40 -04:00
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{ MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_spi_init_obj) },
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{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_spi_deinit_obj) },
|
2016-09-01 02:37:15 -04:00
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|
2017-05-06 03:03:40 -04:00
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{ MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_machine_spi_read_obj) },
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{ MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_machine_spi_readinto_obj) },
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{ MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_machine_spi_write_obj) },
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{ MP_ROM_QSTR(MP_QSTR_write_readinto), MP_ROM_PTR(&mp_machine_spi_write_readinto_obj) },
|
2016-09-01 02:37:15 -04:00
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// legacy methods
|
2017-05-06 03:03:40 -04:00
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{ MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_spi_send_obj) },
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{ MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_spi_recv_obj) },
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{ MP_ROM_QSTR(MP_QSTR_send_recv), MP_ROM_PTR(&pyb_spi_send_recv_obj) },
|
2014-04-19 19:16:30 -04:00
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// class constants
|
2014-04-29 17:55:34 -04:00
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/// \constant MASTER - for initialising the bus to master mode
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/// \constant SLAVE - for initialising the bus to slave mode
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/// \constant MSB - set the first bit to MSB
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/// \constant LSB - set the first bit to LSB
|
2017-05-06 03:03:40 -04:00
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{ MP_ROM_QSTR(MP_QSTR_MASTER), MP_ROM_INT(SPI_MODE_MASTER) },
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{ MP_ROM_QSTR(MP_QSTR_SLAVE), MP_ROM_INT(SPI_MODE_SLAVE) },
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{ MP_ROM_QSTR(MP_QSTR_MSB), MP_ROM_INT(SPI_FIRSTBIT_MSB) },
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{ MP_ROM_QSTR(MP_QSTR_LSB), MP_ROM_INT(SPI_FIRSTBIT_LSB) },
|
2014-04-19 19:16:30 -04:00
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|
/* TODO
|
2017-05-06 03:03:40 -04:00
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{ MP_ROM_QSTR(MP_QSTR_DIRECTION_2LINES ((uint32_t)0x00000000)
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{ MP_ROM_QSTR(MP_QSTR_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
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{ MP_ROM_QSTR(MP_QSTR_DIRECTION_1LINE SPI_CR1_BIDIMODE
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{ MP_ROM_QSTR(MP_QSTR_NSS_SOFT SPI_CR1_SSM
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{ MP_ROM_QSTR(MP_QSTR_NSS_HARD_INPUT ((uint32_t)0x00000000)
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{ MP_ROM_QSTR(MP_QSTR_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
|
2014-04-19 19:16:30 -04:00
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|
|
*/
|
|
|
|
};
|
|
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STATIC MP_DEFINE_CONST_DICT(pyb_spi_locals_dict, pyb_spi_locals_dict_table);
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|
2016-10-03 01:45:46 -04:00
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STATIC void spi_transfer_machine(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) {
|
2018-02-04 21:44:31 -05:00
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pyb_spi_obj_t *self = (pyb_spi_obj_t*)self_in;
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spi_transfer(self->spi, len, src, dest, SPI_TRANSFER_TIMEOUT(len));
|
2016-10-03 01:45:46 -04:00
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|
}
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|
|
2016-09-01 02:37:15 -04:00
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STATIC const mp_machine_spi_p_t pyb_spi_p = {
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|
.transfer = spi_transfer_machine,
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|
};
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|
2014-04-19 19:16:30 -04:00
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|
const mp_obj_type_t pyb_spi_type = {
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{ &mp_type_type },
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.name = MP_QSTR_SPI,
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.print = pyb_spi_print,
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|
.make_new = pyb_spi_make_new,
|
2016-09-01 02:37:15 -04:00
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.protocol = &pyb_spi_p,
|
2017-05-06 03:03:40 -04:00
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.locals_dict = (mp_obj_dict_t*)&pyb_spi_locals_dict,
|
2014-04-19 19:16:30 -04:00
|
|
|
};
|
2016-10-03 01:45:46 -04:00
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|
|
/******************************************************************************/
|
2016-12-07 21:58:10 -05:00
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|
|
// Implementation of hard SPI for machine module
|
2016-10-03 01:45:46 -04:00
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typedef struct _machine_hard_spi_obj_t {
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|
mp_obj_base_t base;
|
2018-02-04 21:44:31 -05:00
|
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|
const spi_t *spi;
|
2016-10-03 01:45:46 -04:00
|
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|
} machine_hard_spi_obj_t;
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|
STATIC const machine_hard_spi_obj_t machine_hard_spi_obj[] = {
|
2018-02-04 21:44:31 -05:00
|
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{{&machine_hard_spi_type}, &spi_obj[0]},
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|
|
{{&machine_hard_spi_type}, &spi_obj[1]},
|
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|
|
{{&machine_hard_spi_type}, &spi_obj[2]},
|
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|
|
{{&machine_hard_spi_type}, &spi_obj[3]},
|
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|
|
{{&machine_hard_spi_type}, &spi_obj[4]},
|
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|
|
{{&machine_hard_spi_type}, &spi_obj[5]},
|
2016-10-03 01:45:46 -04:00
|
|
|
};
|
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|
STATIC void machine_hard_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
|
2018-07-08 09:25:11 -04:00
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machine_hard_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
|
2018-02-04 21:44:31 -05:00
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|
spi_print(print, self->spi, false);
|
2016-10-03 01:45:46 -04:00
|
|
|
}
|
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|
|
2016-12-07 21:58:10 -05:00
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|
mp_obj_t machine_hard_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
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enum { ARG_id, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_sck, ARG_mosi, ARG_miso };
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|
|
static const mp_arg_t allowed_args[] = {
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|
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{ MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(-1)} },
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{ MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 500000} },
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{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
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{ MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SPI_FIRSTBIT_MSB} },
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{ MP_QSTR_sck, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_mosi, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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|
|
};
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|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
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|
|
mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
|
|
|
|
2016-10-03 01:45:46 -04:00
|
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|
// get static peripheral object
|
2016-12-07 21:58:10 -05:00
|
|
|
int spi_id = spi_find(args[ARG_id].u_obj);
|
2016-10-03 01:45:46 -04:00
|
|
|
const machine_hard_spi_obj_t *self = &machine_hard_spi_obj[spi_id - 1];
|
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|
|
|
|
|
|
// here we would check the sck/mosi/miso pins and configure them, but it's not implemented
|
2016-12-07 21:58:10 -05:00
|
|
|
if (args[ARG_sck].u_obj != MP_OBJ_NULL
|
|
|
|
|| args[ARG_mosi].u_obj != MP_OBJ_NULL
|
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|
|
|| args[ARG_miso].u_obj != MP_OBJ_NULL) {
|
2016-10-03 01:45:46 -04:00
|
|
|
mp_raise_ValueError("explicit choice of sck/mosi/miso is not implemented");
|
|
|
|
}
|
|
|
|
|
|
|
|
// set the SPI configuration values
|
2018-02-04 21:44:31 -05:00
|
|
|
SPI_InitTypeDef *init = &self->spi->spi->Init;
|
2016-10-03 01:45:46 -04:00
|
|
|
init->Mode = SPI_MODE_MASTER;
|
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|
|
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|
|
// these parameters are not currently configurable
|
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|
|
init->Direction = SPI_DIRECTION_2LINES;
|
|
|
|
init->NSS = SPI_NSS_SOFT;
|
2018-02-12 23:53:08 -05:00
|
|
|
init->TIMode = SPI_TIMODE_DISABLE;
|
2018-02-12 23:37:35 -05:00
|
|
|
init->CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
2016-10-03 01:45:46 -04:00
|
|
|
init->CRCPolynomial = 0;
|
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|
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|
|
|
|
// set configurable paramaters
|
2018-02-04 21:44:31 -05:00
|
|
|
spi_set_params(self->spi, 0xffffffff, args[ARG_baudrate].u_int,
|
2016-12-07 21:58:10 -05:00
|
|
|
args[ARG_polarity].u_int, args[ARG_phase].u_int, args[ARG_bits].u_int,
|
|
|
|
args[ARG_firstbit].u_int);
|
2016-10-03 01:45:46 -04:00
|
|
|
|
|
|
|
// init the SPI bus
|
2018-02-04 21:44:31 -05:00
|
|
|
spi_init(self->spi, false);
|
2016-10-03 01:45:46 -04:00
|
|
|
|
|
|
|
return MP_OBJ_FROM_PTR(self);
|
|
|
|
}
|
|
|
|
|
2016-12-07 21:58:10 -05:00
|
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STATIC void machine_hard_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in;
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enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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};
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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2016-10-03 01:45:46 -04:00
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// set the SPI configuration values
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2018-02-04 21:44:31 -05:00
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spi_set_params(self->spi, 0xffffffff, args[ARG_baudrate].u_int,
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2016-12-07 21:58:10 -05:00
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args[ARG_polarity].u_int, args[ARG_phase].u_int, args[ARG_bits].u_int,
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args[ARG_firstbit].u_int);
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2016-10-03 01:45:46 -04:00
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// re-init the SPI bus
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2018-02-04 21:44:31 -05:00
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spi_init(self->spi, false);
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2016-10-03 01:45:46 -04:00
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}
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2016-12-07 21:58:10 -05:00
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STATIC void machine_hard_spi_deinit(mp_obj_base_t *self_in) {
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machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in;
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2018-02-04 21:44:31 -05:00
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spi_deinit(self->spi);
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2016-10-03 01:45:46 -04:00
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}
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STATIC void machine_hard_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) {
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machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in;
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2018-02-04 21:44:31 -05:00
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spi_transfer(self->spi, len, src, dest, SPI_TRANSFER_TIMEOUT(len));
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2016-10-03 01:45:46 -04:00
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}
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STATIC const mp_machine_spi_p_t machine_hard_spi_p = {
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2016-12-07 21:58:10 -05:00
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.init = machine_hard_spi_init,
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.deinit = machine_hard_spi_deinit,
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2016-10-03 01:45:46 -04:00
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.transfer = machine_hard_spi_transfer,
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};
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const mp_obj_type_t machine_hard_spi_type = {
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{ &mp_type_type },
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.name = MP_QSTR_SPI,
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.print = machine_hard_spi_print,
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2016-12-07 21:58:10 -05:00
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.make_new = mp_machine_spi_make_new, // delegate to master constructor
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2016-10-03 01:45:46 -04:00
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.protocol = &machine_hard_spi_p,
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2018-07-08 09:25:11 -04:00
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.locals_dict = (mp_obj_dict_t*)&mp_machine_spi_locals_dict,
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2016-10-03 01:45:46 -04:00
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};
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2018-02-04 21:51:27 -05:00
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const spi_t *spi_from_mp_obj(mp_obj_t o) {
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if (MP_OBJ_IS_TYPE(o, &pyb_spi_type)) {
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2018-07-08 09:25:11 -04:00
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pyb_spi_obj_t *self = MP_OBJ_TO_PTR(o);
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2018-02-04 21:51:27 -05:00
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return self->spi;
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} else if (MP_OBJ_IS_TYPE(o, &machine_hard_spi_type)) {
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2018-07-08 09:25:11 -04:00
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machine_hard_spi_obj_t *self = MP_OBJ_TO_PTR(o);
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2018-02-04 21:51:27 -05:00
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return self->spi;
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} else {
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mp_raise_TypeError("expecting an SPI object");
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}
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}
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