Refactor the convoluted asf4 clock setup into something more readable.
enable_clock_generator() has 2 changes:
- Set 'Output enabled' to match the current clock setup
- Handle divisors above 511
Add an enable_clock_generator_sync() version which makes it possible to setup
clocks without waiting for syncing. The bootup would hang without this.
I have checked these registers:
NVMCTRL->CTRLA = 0x00000004
Peripheral clocks (only non-zero shown):
PCHCTRL[1]=0x00000045
PCHCTRL[10]=0x00000041
Generator clocks (only non-zero shown):
GENCTRL[0] = 0x00010907
GENCTRL[1] = 0x00010906
-GENCTRL[2] = 0x00041104
+GENCTRL[2] = 0x00200904
GENCTRL[4] = 0x00010907
GENCTRL[5] = 0x00180906
DFLL clock:
OSCCTRL->DFLLCTRLA = 0x00000082
OSCCTRL->DFLLCTRLB = 0x00000000
OSCCTRL->DFLLVAL = 0x00008082
OSCCTRL->DFLLMUL = 0x00000000
DPLL clocks:
OSCCTRL->Dpll[0].DPLLCTRLA=0x00000002
OSCCTRL->Dpll[0].DPLLCTRLB=0x00000000
OSCCTRL->Dpll[0].DPLLRATIO=0x0000003b
OSCCTRL->Dpll[1].DPLLCTRLA=0x00000080
OSCCTRL->Dpll[1].DPLLCTRLB=0x00000020
OSCCTRL->Dpll[1].DPLLRATIO=0x00000000
OSC32KCTRL clock:
OSC32KCTRL->RTCCTRL = 0x00000000
OSC32KCTRL->XOSC32K = 0x00002082
OSC32KCTRL->CFDCTRL = 0x00000000
OSC32KCTRL->EVCTRL = 0x00000000
OSC32KCTRL->OSCULP32K = 0x00002300
Only gen2 changed which is due to samd51 having more bits in the simple
division register so DIVSEL wasn't necessary, and it didn't have OE set.
Make clock setup explicit instead of using the convoluted asf4 macro setup.
enable_clock_generator():
- Add GCLK_GENCTRL_OE to stick with the current setup.
- Handle divisor larger than 31 for generator 2
- Change the source argument so it can take the GCLK_GENCTRL_SRC_XXXX_Val
macros without casting to uint8_t.
This patch should not introduce any functional changes except keeping
GCLK_GENCTRL_OE enabled when the I2S clock is enabled.
This evolves the API from 2.x (and breaks it). Playback devices are now
separate from the samples themselves. This allows for greater playback
flexibility. Two sample sources are audioio.RawSample and audioio.WaveFile.
They can both be mono or stereo. They can be output to audioio.AudioOut or
audiobusio.I2SOut.
Internally, the dma tracking has changed from a TC counting block transfers
to an interrupt generated by the block event sent to the EVSYS. This reduces
the overhead of each DMA transfer so multiple can occure without using up TCs.
Fixes#652. Fixes#522. Huge progress on #263
1. UART: ported to ASF4. Allow rx-only and tx-only. Add .baudrate r/w property.
2. Make NeoPixel timing deterministic by turning off caches during NeoPixel writes.
3. Incorporate asf4 updates:
a. async USART driver
b. bringing Atmel START configuration closer to what we use
c. Clock initialization order now specified by CIRCUITPY_GCLK_INIT_1ST and _LAST.
4. supervisor/port.c: Move commented-out clock-test pin setting to correct location.
* Added asf4_conf/samd*/hpl_sercom_config.h
* Adjusted clocks in peripheral_clk_config.h.
* Put some frozen libs back in CPX for testing.
* Implement common-hal I2C
* Add samd*_peripherals.h in parallel with samd*_pins.h for common
functions and data.
* Store SERCOM index in pins table for convenience.
* Canonicalize some #include guard names in various .h files.
simpler reset of SERCOMs; remove unused routine
Scott Shawcroft
Dan Halbert
Noralf Trønnes
Scott Shawcroft
Radomir Dopieralski
Bryan Siepert