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atmel-samd: Add rtc module support 

Support the rtc module by using hal_calendar.
This commit is contained in:
Noralf Trønnes 2018-04-07 15:10:39 +02:00
parent 8d1719f190
commit 8e2080411f
14 changed files with 182 additions and 25 deletions
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4
ports/atmel-samd/Makefile
View File

@ -39,6 +39,7 @@ INC += -I. \
-Iasf4/$(CHIP_FAMILY)/hpl/gclk \
-Iasf4/$(CHIP_FAMILY)/hpl/pm \
-Iasf4/$(CHIP_FAMILY)/hpl/port \
-Iasf4/$(CHIP_FAMILY)/hpl/rtc \
-Iasf4/$(CHIP_FAMILY)/hpl/tc \
-Iasf4/$(CHIP_FAMILY)/include \
-Iasf4/$(CHIP_FAMILY)/CMSIS/Include \
@ -173,6 +174,7 @@ SRC_ASF := \
gcc/system_$(CHIP_FAMILY).c \
hal/src/hal_adc_sync.c \
hal/src/hal_atomic.c \
hal/src/hal_calendar.c \
hal/src/hal_dac_sync.c \
hal/src/hal_delay.c \
hal/src/hal_flash.c \
@ -278,6 +280,8 @@ SRC_COMMON_HAL = \
microcontroller/Processor.c \
neopixel_write/__init__.c \
os/__init__.c \
rtc/__init__.c \
rtc/RTC.c \
storage/__init__.c \
supervisor/__init__.c \
supervisor/Runtime.c \

2
ports/atmel-samd/asf4

@ -1 +1 @@
Subproject commit aaa0f428111fbea7d56ab548053b11c9f12068f1
Subproject commit 02e264253c76b85c567ecdfce69ad0de0970da63

10
ports/atmel-samd/asf4_conf/samd21/hpl_gclk_config.h
View File

@ -190,7 +190,7 @@
// <i> Indicates whether generic clock 2 configuration is enabled or not
// <id> enable_gclk_gen_2
#ifndef CONF_GCLK_GENERATOR_2_CONFIG
#define CONF_GCLK_GENERATOR_2_CONFIG 0
#define CONF_GCLK_GENERATOR_2_CONFIG 1
#endif
// <h> Generic Clock Generator Control
@ -205,7 +205,7 @@
// <i> Indicates whether Divide Selection is enabled or not
// <id> gclk_gen_2_div_sel
#ifndef CONF_GCLK_GEN_2_DIVSEL
#define CONF_GCLK_GEN_2_DIVSEL 0
#define CONF_GCLK_GEN_2_DIVSEL 1
#endif
// <q> Output Enable
@ -233,7 +233,7 @@
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
// <id> gclk_arch_gen_2_enable
#ifndef CONF_GCLK_GEN_2_GENEN
#define CONF_GCLK_GEN_2_GENEN 0
#define CONF_GCLK_GEN_2_GENEN 1
#endif
// <y> Generic clock generator 2 source
@ -259,7 +259,7 @@
// <i> This defines the clock source for generic clock generator 2
// <id> gclk_gen_2_oscillator
#ifndef CONF_GCLK_GEN_2_SRC
#define CONF_GCLK_GEN_2_SRC GCLK_GENCTRL_SRC_OSC32K
#define CONF_GCLK_GEN_2_SRC GCLK_GENCTRL_SRC_XOSC32K
#endif
// </h>
@ -268,7 +268,7 @@
// <i>
// <id> gclk_gen_2_div
#ifndef CONF_GCLK_GEN_2_DIV
#define CONF_GCLK_GEN_2_DIV 1
#define CONF_GCLK_GEN_2_DIV 4
#endif
// </h>

10
ports/atmel-samd/asf4_conf/samd21/hpl_rtc_config.h
View File

@ -10,6 +10,14 @@
#define CONF_RTC_ENABLE 1
#endif
// <q> Force reset RTC on initialization
// <i> Force RTC to reset on initialization, else init is not going on if RTC is already enabled.
// <i> Note that the previous power down data in RTC is lost if it's enabled.
// <id> rtc_arch_init_reset
#ifndef CONF_RTC_INIT_RESET
#define CONF_RTC_INIT_RESET 0
#endif
// <o> Prescaler configuration
// <0x0=>Peripheral clock divided by 1
// <0x1=>Peripheral clock divided by 2
@ -25,7 +33,7 @@
// <i> These bits define the RTC clock relative to the peripheral clock
// <id> rtc_arch_prescaler
#ifndef CONF_RTC_PRESCALER
#define CONF_RTC_PRESCALER 0x0
#define CONF_RTC_PRESCALER 0xa
#endif

12
ports/atmel-samd/asf4_conf/samd21/hpl_sysctrl_config.h
View File

@ -197,7 +197,7 @@
// <i> Indicates whether configuration for External 32K Osc is enabled or not
// <id> enable_xosc32k
#ifndef CONF_XOSC32K_CONFIG
#define CONF_XOSC32K_CONFIG 0
#define CONF_XOSC32K_CONFIG 1
#endif
// <h> 32kHz External Crystal Oscillator (XOSC32K) Control
@ -205,7 +205,7 @@
// <i> Indicates whether External 32K Oscillator is enabled or not
// <id> xosc32k_arch_enable
#ifndef CONF_XOSC32K_ENABLE
#define CONF_XOSC32K_ENABLE 0
#define CONF_XOSC32K_ENABLE 1
#endif
// <q> On Demand
@ -223,7 +223,7 @@
// <i> If this bit is 1: The oscillator is not stopped in standby sleep mode.
// <id> xosc32k_arch_runstdby
#ifndef CONF_XOSC32K_RUNSTDBY
#define CONF_XOSC32K_RUNSTDBY 0
#define CONF_XOSC32K_RUNSTDBY 1
#endif
// <q> Enable 1K
@ -237,14 +237,14 @@
// <i> Enable 32 Khz Output
// <id> xosc32k_arch_en32k
#ifndef CONF_XOSC32K_EN32K
#define CONF_XOSC32K_EN32K 0
#define CONF_XOSC32K_EN32K 1
#endif
// <q> Enable XTAL
// <i> Enable XTAL
// <id> xosc32k_arch_xtalen
#ifndef CONF_XOSC32K_XTALEN
#define CONF_XOSC32K_XTALEN 0
#define CONF_XOSC32K_XTALEN 1
#endif
// <q> Write Lock
@ -274,7 +274,7 @@
// <i> Default: 122 us
// <id> xosc32k_arch_startup
#ifndef CONF_XOSC32K_STARTUP
#define CONF_XOSC32K_STARTUP CONF_XOSC32K_STARTUP_TIME_122MCS
#define CONF_XOSC32K_STARTUP CONF_XOSC32K_STARTUP_TIME_2000092MCS
#endif
// </h>

2
ports/atmel-samd/asf4_conf/samd21/peripheral_clk_config.h
View File

@ -321,7 +321,7 @@
// <i> Select the clock source for RTC.
#ifndef CONF_GCLK_RTC_SRC
#define CONF_GCLK_RTC_SRC GCLK_CLKCTRL_GEN_GCLK0_Val
#define CONF_GCLK_RTC_SRC GCLK_CLKCTRL_GEN_GCLK2_Val
#endif
/**

8
ports/atmel-samd/asf4_conf/samd51/hpl_gclk_config.h
View File

@ -172,7 +172,7 @@
// <i> Indicates whether generic clock 2 configuration is enabled or not
// <id> enable_gclk_gen_2
#ifndef CONF_GCLK_GENERATOR_2_CONFIG
#define CONF_GCLK_GENERATOR_2_CONFIG 0
#define CONF_GCLK_GENERATOR_2_CONFIG 1
#endif
// <h> Generic Clock Generator Control
@ -188,7 +188,7 @@
// <i> This defines the clock source for generic clock generator 2
// <id> gclk_gen_2_oscillator
#ifndef CONF_GCLK_GEN_2_SOURCE
#define CONF_GCLK_GEN_2_SOURCE GCLK_GENCTRL_SRC_XOSC1
#define CONF_GCLK_GEN_2_SOURCE GCLK_GENCTRL_SRC_XOSC32K
#endif
// <q> Run in Standby
@ -230,7 +230,7 @@
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
// <id> gclk_arch_gen_2_enable
#ifndef CONF_GCLK_GEN_2_GENEN
#define CONF_GCLK_GEN_2_GENEN 0
#define CONF_GCLK_GEN_2_GENEN 1
#endif
// </h>
@ -238,7 +238,7 @@
//<o> Generic clock generator 2 division <0x0000-0xFFFF>
// <id> gclk_gen_2_div
#ifndef CONF_GCLK_GEN_2_DIV
#define CONF_GCLK_GEN_2_DIV 1
#define CONF_GCLK_GEN_2_DIV 4
#endif
// </h>
// </e>

12
ports/atmel-samd/asf4_conf/samd51/hpl_osc32kctrl_config.h
View File

@ -23,7 +23,7 @@
// <q> Use 1 kHz output
// <id> rtc_1khz_selection
#ifndef CONF_RTCCTRL_1KHZ
#define CONF_RTCCTRL_1KHZ 1
#define CONF_RTCCTRL_1KHZ 0
#endif
#if CONF_RTCCTRL_SRC == GCLK_GENCTRL_SRC_OSCULP32K
@ -62,7 +62,7 @@
// <0x6=>8000092us
// <id> xosc32k_arch_startup
#ifndef CONF_XOSC32K_STARTUP
#define CONF_XOSC32K_STARTUP 0x0
#define CONF_XOSC32K_STARTUP 0x4
#endif
// <q> On Demand Control
@ -76,7 +76,7 @@
// <i> Indicates whether Run in Standby is enabled or not
// <id> xosc32k_arch_runstdby
#ifndef CONF_XOSC32K_RUNSTDBY
#define CONF_XOSC32K_RUNSTDBY 0
#define CONF_XOSC32K_RUNSTDBY 1
#endif
// <q> 1kHz Output Enable
@ -90,7 +90,7 @@
// <i> Indicates whether 32kHz Output is enabled or not
// <id> xosc32k_arch_en32k
#ifndef CONF_XOSC32K_EN32K
#define CONF_XOSC32K_EN32K 0
#define CONF_XOSC32K_EN32K 1
#endif
// <q> Clock Switch Back
@ -118,7 +118,7 @@
// <i> Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not
// <id> xosc32k_arch_xtalen
#ifndef CONF_XOSC32K_XTALEN
#define CONF_XOSC32K_XTALEN 0
#define CONF_XOSC32K_XTALEN 1
#endif
// <o> Control Gain Mode
@ -137,7 +137,7 @@
// <i> Indicates whether configuration for OSCULP32K is enabled or not
// <id> enable_osculp32k
#ifndef CONF_OSCULP32K_CONFIG
#define CONF_OSCULP32K_CONFIG 1
#define CONF_OSCULP32K_CONFIG 0
#endif
// <h> 32kHz Ultra Low Power Internal Oscillator Control

10
ports/atmel-samd/asf4_conf/samd51/hpl_rtc_config.h
View File

@ -10,6 +10,14 @@
#define CONF_RTC_ENABLE 1
#endif
// <q> Force reset RTC on initialization
// <i> Force RTC to reset on initialization.
// <i> Note that the previous power down data in RTC is lost if it's enabled.
// <id> rtc_arch_init_reset
#ifndef CONF_RTC_INIT_RESET
#define CONF_RTC_INIT_RESET 0
#endif
// <o> Prescaler configuration
// <0x0=>OFF(Peripheral clock divided by 1)
// <0x1=>Peripheral clock divided by 1
@ -26,7 +34,7 @@
// <i> These bits define the RTC clock relative to the peripheral clock
// <id> rtc_arch_prescaler
#ifndef CONF_RTC_PRESCALER
#define CONF_RTC_PRESCALER 0x0
#define CONF_RTC_PRESCALER 0xb
#endif

98
ports/atmel-samd/common-hal/rtc/RTC.c Normal file
View File

@ -0,0 +1,98 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2018 Noralf Trønnes
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <stdlib.h>
#include <peripheral_clk_config.h>
#include <hal_init.h>
#include <hpl_gclk_base.h>
#include <hpl_pm_base.h>
#include <hal_calendar.h>
#include "py/obj.h"
#include "py/runtime.h"
#include "lib/timeutils/timeutils.h"
#include "shared-bindings/rtc/__init__.h"
static struct calendar_descriptor calendar;
void rtc_init(void) {
#ifdef SAMD21
_gclk_enable_channel(RTC_GCLK_ID, CONF_GCLK_RTC_SRC);
#endif
#ifdef SAMD51
hri_mclk_set_APBAMASK_RTC_bit(MCLK);
#endif
calendar_init(&calendar, RTC);
calendar_set_baseyear(&calendar, 2000);
calendar_enable(&calendar);
}
void common_hal_rtc_get_time(timeutils_struct_time_t *tm) {
struct calendar_date_time datetime;
calendar_get_date_time(&calendar, &datetime);
tm->tm_year = datetime.date.year;
tm->tm_mon = datetime.date.month;
tm->tm_mday = datetime.date.day;
tm->tm_hour = datetime.time.hour;
tm->tm_min = datetime.time.min;
tm->tm_sec = datetime.time.sec;
}
void common_hal_rtc_set_time(timeutils_struct_time_t *tm) {
struct calendar_date date = {
.year = tm->tm_year,
.month = tm->tm_mon,
.day = tm->tm_mday,
};
calendar_set_date(&calendar, &date);
struct calendar_time time = {
.hour = tm->tm_hour,
.min = tm->tm_min,
.sec = tm->tm_sec,
};
calendar_set_time(&calendar, &time);
}
// A positive value speeds up the clock by removing clock cycles.
int common_hal_rtc_get_calibration(void) {
int calibration = hri_rtcmode0_read_FREQCORR_VALUE_bf(calendar.device.hw);
if (!hri_rtcmode0_get_FREQCORR_SIGN_bit(calendar.device.hw))
calibration = -calibration;
return calibration;
}
void common_hal_rtc_set_calibration(int calibration) {
if (calibration > 127 || calibration < -127)
mp_raise_ValueError("calibration value out of range +/-127");
hri_rtcmode0_write_FREQCORR_SIGN_bit(calendar.device.hw, calibration < 0 ? 0 : 1);
hri_rtcmode0_write_FREQCORR_VALUE_bf(calendar.device.hw, abs(calibration));
}

32
ports/atmel-samd/common-hal/rtc/RTC.h Normal file
View File

@ -0,0 +1,32 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2018 Noralf Trønnes
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_RTC_RTC_H
#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_RTC_RTC_H
extern void rtc_init(void);
#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_RTC_RTC_H

0
ports/atmel-samd/common-hal/rtc/__init__.c Normal file
View File

3
ports/atmel-samd/mpconfigport.h
View File

@ -166,6 +166,7 @@ extern const struct _mp_obj_module_t board_module;
extern const struct _mp_obj_module_t math_module;
extern const struct _mp_obj_module_t os_module;
extern const struct _mp_obj_module_t random_module;
extern const struct _mp_obj_module_t rtc_module;
extern const struct _mp_obj_module_t storage_module;
extern const struct _mp_obj_module_t struct_module;
extern const struct _mp_obj_module_t time_module;
@ -234,6 +235,7 @@ extern const struct _mp_obj_module_t usb_hid_module;
{ MP_OBJ_NEW_QSTR(MP_QSTR_os), (mp_obj_t)&os_module }, \
{ MP_OBJ_NEW_QSTR(MP_QSTR_pulseio), (mp_obj_t)&pulseio_module }, \
{ MP_OBJ_NEW_QSTR(MP_QSTR_random), (mp_obj_t)&random_module }, \
{ MP_OBJ_NEW_QSTR(MP_QSTR_rtc), (mp_obj_t)&rtc_module }, \
{ MP_OBJ_NEW_QSTR(MP_QSTR_storage), (mp_obj_t)&storage_module }, \
{ MP_OBJ_NEW_QSTR(MP_QSTR_struct), (mp_obj_t)&struct_module }, \
{ MP_OBJ_NEW_QSTR(MP_QSTR_supervisor), (mp_obj_t)&supervisor_module }, \
@ -266,6 +268,7 @@ extern const struct _mp_obj_module_t usb_hid_module;
const char *readline_hist[8]; \
vstr_t *repl_line; \
mp_obj_t playing_audio[AUDIO_DMA_CHANNEL_COUNT]; \
mp_obj_t rtc_time_source; \
FLASH_ROOT_POINTERS \
void run_background_tasks(void);

4
ports/atmel-samd/supervisor/port.c
View File

@ -52,7 +52,9 @@
#include "common-hal/pulseio/PulseIn.h"
#include "common-hal/pulseio/PulseOut.h"
#include "common-hal/pulseio/PWMOut.h"
#include "common-hal/rtc/RTC.h"
#include "common-hal/usb_hid/Device.h"
#include "shared-bindings/rtc/__init__.h"
#include "clocks.h"
#include "events.h"
#include "shared_dma.h"
@ -124,6 +126,7 @@ safe_mode_t port_init(void) {
// Configure millisecond timer initialization.
tick_init();
rtc_init();
// Init the nvm controller.
// struct nvm_config config_nvm;
@ -209,6 +212,7 @@ void reset_port(void) {
pulsein_reset();
pulseout_reset();
pwmout_reset();
rtc_reset();
reset_gclks();