For bare metal ARM & xtensa targets, passing -g will make the ELF file
larger but doesn't change the binary size. However, this means tools like
gdb, addr2line, etc can extract source-level information from the ELF.
Also standardise -ggdb to -g, these produce the exact same ELF file on
arm-none-eabi-gcc and will use DWARF format for all these ports.
rp2: change tud_task() to tud_task_ext().
mimxrt: use lib/tinyusb/src/portable/chipidea/ci_hs/dcd_ci_hs.c instead of
lib/tinyusb/src/portable/nxp/transdimension/dcd_transdimension.c.
nrf: add a definition for the changed tud_task(). tud_task() is changed
to tud_task_ext(), and the #define for backward compatibility is in
src/device/usbd.h.
The items I know which are fixed with this version:
- Fix for the SAMD USB lock-up.
- Support the MIMXRT11XX series of MCUs.
- Fix a wrong pin definition for MIMXRT1050_EVKB.
Tested with the MIMXRT boards, rp2 Pico, SAMD boards, nrf board.
All ports that use mbedtls use the custom error messages in
mp_mbedtls_errors.c. This commit simplifies the build so that ports don't
need to explicitly add this file, it's now used by default when mbedtls is
enabled.
Signed-off-by: Damien George <damien@micropython.org>
This uses MP_REGISTER_ROOT_POINTER() to register the readline_history root
pointer array used by shared/readline.c and removes the registration from
all mpconfigport.h files.
This also required adding a new MICROPY_READLINE_HISTORY_SIZE config option
since not all ports used the same sized array.
Signed-off-by: David Lechner <david@pybricks.com>
Replaces preprocessor macro for SDRAM option from #ifdef to #if in order to
allow always setting the define `MICROPY_HW_SDRAM_AVAIL` just with the
appropriate value 0/1. This eliminates one `if` in the Makefile.
This separates extmod source files from `py.mk`. Previously, `py.mk`
assumed that every consumer of the py/ directory also wanted to include
extmod/. However, this is not the case. For example, building mpy-cross
uses py/ but doesn't need extmod/.
This commit moves all extmod-specific items from `py.mk` to `extmod.mk` and
explicitly includes `extmod.mk` in ports that use it.
Signed-off-by: David Lechner <david@pybricks.com>
The following changes are made:
- Guard entire file with MICROPY_PY_LWIP, so it can be included in the
build while still being disabled (for consistency with other extmod
modules).
- Add modlwip.c to list of all extmod source in py/py.mk and
extmod/extmod.cmake so all ports can easily use it.
- Move generic modlwip GIT_SUBMODULES build configuration code from
ports/rp2/CMakeLists.txt to extmod/extmod.cmake, so it can be reused by
other ports.
- Remove now unnecessary inclusion of modlwip.c in EXTMOD_SRC_C in esp8266
port, and in SRC_QSTR in mimxrt port.
Signed-off-by: Damien George <damien@micropython.org>
The nxp_driver v2.10 allows for/requires some changes to the code:
- Remove some part of pwm_backlog.*, which is provided by the lib now.
- Change eth.c: the newer versions have additional parameters of the
library versions.
- Change sdcard.c: use TransferBlocking instead of TransferNonblocking.
- Add some support for the MIMXRT1176 device.
- Set the clocks for UART, I2C, Timer.
- Integrate the I2S module and fix a rebase error.
- Use blocking transfer only for SPI. It's faster and interferes less with
other modules.
- Use the clock_config.c files of library v2.8.5. The mimxrt files keeps
the clock_config.c files from Verson 2.8.5. With clock_config.c from
v2.10, the boards do not work. Refactoring of the clock set-up is on the
to-do list.
- Enable expiry timers for UART, I2C and SPI, avoiding a stall in library
code.
- The clock_config.* files are moved from the board-specific directories to
the boards directory and given a MCU related name.
Changes in this commit:
- Fix USB CDC RX handling to not block when unprocessed. The fix follows
5873390226.
- Fix dupterm rx.
- Remove some obsolete lines.
This commit adds support for machine.I2S on the mimxrt port. The I2S API
is consistent with the existing stm32, esp32, and rp2 implementations.
I2S features:
- controller transmit and controller receive
- 16-bit and 32-bit sample sizes
- mono and stereo formats
- sampling frequencies from 8kHz to 48kHz
- 3 modes of operation:
- blocking
- non-blocking with callback
- uasyncio
- configurable internal buffer
- optional MCK
Tested with the following development boards:
- MIMXRT1010_EVK, MIMXRT1015_EVK, MIMXRT1020_EVK, MIMXRT1050_EVK
- Teensy 4.0, Teensy 4.1
- Olimex RT1010
- Seeed ARCH MIX
Tested with the following I2S hardware peripherals:
- UDA1334
- GY-SPH0645LM4H
- WM8960 codec on board the MIMXRT boards and separate breakout board
- INMP441
- PCM5102
- SGTL5000 on the Teensy audio shield
Signed-off-by: Mike Teachman <mike.teachman@gmail.com>
OCOTP_Init() has been removed from mphalport.c. The library files are
missing for the MIMXRT1015, and for just reading the OCOTP the Init is not
required.
If in a board's mkconfigboard.mk the following symbol is set:
MICROPY_HW_BOARD_FLASH_FILES = 1
then the files:
($BOARD)_flexspi_flash_config.h and
qspi_nor_flash_config.c and/or
qspi_hyper_flash_config.c
are expected in the board directory. Otherwise the common files from
the hal directory are used.
- Move the qspi_xxxx_flash_config.c files to hal.
It turned out that they are less board than flash type specific.
- Change to a common flexspi_flash_config.h header file.
Thanks for the hint, Damien. The DEBUG build got very large recently.
The major difference is, that inline function are now inlined and
not included as a function. That's good and maybe bad. The good thing is,
that the code speed si now close to the final code. It could be worse
in single step debugging. I'll see.
Setting this option caused a new warning and a formatting error
to pop up at different places. Fixed as well.
Just another choice for the PHY interface.
Added: Keyword option phy_clock=LAN.IN or LAN.OUT
to define the source of the 50MHZ clock for the PHY
interface. The RMII clock is not enabled if it
is generated by a PYH board. Constants:
LAN.IN The clock is provided by the PHY board.
LAN.OUT The clock is provided by the MCU board.
The default is LAN.OUT or the value set in mpconfigboard.h, which
is currently set to IN only for the SEEED ARCH MIX board. Usage etc:
lan = LAN(phy_type=LAN.PHY_DP83848, phy_clock=LAN.IN)
Frequency range 15Hz/18Hz to > 1 MHz, with decreasing resolution of the
duty cycle. The basic API is supported as documentated, except that
keyword parameters are accepted for both the instatiaton and the
PWM.init() call.
Extensions: support PWM for channel pairs. Channel pairs are declared by
supplying 2-element tuples for the pins. The two channels of a pair must
be the A/B channel of a FLEXPWM module. These form than a complementary
pair.
Additional supported keyword arguments:
- center=value Defines the center position of a pulse within the pulse
cycle. The align keyword is actually shortcut for center.
- sync=True|False: If set to True, the channels will be synchronized to a
submodule 0 channel, which has already to be enabled.
- align=PWM.MIDDLE | PMW.BEGIN | PWM.END. It defines, whether synchronized
channels are Center-Aligned or Edge-aligned. The channels must be either
complementary a channel pair or a group of synchronized channels. It may
as well be applied to a single channel, but withiout any benefit.
- invert= 0..3. Controls ouput inversion of the pins. Bit 0 controls the
first pin, bit 1 the second.
- deadtime=time_ns time of complementary channels for delaying the rising
slope.
- xor=0|1|2 xor causes the output of channel A and B to be xored. If
applied to a X channel, it shows the value oif A ^ B. If applied to an A
or B channel, both channel show the xored signal for xor=1. For xor=2,
the xored signal is split between channels A and B. See also the
Reference Manual, chapter about double pulses. The behavior of xor=2 can
also be achieved using the center method for locating a pulse within a
clock period.
The output is enabled for board pins only.
CPU pins may still be used for FLEXPWM, e.g. as sync source, but the signal
will not be routed to the output. That applies only to FLEXPWM pins. The
use of QTMR pins which are not board pins will be rejected.
As part of this commit, the _WFE() statement is removed from
ticks_delay_us64() to prevent PWM glitching during calls to sleep().
The API follows that of rp2, stm32, esp32, and the docs.
wdt=machine.WDT(0, timeout)
Timeout is given in ms. The valid range is 500 to 128000 (128
seconds) with 500 ms granularity. Values outside of that range will
be silently aligned.
wdt.feed()
Resets the watchdog timer (feeding).
wdt.timeout_ms(value)
Sets a new timeout and feeds the watchdog.
This is a new, preliminary method which is not yet documented.
reset_cause = machine.reset_cause()
Values returned:
1 Power On reset
3 Watchdog reset
5 Software reset: state after calling machine.reset()
More elaborate API functions are supported by the MCU, like an interrupt
called a certain time after feeding. But for port cosistency that is not
implemented.
This commit implements 10/100 Mbit Ethernet support in the mimxrt port.
The following boards are configured without ETH network:
- MIMXRT1010_EVK
- Teensy 4.0
The following boards are configured with ETH network:
- MIMXRT1020_EVK
- MIMXRT1050_EVK
- MIMXRT1060_EVK
- MIMXRT1064_EVK
- Teensy 4.1
Ethernet support tested with TEENSY 4.1, MIMRTX1020_EVK and MIMXRT1050_EVK.
Build tested with Teensy 4.0 and MIMXRT1010_EVK to be still working.
Compiles and builds properly for MIMXRT1060_EVK and MIMXRT1064_EVK, but not
tested lacking suitable boards.
Tested functions are:
- ping works bothway
- simple UDP transfer works bothway
- ntptime works
- the ftp server works
- secure socker works
- telnet and webrepl works
The MAC address is 0x02 plus 5 bytes from the manifacturing info field,
which can be considered as unique per device.
Some boards do not wire the RESET and INT pin of the PHY transceiver. For
operation, these are not required. If they are defined, they will be used.
Adds support for SDRAM via `SEMC` peripheral. SDRAM support can be
enabled in the mpconfigboard.mk file by setting `MICROPY_HW_SDRAM_AVAIL`
to `1` and poviding the size of the RAM via `MICROPY_HW_FLASH_SIZE`.
When SDRAM support is enabled the whole SDRAM is currently used used
for MicroPython heap.
Signed-off-by: Philipp Ebensberger
- Moves definition of BOARD_FLASH_SIZE and other header files related to
flash configuration into the Makefile.
- Adds board specific clock_config.h.
- Adds board.h, pin_mux.h, and peripherals.h as they are
required by NXP MCU SDK in order to use our own clock_config.h.
- Renames board specific FlexSPI configuration files.
- Updates flash frequency of MIMXRT1020_EVK
- Creates separated flash_config files for QSPI NOR and
QSPI Hyper flash.
- Unifies VFS start address to be @ 1M for 1010 and 1020 boards.
- Unifies 1050EVK boards
- Adds support to both NOR and HyperFlash on boards with
both capabilities.
- Adds automatic FlexRAM initialization to start-up code based on
linker script and NXP HAL.
- Applies code formatting to all files in mimxrt port.
With this change the flash configuration is restructured and
organized. This simplifies the configuration process and
provides a better overview of each board's settings. With the integration
of clock_config.h, board.h, pin_mux.h, and peripherals.h we gain better
control of the settings and clock configurations. Furthermore the
implementation of an explicit FlexRAM setup improves the system
performance and allows for performance tuning.
Signed-off-by: Philipp Ebensberger
Following the code example for ESP32 of Jim Mussard.
As a side effect:
- mp_hal_ticks_cpu() was implemented,
- mp_hal_get_cpu_freq() and mp_hal_ticks_cpu_init() were added and used.
- mp_hal_pin_high() and mp_hal_pin_low() were changed for symmetry
- Configures `PLL2->PFD0` with **198MHz** as base clock of
`USDHCx` peripheral.
- Adds guards for SDCard related files via `MICROPY_PY_MACHINE_SDCARD`
- Adds creation of pin defines for SDCard to make-pins.py
- Adds new configuration option for SDCard peripheral pinout
to mpconfigport.h
- Adds interrupt handling support instead of polling
- Adds support for `ADMA2` powered data transfer
- Configures SDCard to run in HS (high-speed mode) with **50MHz** only!
SDCard support is optional and requires `USDHC` peripheral.
Thus this driver is not available on `MIMXRT1010_EVK`.
SDCard support is enabled by setting `MICROPY_PY_MACHINE_SDCARD = 1`
in mpconfigboard.mk.
Signed-off-by: Philipp Ebensberger
Hyperflash is used by the MIMXRT1050_EVKB, MIMXRT1060_EVK and
MIMXRT1064_EVK boards.
This commit includes:
- add support for Hyperflash
- modify MIMXRT1060_EVK and MIMXRT1064_EVK to change from QSPI to
hyperflash.
- minor incidental changes to other boards so they still build
Note: Erasing a sector on the hyperflash is slow. It takes about a second,
which seems too long, but matches the data sheet.
The firmware for Teensy 4.0, Teensy 4.1 and MIMXRT1020_EVK are created.
Users of other MIMXRT10xx_EVK boards should be able to build the firmware
themselves, they might need specific DEBUG settings.
The Makefile had to be changed in order to build the .bin file as well.
This class supports SPI bus controller mode, with blocking transfers.
SPI device numbers start at 0, to comply with the pinout of the Teensy
boards. With the configured clock frequency the fastest baud rate is
33MHz. For messages longer 16 bytes DMA is used. The class uses the
existing framework with extmod/machine_spi.c.
Extended driver options:
- drive=n with n being between 1 and 6 or PIN.POWER_1 to PIN.POWER_6.
Since the pins used by the SPI are fixed, no Pin settings can be made.
Thus the drive option is added allowing to control ringing and crosstalk
on the connection.
- gap_ns=nnnnn is the time between sent data items in a frame given in ns.
Default is 2 clock cycles.
The implementation uses the LPUARTx devices. Up to 8 UARTs can be used,
given that the pins are accessible. E.g. 8 on Teensy 4.1, 5 on
MIMXRT1020_EVK.
For Tennsy 4.0 and 4.1 the UART numbers are as printed on the pinout 1..N.
The MIMXRT10xx-EVK boards have only one UART named, which gets the number
1. All other UART are assigned to different Pins:
MIMXRT1010-EVK:
D0/D1 UART 1
D6/D7 UART 2
A0/D4 UART 3
MIMXRT1020-EVK:
D0/D1 UART 1
D6/D9 UART 2
D10/D12 UART 3
D14/D15 UART 4
A0/A1 UART 5
MIMXRT1050-EVK, MIMXRT1060-EVK, MIMXRT1064-EVK:
D0/D1 UART 1
D7/D6 UART 2
D8/D9 UART 3
A1/A0 UART 4
Initial version, using the LP RTC clock. It provides setting the date and
time with rtc.init() or rtc.datetime(), and reading the date and time with
rtc.datetime() or rtc.now(). The method weekday() reports the weekday of
the current date. It starts with 0 for Monday.
The tuple order for datetime() and now() matches the CPython sequence:
(year, month, day, hour, minute, second, microsecond, TZ). TZ is ignored
and reported as None. Microsecond is provided at a best effort.
If a battery is not supplied, the default boot date/time is 1970/1/1 0:0:0.
With a battery, the clock continues to run even when the board is not
powered. The clock is quite precise. If not, using rtc.calibration() may
help.
It supports three hardware timer channels based on the PIT timers of the
MIMXRT MCU. The timer id's are 0, 1 and 2. On soft reboot all active
timers will be stopped via finalisers.
This is required since the Teensy Halfkay loader attempts to erase all of
the flash but fails to do so, at least in my tests. Formatting brings it
back to a known state.
This commit adds full support for a filesystem on all boards, with a block
device object mimxrt.Flash() and uos.VfsLfs2 enabled.
Main changes are:
- Refactoring of linker scripts to accomodate reserved area for VFS. VFS
will take up most of the available flash. 1M is reserved for code. 9K is
reserved for flash configuration, interrupts, etc.
- Addition of _boot.py with filesystem init code, called from main.c.
- Definition of the mimxrt module with a Flash class in modmimxrt.[ch].
- Implementation of a flash driver class in mimxrt_flash.c. All flashing
related functions are stored in ITCM RAM.
- Addition of the uos module with filesystem functions.
- Implementation of uos.urandom() for the sake of completeness of the uos
module.
It uses sample code from CircuitPython supplied under MIT license, which
uses the NXP SDK example code.
Done in collaboration with Philipp Ebensberger aka @alphaFred who
contributed the essential part to enable writing to flash while code is
executing, among other things.
- modified pin type from pin_obj_t to machine_pin_obj_t
- created machine_pin.c
- implemented basic version of make-pins.py to genertate pins.c/.h files
automatically; the only alternate function currently supported is GPIO
- added af.csv files for all supported MCUs
- replaced pins.c/pins.h files with pin.csv for all boards
- implemented on/off/high/low/value/init methods
- Implemented IN/OUT/OPEN_DRAIN modes
- modified LDFLAGS for DEBUG build to get usefull .elf file for debugging
Signed-off-by: Philipp Ebensberger
SysTick cannot wake the CPU from WFI/WFE so a hardware timer is needed to
keep track of ticks/delay (similar to the nrf port).
Fixes issue #7234.
Signed-off-by: Damien George <damien@micropython.org>
