- define CIRCUITPY_BUILD_EXTENSIONS to predefined values
- set CIRCUITPY_BUILD_EXTENSIONS in port and board config
- reuse the support matrix "get_settings_from_makefile" to get it
- move the existing port and board specific values
- remove the C3 specific board values because it's not the default
- update build_release_files.py to use get_settings_from_makefile
- Based on espressif/nimble's blecent example code. Confirms that the characteristic is not empty before trying to catalogue its descriptors.
- Running ble_gattc_disc_all_dscs on empty (no length) characteristics fails with the (not-very-informative) BLE_HS_EINVAL error if this check is not performed.
.. this makes reconnecting without a full reset not work.
Because this works on other generations of the esp32 (c2, c3, etc),
apply this behavior only to esp32.
After this change, it's possible to connect multiple times to wifi in
different runs of code.py or the repl after soft rebooting.
Format:
CIRCUITPY_BLE_NAME = My BLE Board
- the length is limited to 31 characters
- for the NRF version it repeatedly truncates the name if it's too long
- the ESP version defaults to "nimble" if the name is too long
rather than setting the heap size statically, micropython allocates
the biggest contiguous chunk possible, but in no event more than half the
total internal sram. On esp32 this gives 123728 bytes of `gc.mem_free`
in the repl.
Also, change error handling so that the esp-idf error number
is shown in the traceback in the case of an error.
This allows scanning & connecting to work. I didn't try requests yet.
esp32 places the psram start at SOC_EXTRAM_DATA_LOW and it can extend
up to SOC_EXTRAM_DATA_SIZE. This is different than esp32-s2 and later,
which place the end at EXTRAM_DATA_HIGH and the limitation of
SOC_EXTRAM_DATA_SIZE was not previously identified as important.
Additionally, the esp32 has a reserved area within himem which was
not being accounted for.
With this change, the Feather ESP32 V2 feather can be used via thonny,
and the other "quick memory corruption tests" I was performing
also all succeed instead of failing.
Before this change, the incorrect address being used for spiram was
0x3fa00000..0x3fc00000 (2MiB). Now, it's 0x3f800000..0x3f9c0000 (1.75MiB)
due to the reserved area and the changed start address.
This is intended to be a no-effect change for other espressif chips besides
original esp32.
addr2line can show information about how functions were inlined,
including function names
Typical new output:
```
0x400dec57: mp_obj_get_type at /home/jepler/src/circuitpython/ports/espressif/../../py/obj.c:68
(inlined by) mp_obj_print_helper at /home/jepler/src/circuitpython/ports/espressif/../../py/obj.c:133
(inlined by) mp_obj_print_helper at /home/jepler/src/circuitpython/ports/espressif/../../py/obj.c:114
0x400e1a25: fun_builtin_1_call at /home/jepler/src/circuitpython/ports/espressif/../../py/objfun.c:75
0x400dd016: mp_call_function_n_kw at /home/jepler/src/circuitpython/ports/espressif/../../py/runtime.c:665
0x400eac99: mp_execute_bytecode at /home/jepler/src/circuitpython/ports/espressif/../../py/vm.c:936
0x400e1ae9: fun_bc_call at /home/jepler/src/circuitpython/ports/espressif/../../py/objfun.c:297 (discriminator 4)
0x400dd016: mp_call_function_n_kw at /home/jepler/src/circuitpython/ports/espressif/../../py/runtime.c:665
0x400dd03a: mp_call_function_0 at /home/jepler/src/circuitpython/ports/espressif/../../py/runtime.c:638
0x40117c03: parse_compile_execute at /home/jepler/src/circuitpython/ports/espressif/../../shared/runtime/pyexec.c:146
0x4011800d: pyexec_friendly_repl at /home/jepler/src/circuitpython/ports/espressif/../../shared/runtime/pyexec.c:734
0x400eeded: run_repl at /home/jepler/src/circuitpython/ports/espressif/../../main.c:823
(inlined by) main at /home/jepler/src/circuitpython/ports/espressif/../../main.c:922
0x400ef5e3: app_main at /home/jepler/src/circuitpython/ports/espressif/supervisor/port.c:410
0x401bb461: main_task at /home/jepler/src/circuitpython/ports/espressif/build-adafruit_feather_esp32_v2/esp-idf/../../esp-idf/components/freertos/port/port_common.c:141
```
This adds support for CIRCUITPY_WIFI_SSID and CIRCUITPY_WIFI_PASSWORD
in `/.env`. When both are defined, CircuitPython will attempt to
connect to the network even when user code isn't running. If the
user code attempts to a network with the same SSID, it will return
immediately. Connecting to another SSID will disconnect from the
auto-connected network. If the user code initiates the connection,
then it will be shutdown after user code exits. (Should match <8
behavior.)
This PR also reworks the default displayio terminal. It now supports
a title bar TileGrid in addition to the (newly renamed) scroll area.
The default title bar is the top row of the display and is positioned
to the right of the Blinka logo when it is enabled. The scroll area
is now below the Blinka logo.
The Wi-Fi auto-connect code now uses the title bar to show its
state including the IP address when connected. It does this through
the "standard" OSC control sequence `ESC ] 0 ; <s> ESC \` where <s>
is the title bar string. This is commonly supported by terminals
so it should work over USB and UART as well.
Related to #6174
Use this function instead of several individual configuration functions
to configure such things as Baud rate, transfer size, stop bits,
parity...
This function also resets both the RX and TX Hardware Fifo
reset functions are called to setup the hardware.
This allows the compile stage to optimize most of the translate()
function away and saves a ton of space (~40k on ESP). *However*, it
requires us to wait for the qstr output before we compile the rest
of our .o files. (Only qstr.o used to wait.)
This isn't as good as the current setup with LTO though. Trinket M0
loses <1k with this setup.
So, we should probably conditionalize this along with LTO.
This lets the BLE stack run through the wait period after a VM run
when it may be waiting for more writes due to an auto-reload.
User BLE functionality will have their events stopped. Scanning and
advertising is also stopped.
