2019-06-28 15:36:08 -04:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
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2019-07-24 14:21:27 -04:00
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* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
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2019-06-28 15:36:08 -04:00
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include "supervisor/port.h"
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2020-12-02 21:05:29 -05:00
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#include "supervisor/board.h"
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2020-03-20 15:58:34 -04:00
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#include "lib/timeutils/timeutils.h"
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2019-07-18 17:55:57 -04:00
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2019-09-12 13:47:01 -04:00
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#include "common-hal/microcontroller/Pin.h"
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2020-04-13 12:03:05 -04:00
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#if CIRCUITPY_BUSIO
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2019-09-19 16:02:52 -04:00
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#include "common-hal/busio/I2C.h"
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2019-09-27 17:59:55 -04:00
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#include "common-hal/busio/SPI.h"
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2019-10-04 14:37:18 -04:00
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#include "common-hal/busio/UART.h"
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2020-04-13 12:03:05 -04:00
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#endif
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#if CIRCUITPY_PULSEIO
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2020-02-29 14:44:33 -05:00
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#include "common-hal/pulseio/PulseOut.h"
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2020-03-10 17:16:31 -04:00
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#include "common-hal/pulseio/PulseIn.h"
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2020-08-18 16:08:33 -04:00
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#endif
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#if CIRCUITPY_PWMIO
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#include "common-hal/pwmio/PWMOut.h"
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#endif
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#if CIRCUITPY_PULSEIO || CIRCUITPY_PWMIO
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2021-03-11 17:50:05 -05:00
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#include "peripherals/timers.h"
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2020-03-17 18:26:13 -04:00
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#endif
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2020-06-26 11:13:02 -04:00
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#if CIRCUITPY_SDIOIO
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#include "common-hal/sdioio/SDCard.h"
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#endif
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2021-03-02 11:41:53 -05:00
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#if CIRCUITPY_PULSEIO || CIRCUITPY_ALARM
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2021-03-11 17:50:05 -05:00
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#include "peripherals/exti.h"
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2021-03-02 11:41:53 -05:00
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#endif
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2019-07-18 17:55:57 -04:00
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2021-03-11 17:50:05 -05:00
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#include "peripherals/clocks.h"
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#include "peripherals/gpio.h"
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#include "peripherals/rtc.h"
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2019-07-18 17:55:57 -04:00
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2020-04-20 21:25:13 -04:00
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#include STM32_HAL_H
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2020-09-24 12:20:32 -04:00
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void NVIC_SystemReset(void) NORETURN;
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2020-06-09 18:01:52 -04:00
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#if (CPY_STM32H7) || (CPY_STM32F7)
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2020-04-02 16:15:12 -04:00
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// Device memories must be accessed in order.
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#define DEVICE 2
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// Normal memory can have accesses reorder and prefetched.
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#define NORMAL 0
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// Prevents instruction access.
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#define NO_EXECUTION 1
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#define EXECUTION 0
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// Shareable if the memory system manages coherency.
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#define NOT_SHAREABLE 0
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#define SHAREABLE 1
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#define NOT_CACHEABLE 0
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#define CACHEABLE 1
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#define NOT_BUFFERABLE 0
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#define BUFFERABLE 1
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#define NO_SUBREGIONS 0
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extern uint32_t _ld_stack_top;
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extern uint32_t _ld_d1_ram_bss_start;
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extern uint32_t _ld_d1_ram_bss_size;
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extern uint32_t _ld_d1_ram_data_destination;
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extern uint32_t _ld_d1_ram_data_size;
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extern uint32_t _ld_d1_ram_data_flash_copy;
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extern uint32_t _ld_dtcm_bss_start;
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extern uint32_t _ld_dtcm_bss_size;
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extern uint32_t _ld_dtcm_data_destination;
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extern uint32_t _ld_dtcm_data_size;
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extern uint32_t _ld_dtcm_data_flash_copy;
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extern uint32_t _ld_itcm_destination;
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extern uint32_t _ld_itcm_size;
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extern uint32_t _ld_itcm_flash_copy;
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extern void main(void);
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extern void SystemInit(void);
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2020-06-09 18:01:52 -04:00
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// This replaces the Reset_Handler in gcc/startup_*.s, calls SystemInit from system_*.c
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2020-04-02 16:15:12 -04:00
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__attribute__((used, naked)) void Reset_Handler(void) {
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__disable_irq();
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__set_MSP((uint32_t) &_ld_stack_top);
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/* Disable MPU */
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ARM_MPU_Disable();
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// Copy all of the itcm code to run from ITCM. Do this while the MPU is disabled because we write
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// protect it.
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for (uint32_t i = 0; i < ((size_t) &_ld_itcm_size) / 4; i++) {
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(&_ld_itcm_destination)[i] = (&_ld_itcm_flash_copy)[i];
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}
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// The first number in RBAR is the region number. When searching for a policy, the region with
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// the highest number wins. If none match, then the default policy set at enable applies.
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2020-04-20 21:25:13 -04:00
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// Mark all the flash the same until instructed otherwise.
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2020-04-02 16:15:12 -04:00
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MPU->RBAR = ARM_MPU_RBAR(11, 0x08000000U);
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2020-06-09 18:01:52 -04:00
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MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, CPY_FLASH_REGION_SIZE);
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2020-04-02 16:15:12 -04:00
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// This the ITCM. Set it to read-only because we've loaded everything already and it's easy to
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// accidentally write the wrong value to 0x00000000 (aka NULL).
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MPU->RBAR = ARM_MPU_RBAR(12, 0x00000000U);
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2020-06-09 18:01:52 -04:00
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MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_RO, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, CPY_ITCM_REGION_SIZE);
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2020-04-02 16:15:12 -04:00
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// This the DTCM.
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MPU->RBAR = ARM_MPU_RBAR(14, 0x20000000U);
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2020-06-09 18:01:52 -04:00
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MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, CPY_DTCM_REGION_SIZE);
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2020-04-02 16:15:12 -04:00
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// This is AXI SRAM (D1).
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2020-06-09 18:01:52 -04:00
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MPU->RBAR = ARM_MPU_RBAR(15, CPY_SRAM_START_ADDR);
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MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, CPY_SRAM_SUBMASK, CPY_SRAM_REGION_SIZE);
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2020-04-02 16:15:12 -04:00
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/* Enable MPU */
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ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
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2019-09-12 13:47:01 -04:00
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2020-04-02 16:15:12 -04:00
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// Copy all of the data to run from DTCM.
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for (uint32_t i = 0; i < ((size_t) &_ld_dtcm_data_size) / 4; i++) {
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(&_ld_dtcm_data_destination)[i] = (&_ld_dtcm_data_flash_copy)[i];
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}
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// Clear DTCM bss.
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for (uint32_t i = 0; i < ((size_t) &_ld_dtcm_bss_size) / 4; i++) {
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(&_ld_dtcm_bss_start)[i] = 0;
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}
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2019-07-18 17:55:57 -04:00
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2020-04-02 16:15:12 -04:00
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// Copy all of the data to run from D1 RAM.
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for (uint32_t i = 0; i < ((size_t) &_ld_d1_ram_data_size) / 4; i++) {
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(&_ld_d1_ram_data_destination)[i] = (&_ld_d1_ram_data_flash_copy)[i];
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}
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// Clear D1 RAM bss.
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for (uint32_t i = 0; i < ((size_t) &_ld_d1_ram_bss_size) / 4; i++) {
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(&_ld_d1_ram_bss_start)[i] = 0;
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}
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SystemInit();
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__enable_irq();
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main();
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}
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#endif //end H7 specific code
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2019-07-18 17:55:57 -04:00
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2020-06-05 11:42:34 -04:00
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// Low power clock variables
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static volatile uint32_t systick_ms;
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2020-03-23 17:46:25 -04:00
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2019-06-28 15:36:08 -04:00
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safe_mode_t port_init(void) {
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2020-06-05 11:42:34 -04:00
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HAL_Init(); // Turns on SysTick
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2019-09-18 16:49:15 -04:00
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__HAL_RCC_SYSCFG_CLK_ENABLE();
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2019-06-28 15:36:08 -04:00
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2020-05-11 18:02:40 -04:00
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#if (CPY_STM32F4)
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2020-03-17 18:26:13 -04:00
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__HAL_RCC_PWR_CLK_ENABLE();
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#endif
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2019-06-28 15:36:08 -04:00
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2021-03-21 13:15:44 -04:00
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__HAL_RCC_BACKUPRESET_FORCE();
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__HAL_RCC_BACKUPRESET_RELEASE();
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2020-03-17 18:26:13 -04:00
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stm32_peripherals_clocks_init();
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stm32_peripherals_gpio_init();
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2021-03-11 17:50:05 -05:00
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stm32_peripherals_rtc_init();
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2020-04-08 17:41:57 -04:00
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2021-03-21 13:15:44 -04:00
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__HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU);
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stm32_peripherals_reset_alarms();
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2020-06-05 11:42:34 -04:00
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// Turn off SysTick
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SysTick->CTRL = 0;
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2019-06-28 15:36:08 -04:00
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return NO_SAFE_MODE;
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}
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2020-06-05 11:42:34 -04:00
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void HAL_Delay(uint32_t delay_ms) {
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if (SysTick->CTRL != 0) {
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// SysTick is on, so use it
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uint32_t tickstart = systick_ms;
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while (systick_ms - tickstart < delay_ms) {
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}
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} else {
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mp_hal_delay_ms(delay_ms);
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}
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}
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uint32_t HAL_GetTick() {
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if (SysTick->CTRL != 0) {
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return systick_ms;
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} else {
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uint8_t subticks;
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uint32_t result = (uint32_t)port_get_raw_ticks(&subticks);
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return result;
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}
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}
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2020-03-20 15:58:34 -04:00
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void SysTick_Handler(void) {
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2020-06-05 11:42:34 -04:00
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systick_ms += 1;
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2020-03-20 15:58:34 -04:00
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// Read the CTRL register to clear the SysTick interrupt.
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SysTick->CTRL;
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}
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2019-06-28 15:36:08 -04:00
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void reset_port(void) {
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2019-11-12 11:26:14 -05:00
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reset_all_pins();
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2020-04-13 12:03:05 -04:00
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#if CIRCUITPY_BUSIO
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2019-09-19 16:02:52 -04:00
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i2c_reset();
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2019-09-27 17:59:55 -04:00
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spi_reset();
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2019-10-04 14:37:18 -04:00
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uart_reset();
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2020-04-13 12:03:05 -04:00
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#endif
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2020-07-24 17:34:13 -04:00
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#if CIRCUITPY_SDIOIO
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2020-06-26 11:13:02 -04:00
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sdioio_reset();
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#endif
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2020-08-18 16:08:33 -04:00
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#if CIRCUITPY_PULSEIO || CIRCUITPY_PWMIO
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2020-07-01 10:07:45 -04:00
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timers_reset();
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2020-08-18 16:08:33 -04:00
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#endif
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#if CIRCUITPY_PULSEIO
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2020-02-29 14:44:33 -05:00
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pulseout_reset();
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2020-03-10 17:16:31 -04:00
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pulsein_reset();
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2020-04-13 12:03:05 -04:00
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#endif
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2020-08-18 16:08:33 -04:00
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#if CIRCUITPY_PWMIO
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pwmout_reset();
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#endif
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2021-03-02 11:41:53 -05:00
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#if CIRCUITPY_PULSEIO || CIRCUITPY_ALARM
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exti_reset();
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#endif
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2021-03-21 13:15:44 -04:00
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// TEMP: set up interrupt logging pins
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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GPIO_InitStruct.Pin = GPIO_PIN_6 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_7;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = GPIO_PIN_8 | GPIO_PIN_9;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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// TEMP: ping port init
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HAL_GPIO_WritePin(GPIOB,GPIO_PIN_8,1);
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HAL_GPIO_WritePin(GPIOB,GPIO_PIN_8,0);
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2019-06-28 15:36:08 -04:00
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}
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void reset_to_bootloader(void) {
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2020-09-24 12:20:32 -04:00
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NVIC_SystemReset();
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2019-06-28 15:36:08 -04:00
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}
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void reset_cpu(void) {
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2019-11-12 11:26:14 -05:00
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NVIC_SystemReset();
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2019-06-28 15:36:08 -04:00
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}
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2020-04-02 16:15:12 -04:00
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extern uint32_t _ld_heap_start, _ld_heap_end, _ld_stack_top, _ld_stack_bottom;
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2020-01-18 21:06:56 -05:00
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uint32_t *port_heap_get_bottom(void) {
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2020-04-02 16:15:12 -04:00
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return &_ld_heap_start;
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2020-01-18 21:06:56 -05:00
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}
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uint32_t *port_heap_get_top(void) {
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2020-04-02 16:15:12 -04:00
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return &_ld_heap_end;
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2020-01-18 21:06:56 -05:00
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}
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2020-10-11 08:59:33 -04:00
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bool port_has_fixed_stack(void) {
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return false;
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2020-05-15 19:22:33 -04:00
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}
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2019-10-18 05:00:09 -04:00
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uint32_t *port_stack_get_limit(void) {
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2020-04-20 21:25:13 -04:00
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return &_ld_stack_bottom;
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2019-10-18 05:00:09 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t *port_stack_get_top(void) {
|
2020-04-02 16:15:12 -04:00
|
|
|
return &_ld_stack_top;
|
2019-10-18 05:00:09 -04:00
|
|
|
}
|
|
|
|
|
2019-06-28 15:36:08 -04:00
|
|
|
extern uint32_t _ebss;
|
2020-04-15 10:18:09 -04:00
|
|
|
|
2019-06-28 15:36:08 -04:00
|
|
|
// Place the word to save just after our BSS section that gets blanked.
|
|
|
|
void port_set_saved_word(uint32_t value) {
|
|
|
|
_ebss = value;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t port_get_saved_word(void) {
|
|
|
|
return _ebss;
|
|
|
|
}
|
|
|
|
|
2020-04-02 16:15:12 -04:00
|
|
|
__attribute__((used)) void MemManage_Handler(void)
|
|
|
|
{
|
|
|
|
reset_into_safe_mode(MEM_MANAGE);
|
|
|
|
while (true) {
|
|
|
|
asm("nop;");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
__attribute__((used)) void BusFault_Handler(void)
|
|
|
|
{
|
|
|
|
reset_into_safe_mode(MEM_MANAGE);
|
|
|
|
while (true) {
|
|
|
|
asm("nop;");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
__attribute__((used)) void UsageFault_Handler(void)
|
|
|
|
{
|
|
|
|
reset_into_safe_mode(MEM_MANAGE);
|
|
|
|
while (true) {
|
|
|
|
asm("nop;");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
__attribute__((used)) void HardFault_Handler(void)
|
|
|
|
{
|
2019-11-12 11:26:14 -05:00
|
|
|
reset_into_safe_mode(HARD_CRASH);
|
2019-09-12 13:47:01 -04:00
|
|
|
while (true) {
|
|
|
|
asm("nop;");
|
|
|
|
}
|
2019-08-14 13:14:42 -04:00
|
|
|
}
|
2020-03-20 15:58:34 -04:00
|
|
|
|
|
|
|
uint64_t port_get_raw_ticks(uint8_t* subticks) {
|
2021-03-11 17:50:05 -05:00
|
|
|
return stm32_peripherals_rtc_raw_ticks(subticks);
|
2020-03-20 15:58:34 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// Enable 1/1024 second tick.
|
|
|
|
void port_enable_tick(void) {
|
2021-03-11 17:50:05 -05:00
|
|
|
stm32_peripherals_rtc_set_wakeup_mode_tick();
|
|
|
|
stm32_peripherals_rtc_assign_wkup_callback(supervisor_tick);
|
|
|
|
stm32_peripherals_rtc_enable_wakeup_timer();
|
2020-03-20 15:58:34 -04:00
|
|
|
}
|
2021-03-11 17:50:05 -05:00
|
|
|
// TODO: what is this? can I get rid of it?
|
2020-03-20 15:58:34 -04:00
|
|
|
extern volatile uint32_t autoreload_delay_ms;
|
|
|
|
|
|
|
|
// Disable 1/1024 second tick.
|
|
|
|
void port_disable_tick(void) {
|
2021-03-11 17:50:05 -05:00
|
|
|
stm32_peripherals_rtc_disable_wakeup_timer();
|
2020-03-20 15:58:34 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
void port_interrupt_after_ticks(uint32_t ticks) {
|
2021-03-11 17:50:05 -05:00
|
|
|
stm32_peripherals_rtc_set_alarm(PERIPHERALS_ALARM_A, ticks);
|
2020-03-20 15:58:34 -04:00
|
|
|
}
|
|
|
|
|
2020-12-02 21:05:29 -05:00
|
|
|
void port_idle_until_interrupt(void) {
|
2020-03-20 15:58:34 -04:00
|
|
|
// Clear the FPU interrupt because it can prevent us from sleeping.
|
|
|
|
if (__get_FPSCR() & ~(0x9f)) {
|
|
|
|
__set_FPSCR(__get_FPSCR() & ~(0x9f));
|
|
|
|
(void) __get_FPSCR();
|
|
|
|
}
|
2021-03-11 17:50:05 -05:00
|
|
|
// The alarm might have triggered before we even reach the WFI
|
|
|
|
if (stm32_peripherals_rtc_alarm_triggered(PERIPHERALS_ALARM_A)) {
|
2020-04-08 17:41:57 -04:00
|
|
|
return;
|
|
|
|
}
|
2020-03-20 15:58:34 -04:00
|
|
|
__WFI();
|
|
|
|
}
|
|
|
|
|
2020-04-16 14:53:52 -04:00
|
|
|
// Required by __libc_init_array in startup code if we are compiling using
|
|
|
|
// -nostdlib/-nostartfiles.
|
|
|
|
void _init(void)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|