2014-05-03 18:27:38 -04:00
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/*
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2017-06-30 03:22:17 -04:00
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* This file is part of the MicroPython project, http://micropython.org/
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2014-05-03 18:27:38 -04:00
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2014-03-12 21:06:26 -04:00
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#include <stdio.h>
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#include <string.h>
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2014-08-21 17:48:23 -04:00
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#include <stdarg.h>
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2014-03-12 21:06:26 -04:00
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2015-01-01 16:06:20 -05:00
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#include "py/runtime.h"
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#include "py/stream.h"
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2016-05-10 18:22:54 -04:00
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#include "py/mperrno.h"
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2015-10-30 19:03:58 -04:00
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#include "py/mphal.h"
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2018-04-23 03:06:40 -04:00
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#include "lib/utils/interrupt_char.h"
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2014-04-21 07:03:09 -04:00
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#include "uart.h"
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2015-10-31 13:44:20 -04:00
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#include "irq.h"
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2018-04-23 03:06:40 -04:00
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#include "pendsv.h"
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2014-03-12 21:06:26 -04:00
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2018-02-23 11:53:20 -05:00
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extern void NORETURN __fatal_error(const char *msg);
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2014-10-11 12:57:10 -04:00
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void uart_init0(void) {
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2018-02-23 11:53:20 -05:00
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#if defined(STM32H7)
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RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
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// Configure USART1/6 clock source
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RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART16;
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RCC_PeriphClkInit.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
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if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
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__fatal_error("HAL_RCCEx_PeriphCLKConfig");
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}
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// Configure USART2/3/4/5/7/8 clock source
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RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART234578;
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RCC_PeriphClkInit.Usart16ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
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if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
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__fatal_error("HAL_RCCEx_PeriphCLKConfig");
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}
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#endif
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2015-01-07 18:38:50 -05:00
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for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all)); i++) {
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MP_STATE_PORT(pyb_uart_obj_all)[i] = NULL;
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2014-10-11 12:57:10 -04:00
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}
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}
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// unregister all interrupt sources
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2018-12-07 02:36:43 -05:00
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void uart_deinit_all(void) {
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2015-01-07 18:38:50 -05:00
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for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all)); i++) {
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pyb_uart_obj_t *uart_obj = MP_STATE_PORT(pyb_uart_obj_all)[i];
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2014-10-11 12:57:10 -04:00
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if (uart_obj != NULL) {
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2018-12-07 02:36:43 -05:00
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uart_deinit(uart_obj);
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2014-10-11 12:57:10 -04:00
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}
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}
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}
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2018-12-07 02:36:43 -05:00
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bool uart_exists(int uart_id) {
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2016-12-04 23:31:16 -05:00
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if (uart_id > MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all))) {
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// safeguard against pyb_uart_obj_all array being configured too small
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return false;
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}
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switch (uart_id) {
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#if defined(MICROPY_HW_UART1_TX) && defined(MICROPY_HW_UART1_RX)
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case PYB_UART_1: return true;
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#endif
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#if defined(MICROPY_HW_UART2_TX) && defined(MICROPY_HW_UART2_RX)
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case PYB_UART_2: return true;
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#endif
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#if defined(MICROPY_HW_UART3_TX) && defined(MICROPY_HW_UART3_RX)
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case PYB_UART_3: return true;
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#endif
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#if defined(MICROPY_HW_UART4_TX) && defined(MICROPY_HW_UART4_RX)
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case PYB_UART_4: return true;
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#endif
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#if defined(MICROPY_HW_UART5_TX) && defined(MICROPY_HW_UART5_RX)
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case PYB_UART_5: return true;
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#endif
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#if defined(MICROPY_HW_UART6_TX) && defined(MICROPY_HW_UART6_RX)
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case PYB_UART_6: return true;
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#endif
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#if defined(MICROPY_HW_UART7_TX) && defined(MICROPY_HW_UART7_RX)
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case PYB_UART_7: return true;
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#endif
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#if defined(MICROPY_HW_UART8_TX) && defined(MICROPY_HW_UART8_RX)
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case PYB_UART_8: return true;
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#endif
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default: return false;
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}
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}
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2014-04-20 20:14:14 -04:00
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// assumes Init parameters have been set up correctly
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2018-12-07 02:36:43 -05:00
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bool uart_init2(pyb_uart_obj_t *uart_obj) {
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2014-10-11 12:57:10 -04:00
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USART_TypeDef *UARTx;
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IRQn_Type irqn;
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2016-12-04 20:21:45 -05:00
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int uart_unit;
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2014-03-12 21:06:26 -04:00
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2016-12-04 20:21:45 -05:00
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const pin_obj_t *pins[4] = {0};
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2014-04-13 20:45:58 -04:00
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2016-12-04 20:21:45 -05:00
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switch (uart_obj->uart_id) {
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#if defined(MICROPY_HW_UART1_TX) && defined(MICROPY_HW_UART1_RX)
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2015-08-02 19:23:47 -04:00
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case PYB_UART_1:
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2016-12-04 20:21:45 -05:00
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uart_unit = 1;
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2015-08-02 19:23:47 -04:00
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UARTx = USART1;
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irqn = USART1_IRQn;
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2018-03-28 01:13:21 -04:00
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pins[0] = MICROPY_HW_UART1_TX;
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pins[1] = MICROPY_HW_UART1_RX;
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2018-02-12 23:37:35 -05:00
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__HAL_RCC_USART1_CLK_ENABLE();
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2015-08-02 19:23:47 -04:00
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break;
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#endif
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2016-12-04 20:21:45 -05:00
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#if defined(MICROPY_HW_UART2_TX) && defined(MICROPY_HW_UART2_RX)
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2014-04-21 07:03:09 -04:00
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case PYB_UART_2:
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2016-12-04 20:21:45 -05:00
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uart_unit = 2;
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2014-04-21 07:03:09 -04:00
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UARTx = USART2;
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2014-10-11 12:57:10 -04:00
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irqn = USART2_IRQn;
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2018-03-28 01:13:21 -04:00
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pins[0] = MICROPY_HW_UART2_TX;
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pins[1] = MICROPY_HW_UART2_RX;
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2015-05-02 12:31:39 -04:00
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#if defined(MICROPY_HW_UART2_RTS)
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2014-10-30 20:40:57 -04:00
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if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) {
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2018-03-28 01:13:21 -04:00
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pins[2] = MICROPY_HW_UART2_RTS;
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2014-10-30 20:40:57 -04:00
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}
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2015-05-02 12:31:39 -04:00
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#endif
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#if defined(MICROPY_HW_UART2_CTS)
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2014-10-30 20:40:57 -04:00
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if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) {
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2018-03-28 01:13:21 -04:00
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pins[3] = MICROPY_HW_UART2_CTS;
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2014-10-30 20:40:57 -04:00
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}
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2015-05-02 12:31:39 -04:00
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#endif
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2018-02-12 23:37:35 -05:00
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__HAL_RCC_USART2_CLK_ENABLE();
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2014-03-12 21:06:26 -04:00
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break;
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2015-05-02 12:31:39 -04:00
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#endif
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2014-04-13 20:45:58 -04:00
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2016-12-04 20:21:45 -05:00
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#if defined(MICROPY_HW_UART3_TX) && defined(MICROPY_HW_UART3_RX)
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2014-04-21 07:03:09 -04:00
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case PYB_UART_3:
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2016-12-04 20:21:45 -05:00
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uart_unit = 3;
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2014-04-21 07:03:09 -04:00
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UARTx = USART3;
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2018-09-21 00:02:54 -04:00
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#if defined(STM32F0)
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irqn = USART3_8_IRQn;
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#else
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2014-10-11 12:57:10 -04:00
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irqn = USART3_IRQn;
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2018-09-21 00:02:54 -04:00
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#endif
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2018-03-28 01:13:21 -04:00
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pins[0] = MICROPY_HW_UART3_TX;
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pins[1] = MICROPY_HW_UART3_RX;
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2015-05-02 12:31:39 -04:00
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#if defined(MICROPY_HW_UART3_RTS)
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2014-10-30 20:40:57 -04:00
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if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) {
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2018-03-28 01:13:21 -04:00
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pins[2] = MICROPY_HW_UART3_RTS;
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2014-10-30 20:40:57 -04:00
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}
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2015-05-02 12:31:39 -04:00
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#endif
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#if defined(MICROPY_HW_UART3_CTS)
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2014-10-30 20:40:57 -04:00
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if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) {
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2018-03-28 01:13:21 -04:00
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pins[3] = MICROPY_HW_UART3_CTS;
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2014-10-30 20:40:57 -04:00
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}
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2015-05-02 12:31:39 -04:00
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#endif
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2018-02-12 23:37:35 -05:00
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__HAL_RCC_USART3_CLK_ENABLE();
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2014-03-12 21:06:26 -04:00
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break;
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2015-04-18 10:59:08 -04:00
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#endif
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2014-04-13 20:45:58 -04:00
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2016-12-04 20:21:45 -05:00
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#if defined(MICROPY_HW_UART4_TX) && defined(MICROPY_HW_UART4_RX)
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2014-04-21 07:03:09 -04:00
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case PYB_UART_4:
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2016-12-04 20:21:45 -05:00
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uart_unit = 4;
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2018-09-21 00:02:54 -04:00
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#if defined(STM32F0)
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UARTx = USART4;
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irqn = USART3_8_IRQn;
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__HAL_RCC_USART4_CLK_ENABLE();
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#else
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2014-04-21 07:03:09 -04:00
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UARTx = UART4;
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2014-10-11 12:57:10 -04:00
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irqn = UART4_IRQn;
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2018-09-21 00:02:54 -04:00
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__HAL_RCC_UART4_CLK_ENABLE();
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#endif
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2018-03-28 01:13:21 -04:00
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pins[0] = MICROPY_HW_UART4_TX;
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pins[1] = MICROPY_HW_UART4_RX;
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2014-04-13 20:45:58 -04:00
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break;
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2015-04-18 10:59:08 -04:00
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#endif
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2014-04-13 20:45:58 -04:00
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2016-12-04 20:21:45 -05:00
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#if defined(MICROPY_HW_UART5_TX) && defined(MICROPY_HW_UART5_RX)
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2015-05-31 18:37:37 -04:00
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case PYB_UART_5:
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2016-12-04 20:21:45 -05:00
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uart_unit = 5;
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2018-09-21 00:02:54 -04:00
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#if defined(STM32F0)
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UARTx = USART5;
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irqn = USART3_8_IRQn;
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__HAL_RCC_USART5_CLK_ENABLE();
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#else
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2015-05-31 18:37:37 -04:00
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UARTx = UART5;
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irqn = UART5_IRQn;
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2018-09-21 00:02:54 -04:00
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__HAL_RCC_UART5_CLK_ENABLE();
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#endif
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2018-03-28 01:13:21 -04:00
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pins[0] = MICROPY_HW_UART5_TX;
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pins[1] = MICROPY_HW_UART5_RX;
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2015-05-31 18:37:37 -04:00
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break;
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#endif
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2016-12-04 20:21:45 -05:00
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#if defined(MICROPY_HW_UART6_TX) && defined(MICROPY_HW_UART6_RX)
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2014-04-21 07:03:09 -04:00
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case PYB_UART_6:
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2016-12-04 20:21:45 -05:00
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uart_unit = 6;
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2014-04-21 07:03:09 -04:00
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UARTx = USART6;
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2018-09-21 00:02:54 -04:00
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#if defined(STM32F0)
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irqn = USART3_8_IRQn;
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#else
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2014-10-11 12:57:10 -04:00
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irqn = USART6_IRQn;
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2018-09-21 00:02:54 -04:00
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#endif
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2018-03-28 01:13:21 -04:00
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pins[0] = MICROPY_HW_UART6_TX;
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pins[1] = MICROPY_HW_UART6_RX;
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2017-12-23 03:01:23 -05:00
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#if defined(MICROPY_HW_UART6_RTS)
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if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) {
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2018-03-28 01:13:21 -04:00
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pins[2] = MICROPY_HW_UART6_RTS;
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2017-12-23 03:01:23 -05:00
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}
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#endif
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#if defined(MICROPY_HW_UART6_CTS)
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if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) {
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2018-03-28 01:13:21 -04:00
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pins[3] = MICROPY_HW_UART6_CTS;
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2017-12-23 03:01:23 -05:00
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}
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#endif
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2018-02-12 23:37:35 -05:00
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__HAL_RCC_USART6_CLK_ENABLE();
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2014-03-12 21:06:26 -04:00
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break;
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2015-05-02 12:31:39 -04:00
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#endif
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2014-04-13 20:45:58 -04:00
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2016-12-04 23:14:22 -05:00
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#if defined(MICROPY_HW_UART7_TX) && defined(MICROPY_HW_UART7_RX)
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case PYB_UART_7:
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uart_unit = 7;
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2018-09-21 00:02:54 -04:00
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#if defined(STM32F0)
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UARTx = USART7;
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irqn = USART3_8_IRQn;
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__HAL_RCC_USART7_CLK_ENABLE();
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#else
|
2016-12-04 23:14:22 -05:00
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UARTx = UART7;
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irqn = UART7_IRQn;
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2018-09-21 00:02:54 -04:00
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__HAL_RCC_UART7_CLK_ENABLE();
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#endif
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2018-03-28 01:13:21 -04:00
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pins[0] = MICROPY_HW_UART7_TX;
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pins[1] = MICROPY_HW_UART7_RX;
|
2016-12-04 23:14:22 -05:00
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break;
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#endif
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|
|
#if defined(MICROPY_HW_UART8_TX) && defined(MICROPY_HW_UART8_RX)
|
|
|
|
case PYB_UART_8:
|
|
|
|
uart_unit = 8;
|
2018-05-28 04:10:53 -04:00
|
|
|
#if defined(STM32F0)
|
|
|
|
UARTx = USART8;
|
|
|
|
irqn = USART3_8_IRQn;
|
|
|
|
__HAL_RCC_USART8_CLK_ENABLE();
|
|
|
|
#else
|
2016-12-04 23:14:22 -05:00
|
|
|
UARTx = UART8;
|
|
|
|
irqn = UART8_IRQn;
|
2018-05-28 04:10:53 -04:00
|
|
|
__HAL_RCC_UART8_CLK_ENABLE();
|
|
|
|
#endif
|
2018-03-28 01:13:21 -04:00
|
|
|
pins[0] = MICROPY_HW_UART8_TX;
|
|
|
|
pins[1] = MICROPY_HW_UART8_RX;
|
2016-12-04 23:14:22 -05:00
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
|
2014-04-13 20:45:58 -04:00
|
|
|
default:
|
2015-05-02 12:31:39 -04:00
|
|
|
// UART does not exist or is not configured for this board
|
2014-04-13 20:45:58 -04:00
|
|
|
return false;
|
2014-03-12 21:06:26 -04:00
|
|
|
}
|
|
|
|
|
2016-12-04 20:21:45 -05:00
|
|
|
uint32_t mode = MP_HAL_PIN_MODE_ALT;
|
|
|
|
uint32_t pull = MP_HAL_PIN_PULL_UP;
|
2014-10-11 12:57:10 -04:00
|
|
|
|
2016-12-04 20:21:45 -05:00
|
|
|
for (uint i = 0; i < 4; i++) {
|
|
|
|
if (pins[i] != NULL) {
|
|
|
|
bool ret = mp_hal_pin_config_alt(pins[i], mode, pull, AF_FN_UART, uart_unit);
|
|
|
|
if (!ret) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
}
|
2015-08-02 19:20:08 -04:00
|
|
|
}
|
|
|
|
|
2016-12-04 20:21:45 -05:00
|
|
|
uart_obj->irqn = irqn;
|
|
|
|
uart_obj->uart.Instance = UARTx;
|
|
|
|
|
2014-04-21 07:03:09 -04:00
|
|
|
// init UARTx
|
|
|
|
HAL_UART_Init(&uart_obj->uart);
|
2014-04-20 20:14:14 -04:00
|
|
|
|
2014-04-21 07:03:09 -04:00
|
|
|
uart_obj->is_enabled = true;
|
2018-04-23 06:44:30 -04:00
|
|
|
uart_obj->attached_to_repl = false;
|
2014-04-20 20:14:14 -04:00
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2018-12-09 18:21:37 -05:00
|
|
|
void uart_set_rxbuf(pyb_uart_obj_t *self, size_t len, void *buf) {
|
|
|
|
self->read_buf_head = 0;
|
|
|
|
self->read_buf_tail = 0;
|
|
|
|
self->read_buf_len = len;
|
|
|
|
self->read_buf = buf;
|
|
|
|
if (len == 0) {
|
|
|
|
HAL_NVIC_DisableIRQ(self->irqn);
|
|
|
|
__HAL_UART_DISABLE_IT(&self->uart, UART_IT_RXNE);
|
|
|
|
} else {
|
|
|
|
__HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE);
|
|
|
|
NVIC_SetPriority(IRQn_NONNEG(self->irqn), IRQ_PRI_UART);
|
|
|
|
HAL_NVIC_EnableIRQ(self->irqn);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-12-07 02:36:43 -05:00
|
|
|
void uart_deinit(pyb_uart_obj_t *self) {
|
|
|
|
self->is_enabled = false;
|
|
|
|
UART_HandleTypeDef *uart = &self->uart;
|
|
|
|
HAL_UART_DeInit(uart);
|
|
|
|
if (uart->Instance == USART1) {
|
|
|
|
HAL_NVIC_DisableIRQ(USART1_IRQn);
|
|
|
|
__HAL_RCC_USART1_FORCE_RESET();
|
|
|
|
__HAL_RCC_USART1_RELEASE_RESET();
|
|
|
|
__HAL_RCC_USART1_CLK_DISABLE();
|
|
|
|
} else if (uart->Instance == USART2) {
|
|
|
|
HAL_NVIC_DisableIRQ(USART2_IRQn);
|
|
|
|
__HAL_RCC_USART2_FORCE_RESET();
|
|
|
|
__HAL_RCC_USART2_RELEASE_RESET();
|
|
|
|
__HAL_RCC_USART2_CLK_DISABLE();
|
|
|
|
#if defined(USART3)
|
|
|
|
} else if (uart->Instance == USART3) {
|
|
|
|
#if !defined(STM32F0)
|
|
|
|
HAL_NVIC_DisableIRQ(USART3_IRQn);
|
|
|
|
#endif
|
|
|
|
__HAL_RCC_USART3_FORCE_RESET();
|
|
|
|
__HAL_RCC_USART3_RELEASE_RESET();
|
|
|
|
__HAL_RCC_USART3_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#if defined(UART4)
|
|
|
|
} else if (uart->Instance == UART4) {
|
|
|
|
HAL_NVIC_DisableIRQ(UART4_IRQn);
|
|
|
|
__HAL_RCC_UART4_FORCE_RESET();
|
|
|
|
__HAL_RCC_UART4_RELEASE_RESET();
|
|
|
|
__HAL_RCC_UART4_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#if defined(USART4)
|
|
|
|
} else if (uart->Instance == USART4) {
|
|
|
|
__HAL_RCC_USART4_FORCE_RESET();
|
|
|
|
__HAL_RCC_USART4_RELEASE_RESET();
|
|
|
|
__HAL_RCC_USART4_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#if defined(UART5)
|
|
|
|
} else if (uart->Instance == UART5) {
|
|
|
|
HAL_NVIC_DisableIRQ(UART5_IRQn);
|
|
|
|
__HAL_RCC_UART5_FORCE_RESET();
|
|
|
|
__HAL_RCC_UART5_RELEASE_RESET();
|
|
|
|
__HAL_RCC_UART5_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#if defined(USART5)
|
|
|
|
} else if (uart->Instance == USART5) {
|
|
|
|
__HAL_RCC_USART5_FORCE_RESET();
|
|
|
|
__HAL_RCC_USART5_RELEASE_RESET();
|
|
|
|
__HAL_RCC_USART5_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#if defined(UART6)
|
|
|
|
} else if (uart->Instance == USART6) {
|
|
|
|
HAL_NVIC_DisableIRQ(USART6_IRQn);
|
|
|
|
__HAL_RCC_USART6_FORCE_RESET();
|
|
|
|
__HAL_RCC_USART6_RELEASE_RESET();
|
|
|
|
__HAL_RCC_USART6_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#if defined(UART7)
|
|
|
|
} else if (uart->Instance == UART7) {
|
|
|
|
HAL_NVIC_DisableIRQ(UART7_IRQn);
|
|
|
|
__HAL_RCC_UART7_FORCE_RESET();
|
|
|
|
__HAL_RCC_UART7_RELEASE_RESET();
|
|
|
|
__HAL_RCC_UART7_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#if defined(USART7)
|
|
|
|
} else if (uart->Instance == USART7) {
|
|
|
|
__HAL_RCC_USART7_FORCE_RESET();
|
|
|
|
__HAL_RCC_USART7_RELEASE_RESET();
|
|
|
|
__HAL_RCC_USART7_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#if defined(UART8)
|
|
|
|
} else if (uart->Instance == UART8) {
|
|
|
|
HAL_NVIC_DisableIRQ(UART8_IRQn);
|
|
|
|
__HAL_RCC_UART8_FORCE_RESET();
|
|
|
|
__HAL_RCC_UART8_RELEASE_RESET();
|
|
|
|
__HAL_RCC_UART8_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#if defined(USART8)
|
|
|
|
} else if (uart->Instance == USART8) {
|
|
|
|
__HAL_RCC_USART8_FORCE_RESET();
|
|
|
|
__HAL_RCC_USART8_RELEASE_RESET();
|
|
|
|
__HAL_RCC_USART8_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-04-23 06:44:30 -04:00
|
|
|
void uart_attach_to_repl(pyb_uart_obj_t *self, bool attached) {
|
|
|
|
self->attached_to_repl = attached;
|
|
|
|
}
|
|
|
|
|
2014-10-11 12:57:10 -04:00
|
|
|
/* obsolete and unused
|
2014-04-21 07:03:09 -04:00
|
|
|
bool uart_init(pyb_uart_obj_t *uart_obj, uint32_t baudrate) {
|
|
|
|
UART_HandleTypeDef *uh = &uart_obj->uart;
|
2014-03-16 03:22:22 -04:00
|
|
|
memset(uh, 0, sizeof(*uh));
|
|
|
|
uh->Init.BaudRate = baudrate;
|
2014-04-20 20:14:14 -04:00
|
|
|
uh->Init.WordLength = UART_WORDLENGTH_8B;
|
|
|
|
uh->Init.StopBits = UART_STOPBITS_1;
|
|
|
|
uh->Init.Parity = UART_PARITY_NONE;
|
|
|
|
uh->Init.Mode = UART_MODE_TX_RX;
|
2014-03-16 03:22:22 -04:00
|
|
|
uh->Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
|
|
|
uh->Init.OverSampling = UART_OVERSAMPLING_16;
|
2014-04-21 07:03:09 -04:00
|
|
|
return uart_init2(uart_obj);
|
2014-04-20 20:14:14 -04:00
|
|
|
}
|
2014-10-11 12:57:10 -04:00
|
|
|
*/
|
2014-04-13 20:45:58 -04:00
|
|
|
|
2018-12-09 02:10:57 -05:00
|
|
|
uint32_t uart_get_baudrate(pyb_uart_obj_t *self) {
|
|
|
|
uint32_t uart_clk = 0;
|
|
|
|
|
|
|
|
#if defined(STM32F0)
|
|
|
|
uart_clk = HAL_RCC_GetPCLK1Freq();
|
2018-12-09 06:51:25 -05:00
|
|
|
#elif defined(STM32F7)
|
|
|
|
switch ((RCC->DCKCFGR2 >> ((self->uart_id - 1) * 2)) & 3) {
|
|
|
|
case 0:
|
|
|
|
if (self->uart_id == 1 || self->uart_id == 6) {
|
|
|
|
uart_clk = HAL_RCC_GetPCLK2Freq();
|
|
|
|
} else {
|
|
|
|
uart_clk = HAL_RCC_GetPCLK1Freq();
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
uart_clk = HAL_RCC_GetSysClockFreq();
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
uart_clk = HSI_VALUE;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
uart_clk = LSE_VALUE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
#elif defined(STM32H7)
|
|
|
|
uint32_t csel;
|
|
|
|
if (self->uart_id == 1 || self->uart_id == 6) {
|
|
|
|
csel = RCC->D2CCIP2R >> 3;
|
|
|
|
} else {
|
|
|
|
csel = RCC->D2CCIP2R;
|
|
|
|
}
|
|
|
|
switch (csel & 3) {
|
|
|
|
case 0:
|
|
|
|
if (self->uart_id == 1 || self->uart_id == 6) {
|
|
|
|
uart_clk = HAL_RCC_GetPCLK2Freq();
|
|
|
|
} else {
|
|
|
|
uart_clk = HAL_RCC_GetPCLK1Freq();
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
uart_clk = HSI_VALUE;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
uart_clk = CSI_VALUE;
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
uart_clk = LSE_VALUE;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
2018-12-09 02:10:57 -05:00
|
|
|
}
|
|
|
|
#else
|
2018-12-09 06:51:25 -05:00
|
|
|
if (self->uart_id == 1
|
2018-12-09 02:10:57 -05:00
|
|
|
#if defined(USART6)
|
2018-12-09 06:51:25 -05:00
|
|
|
|| self->uart_id == 6
|
2018-12-09 02:10:57 -05:00
|
|
|
#endif
|
|
|
|
) {
|
|
|
|
uart_clk = HAL_RCC_GetPCLK2Freq();
|
|
|
|
} else {
|
|
|
|
uart_clk = HAL_RCC_GetPCLK1Freq();
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
// This formula assumes UART_OVERSAMPLING_16
|
|
|
|
uint32_t baudrate = uart_clk / self->uart.Instance->BRR;
|
|
|
|
|
|
|
|
return baudrate;
|
|
|
|
}
|
|
|
|
|
2015-11-27 10:31:59 -05:00
|
|
|
mp_uint_t uart_rx_any(pyb_uart_obj_t *self) {
|
|
|
|
int buffer_bytes = self->read_buf_head - self->read_buf_tail;
|
|
|
|
if (buffer_bytes < 0) {
|
|
|
|
return buffer_bytes + self->read_buf_len;
|
|
|
|
} else if (buffer_bytes > 0) {
|
|
|
|
return buffer_bytes;
|
|
|
|
} else {
|
|
|
|
return __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET;
|
|
|
|
}
|
2014-03-12 21:06:26 -04:00
|
|
|
}
|
|
|
|
|
2014-10-11 12:57:10 -04:00
|
|
|
// Waits at most timeout milliseconds for at least 1 char to become ready for
|
|
|
|
// reading (from buf or for direct reading).
|
|
|
|
// Returns true if something available, false if not.
|
2018-12-07 02:36:43 -05:00
|
|
|
bool uart_rx_wait(pyb_uart_obj_t *self, uint32_t timeout) {
|
2014-10-11 12:57:10 -04:00
|
|
|
uint32_t start = HAL_GetTick();
|
|
|
|
for (;;) {
|
|
|
|
if (self->read_buf_tail != self->read_buf_head || __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) {
|
|
|
|
return true; // have at least 1 char ready for reading
|
|
|
|
}
|
|
|
|
if (HAL_GetTick() - start >= timeout) {
|
|
|
|
return false; // timeout
|
|
|
|
}
|
2017-02-05 23:10:03 -05:00
|
|
|
MICROPY_EVENT_POLL_HOOK
|
2014-10-11 12:57:10 -04:00
|
|
|
}
|
2014-03-12 21:06:26 -04:00
|
|
|
}
|
|
|
|
|
2014-10-11 12:57:10 -04:00
|
|
|
// assumes there is a character available
|
|
|
|
int uart_rx_char(pyb_uart_obj_t *self) {
|
|
|
|
if (self->read_buf_tail != self->read_buf_head) {
|
|
|
|
// buffering via IRQ
|
|
|
|
int data;
|
|
|
|
if (self->char_width == CHAR_WIDTH_9BIT) {
|
|
|
|
data = ((uint16_t*)self->read_buf)[self->read_buf_tail];
|
|
|
|
} else {
|
|
|
|
data = self->read_buf[self->read_buf_tail];
|
|
|
|
}
|
|
|
|
self->read_buf_tail = (self->read_buf_tail + 1) % self->read_buf_len;
|
2016-03-25 06:20:12 -04:00
|
|
|
if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) {
|
|
|
|
// UART was stalled by flow ctrl: re-enable IRQ now we have room in buffer
|
|
|
|
__HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE);
|
|
|
|
}
|
2014-10-11 12:57:10 -04:00
|
|
|
return data;
|
|
|
|
} else {
|
|
|
|
// no buffering
|
2018-05-28 04:10:53 -04:00
|
|
|
#if defined(STM32F0) || defined(STM32F7) || defined(STM32L4) || defined(STM32H7)
|
2015-07-28 14:13:33 -04:00
|
|
|
return self->uart.Instance->RDR & self->char_mask;
|
|
|
|
#else
|
2014-10-31 16:28:10 -04:00
|
|
|
return self->uart.Instance->DR & self->char_mask;
|
2015-07-28 14:13:33 -04:00
|
|
|
#endif
|
2014-03-12 21:06:26 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-11-30 12:29:52 -05:00
|
|
|
// Waits at most timeout milliseconds for TX register to become empty.
|
|
|
|
// Returns true if can write, false if can't.
|
2018-12-07 02:36:43 -05:00
|
|
|
bool uart_tx_wait(pyb_uart_obj_t *self, uint32_t timeout) {
|
2015-11-30 12:29:52 -05:00
|
|
|
uint32_t start = HAL_GetTick();
|
|
|
|
for (;;) {
|
|
|
|
if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_TXE)) {
|
|
|
|
return true; // tx register is empty
|
|
|
|
}
|
|
|
|
if (HAL_GetTick() - start >= timeout) {
|
|
|
|
return false; // timeout
|
|
|
|
}
|
2017-02-05 23:10:03 -05:00
|
|
|
MICROPY_EVENT_POLL_HOOK
|
2015-11-30 12:29:52 -05:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-12-22 23:16:26 -05:00
|
|
|
// Waits at most timeout milliseconds for UART flag to be set.
|
|
|
|
// Returns true if flag is/was set, false on timeout.
|
|
|
|
STATIC bool uart_wait_flag_set(pyb_uart_obj_t *self, uint32_t flag, uint32_t timeout) {
|
|
|
|
// Note: we don't use WFI to idle in this loop because UART tx doesn't generate
|
|
|
|
// an interrupt and the flag can be set quickly if the baudrate is large.
|
|
|
|
uint32_t start = HAL_GetTick();
|
|
|
|
for (;;) {
|
|
|
|
if (__HAL_UART_GET_FLAG(&self->uart, flag)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
if (timeout == 0 || HAL_GetTick() - start >= timeout) {
|
|
|
|
return false; // timeout
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// src - a pointer to the data to send (16-bit aligned for 9-bit chars)
|
|
|
|
// num_chars - number of characters to send (9-bit chars count for 2 bytes from src)
|
|
|
|
// *errcode - returns 0 for success, MP_Exxx on error
|
|
|
|
// returns the number of characters sent (valid even if there was an error)
|
2018-12-07 02:36:43 -05:00
|
|
|
size_t uart_tx_data(pyb_uart_obj_t *self, const void *src_in, size_t num_chars, int *errcode) {
|
2016-12-22 23:16:26 -05:00
|
|
|
if (num_chars == 0) {
|
|
|
|
*errcode = 0;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t timeout;
|
2016-03-25 06:20:12 -04:00
|
|
|
if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) {
|
|
|
|
// CTS can hold off transmission for an arbitrarily long time. Apply
|
|
|
|
// the overall timeout rather than the character timeout.
|
2016-12-22 23:16:26 -05:00
|
|
|
timeout = self->timeout;
|
|
|
|
} else {
|
|
|
|
// The timeout specified here is for waiting for the TX data register to
|
|
|
|
// become empty (ie between chars), as well as for the final char to be
|
|
|
|
// completely transferred. The default value for timeout_char is long
|
|
|
|
// enough for 1 char, but we need to double it to wait for the last char
|
|
|
|
// to be transferred to the data register, and then to be transmitted.
|
|
|
|
timeout = 2 * self->timeout_char;
|
|
|
|
}
|
|
|
|
|
|
|
|
const uint8_t *src = (const uint8_t*)src_in;
|
|
|
|
size_t num_tx = 0;
|
|
|
|
USART_TypeDef *uart = self->uart.Instance;
|
|
|
|
|
|
|
|
while (num_tx < num_chars) {
|
|
|
|
if (!uart_wait_flag_set(self, UART_FLAG_TXE, timeout)) {
|
|
|
|
*errcode = MP_ETIMEDOUT;
|
|
|
|
return num_tx;
|
|
|
|
}
|
|
|
|
uint32_t data;
|
|
|
|
if (self->char_width == CHAR_WIDTH_9BIT) {
|
|
|
|
data = *((uint16_t*)src) & 0x1ff;
|
|
|
|
src += 2;
|
|
|
|
} else {
|
|
|
|
data = *src++;
|
|
|
|
}
|
2018-03-16 19:42:50 -04:00
|
|
|
#if defined(STM32F4)
|
2016-12-22 23:16:26 -05:00
|
|
|
uart->DR = data;
|
|
|
|
#else
|
|
|
|
uart->TDR = data;
|
|
|
|
#endif
|
|
|
|
++num_tx;
|
|
|
|
}
|
|
|
|
|
|
|
|
// wait for the UART frame to complete
|
|
|
|
if (!uart_wait_flag_set(self, UART_FLAG_TC, timeout)) {
|
|
|
|
*errcode = MP_ETIMEDOUT;
|
|
|
|
return num_tx;
|
|
|
|
}
|
|
|
|
|
|
|
|
*errcode = 0;
|
|
|
|
return num_tx;
|
2015-11-30 12:29:52 -05:00
|
|
|
}
|
|
|
|
|
2014-04-21 07:03:09 -04:00
|
|
|
void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len) {
|
2016-12-22 23:16:26 -05:00
|
|
|
int errcode;
|
|
|
|
uart_tx_data(uart_obj, str, len, &errcode);
|
2014-03-12 21:06:26 -04:00
|
|
|
}
|
|
|
|
|
2014-10-11 12:57:10 -04:00
|
|
|
// this IRQ handler is set up to handle RXNE interrupts only
|
|
|
|
void uart_irq_handler(mp_uint_t uart_id) {
|
|
|
|
// get the uart object
|
2015-01-07 18:38:50 -05:00
|
|
|
pyb_uart_obj_t *self = MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1];
|
2014-10-11 12:57:10 -04:00
|
|
|
|
|
|
|
if (self == NULL) {
|
|
|
|
// UART object has not been set, so we can't do anything, not
|
|
|
|
// even disable the IRQ. This should never happen.
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) {
|
|
|
|
if (self->read_buf_len != 0) {
|
|
|
|
uint16_t next_head = (self->read_buf_head + 1) % self->read_buf_len;
|
|
|
|
if (next_head != self->read_buf_tail) {
|
2016-03-25 06:20:12 -04:00
|
|
|
// only read data if room in buf
|
2018-05-28 04:10:53 -04:00
|
|
|
#if defined(STM32F0) || defined(STM32F7) || defined(STM32L4) || defined(STM32H7)
|
2016-03-25 06:20:12 -04:00
|
|
|
int data = self->uart.Instance->RDR; // clears UART_FLAG_RXNE
|
|
|
|
#else
|
|
|
|
int data = self->uart.Instance->DR; // clears UART_FLAG_RXNE
|
|
|
|
#endif
|
|
|
|
data &= self->char_mask;
|
2018-04-23 03:06:40 -04:00
|
|
|
// Handle interrupt coming in on a UART REPL
|
2018-04-23 06:44:30 -04:00
|
|
|
if (self->attached_to_repl && data == mp_interrupt_char) {
|
2018-04-23 03:06:40 -04:00
|
|
|
pendsv_kbd_intr();
|
|
|
|
return;
|
|
|
|
}
|
2014-10-11 12:57:10 -04:00
|
|
|
if (self->char_width == CHAR_WIDTH_9BIT) {
|
|
|
|
((uint16_t*)self->read_buf)[self->read_buf_head] = data;
|
|
|
|
} else {
|
|
|
|
self->read_buf[self->read_buf_head] = data;
|
|
|
|
}
|
|
|
|
self->read_buf_head = next_head;
|
2016-03-25 06:20:12 -04:00
|
|
|
} else { // No room: leave char in buf, disable interrupt
|
|
|
|
__HAL_UART_DISABLE_IT(&self->uart, UART_IT_RXNE);
|
2014-10-11 12:57:10 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|