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circuitpython/ports/stm/boards/STM32F767_fs.ld

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Implement F7 Nucleo
2020-04-02 11:47:16 -04:00
/*
Linker file restructure, TCM and MPU additions
2020-04-02 16:15:12 -04:00
GNU linker script for STM32F767 with filesystem
Implement F7 Nucleo
2020-04-02 11:47:16 -04:00
*/
/* Specify the memory areas */
MEMORY
{
linker scripts: Re-align at ":" With "git show -b" you can verify that this is a whitespace only change because the diff will be empty.
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1,2,3 are 32K */
stm: Use FLASH_FIRMWARE instead of FLASH_TEXT in linker scripts for compatibility with the build_memory_info script This change was scripted: git grep -l FLASH_TEXT | xargs sed -i s/FLASH_TEXT/FLASH_FIRMWARE/
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FLASH_FIRMWARE (rx) : ORIGIN = 0x08020000, LENGTH = 1920K /* sector 4 is 128K, sectors 5,6,7 are 256K */
linker scripts: Re-align at ":" With "git show -b" you can verify that this is a whitespace only change because the diff will be empty.
2020-04-27 13:47:52 -04:00
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K
Implement F7 Nucleo
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}
/* produce a link error if there is not this amount of RAM for these sections */
Add recovery domain write access, adjust stack
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_minimum_stack_size = 24K;
Implement F7 Nucleo
2020-04-02 11:47:16 -04:00
_minimum_heap_size = 16K;
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);