circuitpython/pin_functions.csv at a3d37122a7f40a507c2bccbd3154b7ed40c8f5ec

2.5 KiB

Raw Blame History

1	EUSART0_CS	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3
2	EUSART0_RX	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3
3	EUSART0_SCLK	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3
4	EUSART0_TX	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3
5	EUSART1_CS	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
6	EUSART1_RX	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
7	EUSART1_SCLK	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
8	EUSART1_TX	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
9	I2C0_SCL	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
10	I2C0_SDA	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
11	I2C1_SCL										PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
12	I2C1_SDA										PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
13	TIMER0_CC0	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
14	TIMER0_CC1	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
15	TIMER0_CC2	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
16	TIMER1_CC0	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
17	TIMER1_CC1	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
18	TIMER1_CC2	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
19	TIMER2_CC0	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3
20	TIMER2_CC1	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3
21	TIMER2_CC2	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3
22	TIMER3_CC0										PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
23	TIMER3_CC1										PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
24	TIMER3_CC2										PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
25	TIMER4_CC0	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3
26	TIMER4_CC1	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3
27	TIMER4_CC2	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3
28	USART0_CLK	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
29	USART0_CS	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
30	USART0_RX	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
31	USART0_TX	PA0	PA4	PA5	PA6	PA7	PB0	PB1	PB2	PB3	PC0	PC1	PC2	PC3	PC4	PC5	PC9	PD2	PD3	PD4	PD5
32	VDAC0_CH0						PB0
33	VDAC0_CH1							PB1
34	VDAC1_CH0								PB2
35	VDAC1_CH1									PB3

2.5 KiB Raw Blame History

2.5 KiB

Raw Blame History