Commit Graph

67 Commits

Author SHA1 Message Date
Scott Shawcroft 6797ec6ed3
Add support for grayscale displays that are < 8 bit depth.
This also improves Palette so it stores the original RGB888 colors.

Lastly, it adds I2CDisplay as a display bus to talk over I2C. Particularly
useful for the SSD1306.

Fixes #1828. Fixes #1956
2019-07-19 16:06:11 -07:00
Dan Halbert 6a001786a9 merge from master 2019-07-09 08:58:49 -04:00
iot49 6e5d70fa19 changed type of receiver_buffer_size to uint16_t 2019-07-03 12:02:01 -07:00
Dan Halbert a1b5d800f3 Update copyrights; get ready for Central 2019-06-19 10:42:36 -04:00
Scott Shawcroft 049b9ca094
Remove terse TODOs 2019-04-08 14:46:45 -07:00
Radomir Dopieralski 8323721232 Stop hard-coding SPI frequency in FourWire
Instead remember and use the frequency, polarity and phase that was
set when the bus was first created.
2019-04-06 15:15:29 +02:00
Dan Halbert ab4194f752 don't allocate DMA buffer as long-lived 2019-02-13 19:49:57 -05:00
Dan Halbert e92d90ce9c Add second UARTE to busio.UART. Init uarts on startup. 2019-02-12 22:34:05 -05:00
Dan Halbert 28cfd8a513 CharacteristicBuffer: make it be a stream class; add locking 2019-01-19 19:45:35 -05:00
hathach 6b0d93cea3
correct i2c max len 2018-12-28 21:14:27 +07:00
hathach a4ee80832a
fix #1422 correct i2c max xfer len (size in bits) 2018-12-28 16:30:11 +07:00
hathach 3ee766bc01
put received bytes to fifo when error 2018-12-28 01:05:30 +07:00
hathach d092722ae8
fix #1407 keep receiving in case of error 2018-12-28 00:40:29 +07:00
hathach b37b2fa7e7 overwrite old data if fifo is full 2018-12-13 23:56:06 +07:00
hathach e136222ae2 use rbuf for busio uart 2018-12-13 23:48:53 +07:00
Dan Halbert 63cd9209f1 allow KeyboardInterrupt on UART read; fix nrf UART pin claiming; rename feather 52840 UART pins 2018-12-04 15:05:39 -05:00
Dan Halbert 80db2cec99 UART changes: timeout in secs, write bytes, etc. 2018-12-03 12:04:32 -05:00
Scott Shawcroft 9d91111b1b
Move atmel-samd to tinyusb and support nRF flash.
This started while adding USB MIDI support (and descriptor support is
in this change.) When seeing that I'd have to implement the MIDI class
logic twice, once for atmel-samd and once for nrf, I decided to refactor
the USB stack so its shared across ports. This has led to a number of
changes that remove items from the ports folder and move them into
supervisor.

Furthermore, we had external SPI flash support for nrf pending so I
factored out the connection between the usb stack and the flash API as
well. This PR also includes the QSPI support for nRF.
2018-11-08 17:25:30 -08:00
Dan Halbert 2262efc311 PulseOut working 2018-10-16 11:05:02 -04:00
Dan Halbert 91a88cf568 Allow variable freq PWMOut; use multiple channels if same freq 2018-10-09 20:52:55 -04:00
Dan Halbert 6049776b26
Merge branch 'master' into nrf52_uart_io 2018-10-03 13:31:48 -04:00
hathach b8884ccc8b Merge branch 'master' into nrf52_uart_io 2018-10-03 23:13:56 +07:00
hathach 08cbb03bdd implement common_hal_busio_uart_clear_rx_buffer 2018-10-03 11:39:01 +07:00
hathach f543c8415d "busio.UART not yet implemented -> not available 2018-10-03 11:30:31 +07:00
Dan Halbert 21d331c8cc round SPI freq down; check max freq 2018-10-02 21:06:40 -04:00
Dan Halbert aa95526428 nrf: remove error check for SPI baudrate too high; round to nearest baudrate 2018-10-01 18:54:13 -04:00
Dan Halbert 48a3aafdd2 reset I2C and SPI on ctrl-D 2018-09-25 15:12:10 -04:00
hathach 76d6fb03f0 more clean up 2018-09-26 02:12:06 +07:00
hathach eba80f7a99 update translate string 2018-09-26 02:10:44 +07:00
hathach 52328c88cd remove space 2018-09-26 02:06:32 +07:00
hathach 74cc55b107 change error type to runtime 2018-09-25 17:31:53 +07:00
hathach dec5c50c45 clean up 2018-09-25 16:22:14 +07:00
hathach 2f0e0bdcaf migrate serial from uart to uarte 2018-09-25 16:14:44 +07:00
hathach 9017c9d29a clean up 2018-09-25 14:29:45 +07:00
hathach d3e5ba83eb update nrfx to 1.3.0 2018-09-25 13:00:57 +07:00
hathach d714479924 clean up 2018-09-25 12:48:48 +07:00
hathach 01c1296197 nrf52 uart io rx work reliably 2018-09-25 12:37:31 +07:00
hathach 1782ceab35 uarte malloc if buffer is not in SRAM 2018-09-24 16:18:49 +07:00
hathach 4015023e01 clean up uart io 2018-09-24 16:12:05 +07:00
hathach 7bbd449f06 uarte rx work fine 2018-09-24 15:54:32 +07:00
hathach fdd3e91753 changing to nrf uarte, tx works fine 2018-09-24 14:56:52 +07:00
hathach 7a1b4ccc9b Merge branch 'master' into nrf52_uart_io 2018-09-24 12:50:48 +07:00
Dan Halbert 2c15d12f2f allow multiple I2C and SPI; improve nrfx_config.h 2018-09-20 20:45:30 -04:00
hathach 816ff05253 clean up 2018-09-21 03:53:35 +07:00
hathach dddc437ea7 got rx working finally 2018-09-21 03:48:13 +07:00
hathach fe1a297889 still have issue with initial uart rx 2018-09-21 01:27:52 +07:00
Dan Halbert 2309e60c0d WIP; problem with staticly allocated IRQ handlers 2018-09-19 21:59:04 -04:00
hathach 9c25306877 uart rx got some issue with irq 2018-09-20 02:12:21 +07:00
hathach c5593ec074 got uart tx work 2018-09-19 17:59:15 +07:00
Dan Halbert 56b7f3ba64 fix translate omission; pca10059 fix in .travis.yml 2018-09-18 16:28:27 -04:00