round SPI freq down; check max freq
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aa95526428
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@ -65,27 +65,27 @@ void spi_reset(void) {
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}
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}
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// Convert frequency to clock-speed-dependent value. Choose the nearest value, lower or higher.
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// Convert frequency to clock-speed-dependent value. Choose the next lower baudrate if in between
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// available baudrates.
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static nrf_spim_frequency_t baudrate_to_spim_frequency(const uint32_t baudrate) {
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// Round requested baudrate to nearest available baudrate.
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static const struct {
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const uint32_t boundary;
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nrf_spim_frequency_t spim_frequency;
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} baudrate_map[] = {
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#ifdef SPIM_FREQUENCY_FREQUENCY_M32
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{ (16000000 + 32000000) / 2, NRF_SPIM_FREQ_32M },
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{ 32000000, NRF_SPIM_FREQ_32M },
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#endif
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#ifdef SPIM_FREQUENCY_FREQUENCY_M16
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{ ( 8000000 + 16000000) / 2, NRF_SPIM_FREQ_16M },
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{ 16000000, NRF_SPIM_FREQ_16M },
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#endif
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{ ( 4000000 + 8000000) / 2, NRF_SPIM_FREQ_8M },
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{ ( 2000000 + 4000000) / 2, NRF_SPIM_FREQ_4M },
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{ ( 1000000 + 2000000) / 2, NRF_SPIM_FREQ_2M },
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{ ( 500000 + 1000000) / 2, NRF_SPIM_FREQ_1M },
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{ ( 250000 + 500000) / 2, NRF_SPIM_FREQ_500K },
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{ ( 125000 + 250000) / 2, NRF_SPIM_FREQ_250K },
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{ 0, NRF_SPIM_FREQ_125K },
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{ 8000000, NRF_SPIM_FREQ_8M },
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{ 4000000, NRF_SPIM_FREQ_4M },
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{ 2000000, NRF_SPIM_FREQ_2M },
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{ 1000000, NRF_SPIM_FREQ_1M },
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{ 500000, NRF_SPIM_FREQ_500K },
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{ 250000, NRF_SPIM_FREQ_250K },
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{ 0, NRF_SPIM_FREQ_125K },
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};
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size_t i = 0;
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@ -97,7 +97,7 @@ static nrf_spim_frequency_t baudrate_to_spim_frequency(const uint32_t baudrate)
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}
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i++;
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} while (boundary != 0);
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// Will get here only if baudrate == 0.
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// Should not get here.
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return 0;
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}
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@ -168,22 +168,26 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) {
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}
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bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) {
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// nrf52 does not support 16 bit
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if (bits != 8)
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// nrf52 does not support 16 bit
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if (bits != 8) {
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return false;
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}
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nrf_spim_frequency_set(self->spim_peripheral->spim.p_reg, baudrate_to_spim_frequency(baudrate));
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// Set desired frequency, rounding down, and don't go above available frequency for this SPIM.
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nrf_spim_frequency_set(self->spim_peripheral->spim.p_reg,
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baudrate_to_spim_frequency(MIN(baudrate,
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self->spim_peripheral->max_frequency_MHz * 1000000)));
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nrf_spim_mode_t mode = NRF_SPIM_MODE_0;
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if (polarity) {
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mode = (phase) ? NRF_SPIM_MODE_3 : NRF_SPIM_MODE_2;
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} else {
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mode = (phase) ? NRF_SPIM_MODE_1 : NRF_SPIM_MODE_0;
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}
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nrf_spim_mode_t mode = NRF_SPIM_MODE_0;
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if (polarity) {
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mode = (phase) ? NRF_SPIM_MODE_3 : NRF_SPIM_MODE_2;
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} else {
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mode = (phase) ? NRF_SPIM_MODE_1 : NRF_SPIM_MODE_0;
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}
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nrf_spim_configure(self->spim_peripheral->spim.p_reg, mode, NRF_SPIM_BIT_ORDER_MSB_FIRST);
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nrf_spim_configure(self->spim_peripheral->spim.p_reg, mode, NRF_SPIM_BIT_ORDER_MSB_FIRST);
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return true;
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return true;
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}
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bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) {
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@ -136,7 +136,7 @@ static void check_lock(busio_spi_obj_t *self) {
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//| .. method:: SPI.configure(\*, baudrate=100000, polarity=0, phase=0, bits=8)
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//|
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//| Configures the SPI bus. Only valid when locked.
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//| Configures the SPI bus. The SPI object must be locked.
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//|
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//| :param int baudrate: the desired clock rate in Hertz. The actual clock rate may be higher or lower
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//| due to the granularity of available clock settings.
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@ -154,8 +154,8 @@ static void check_lock(busio_spi_obj_t *self) {
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//| and 8MHz. On the nRF52840, 16MHz and 32MHz are also available, but only on the first
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//| `busio.SPI` object you create. Two more ``busio.SPI`` objects can be created, but they are restricted
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//| to 8MHz maximum. This is a hardware restriction: there is only one high-speed SPI peripheral.
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//| If you pick a a baudrate other than one of these, the nearest available
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//| baudrate will be chosen.
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//| If you pick a a baudrate other than one of these, the nearest lower
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//| baudrate will be chosen, with a minimum of 125kHz.
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STATIC mp_obj_t busio_spi_configure(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits };
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static const mp_arg_t allowed_args[] = {
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