Commit Graph

73 Commits

Author SHA1 Message Date
Matt Land
244866c2c3 spi on much 2018-05-16 15:25:24 -04:00
Matt Land
10888be8e8 fixed pins 2018-05-16 15:07:12 -04:00
Matt Land
8d1d821876 pin issue 2018-05-16 14:58:57 -04:00
Matt Land
bd7f603748 zero + feather logger 2018-05-15 14:06:01 -04:00
Matt Land
a10f04ad6e support for 2 2018-05-15 13:53:53 -04:00
Matt Land
b0bacd9b0b review code 2018-05-15 13:15:24 -04:00
Dan Halbert
32363b801b 3.0: add CircuitPlayground and HID to CPX frozen modules 2018-05-04 08:44:33 -04:00
Scott Shawcroft
812fe0c93f Turn on nvm in 3.0.
Its 256b on M0 and 8k on M4 to match flash erase sizes.

Fixes #758
2018-04-13 16:22:28 -07:00
Kattni
05e2a7d1ac Added digital pin assignments 2018-03-15 20:28:09 -04:00
Scott Shawcroft
01aceaae50 Support all boards and remove erase and page sizes because they never change. 2018-03-01 12:45:12 -08:00
Scott Shawcroft
2ab923862b Structify flash device definitions. 2018-02-28 19:15:54 -08:00
Scott Shawcroft
15f626be58 m4 qspi works. m0 compiles 2018-02-19 14:02:04 -08:00
Scott Shawcroft
4710a2adba Compiles for m4. Untested on m0.
This introduces a new spi_flash_api.h that works for both SPI and
QSPI. The previous spi_flash functions are now called external_flash
to minimize confusion.
2018-02-19 14:02:04 -08:00
Dan Halbert
eb49359aec CPX: typo in mpconfigboard.h broke CIRCUITPY 2018-01-30 15:48:22 -05:00
brentrubell
ab1f133667 issue #536 CPX change SPI pin designations to externally available pins (#540)
* issue #536 CPX

* switched pin assignment
2018-01-22 19:31:55 -08:00
Dan Halbert
d0cc8abd31 revise boards/ files for 3.0. All now compiled (but I don't have all to test). 2018-01-04 14:16:53 -05:00
Dan Halbert
d8686cc002 use correct LD_FILE in mpconfigboard.mk for boards with external flash 2018-01-03 16:49:38 -05:00
Dan Halbert
065e82015f merge from 2.2.0 + fix up board defs 2018-01-02 21:25:41 -05:00
Dan Halbert
312444bbd2 non-DMA SPI working; adding this now for testing; will continue with DMA
Also, fixed pin mappings for rev B Metro M4:
swap PA12 and PA13 on SPI 2x3 header
swap A3 and A5

Comment out all frozen modules in CPX again to make room while waiting
for SPI flash.
2017-11-16 19:09:35 -05:00
Dan Halbert
7292984204 Implement busio.I2c.
* Added asf4_conf/samd*/hpl_sercom_config.h
* Adjusted clocks in peripheral_clk_config.h.
* Put some frozen libs back in CPX for testing.
* Implement common-hal I2C
* Add samd*_peripherals.h in parallel with samd*_pins.h for common
  functions and data.
* Store SERCOM index in pins table for convenience.
* Canonicalize some #include guard names in various .h files.

simpler reset of SERCOMs; remove unused routine
2017-11-07 09:59:54 -08:00
Tony DiCola
d023879bea atmel-samd: Update and enable neopixel_write for ASF4, tested on SAMD21 only. 2017-10-31 16:06:36 -07:00
Scott Shawcroft
4aeef100f6 atmel-samd: More USB polish
* Introduce a python script to generate the USB descriptor instead of
  a bunch of C macros. In the future, we can use this dynamically in
  CircuitPython.
* Add support for detecting read-only mass storage mounts.

Fixes #377
2017-10-30 18:29:20 -07:00
Scott Shawcroft
73c15dcf8b Merge commit 'f869d6b2e339c04469c6c9ea3fb2fabd7bbb2d8c' into nrf2_merge
This is prep for merging in the NRF5 pull request.
2017-10-24 22:31:16 -07:00