ESP32-S3 defines two additional general use pins in
ports/espressif/peripherals/esp32s3/pins.h, for which
support is missing in the microcontroller module HAL.
This prevents running into the pins that cannot be reset. On 1011
it was off by one pin that isn't attached to the package. So,
having the USB pins forbidden prevented resetting to a NULL address.
Fixes#7952
esp_ping_new_session can fail, particularly if ping is called quickly
many times in succession.
This is because `esp_ping_new_session` has to do a bunch of stuff
including creating a task and a socket. Calling `esp_ping_delete_session`
doesn't clean up these resources immediately. Instead, it signals the
task to clean up resources and exit 'soon', but 'soon' is defined as 1
second.
When the calls are frequent, the in-use sockets and tasks fill up
available slots—I didn't actually check which resource gets used
up first.
With this change, the ping call will raise an exception instead of
continuing with a call to esp_ping_start that crashes.
Closes#5980 based on my testing on an ESP32S3-N8R2.
The internal flash cache wasn't being properly used, because
`write_blocks` unconditionally performed the flash write.
Fixing this so that the write's not done until `internal_flash_flush`
fixes the problem in my test program with i2sout & synthio.
as a future optimization, `flash_read_blocks` could learn to read out
of the cache, but that's probably not super important.
This class allows much more expressive sound synthesis:
* tremolo & vibrato
* arbitrary frequency
* different evelope & waveform per note
* all properties dynamically settable from Python code
This adds a script to generate the peripherals files (except clock).
It adds support for the 1015, 1020, 1040, and 1050 EVKs.
Some work was started on 1176 but it isn't working. So, the board
def is in a separate branch.
Fixes#3521. Fixes#2477.
Since c80e7c14e6 changed the GC heap to use
all unused RAM, there is no longer any RAM available for the traditional C
heap (which is not used by default in MicroPython but may be used by C
extensions). This commit adds a provision for a board to reserve RAM for
the C heap, by defining MICROPY_C_HEAP_SIZE.
Signed-off-by: Damien George <damien@micropython.org>
The previous code worked on ESP32 but not ESP32-S3. All the IDF (v4.4.3)
examples call rmt_set_tx_loop_mode before rmt_write_items, so make that
change here.
Signed-off-by: Damien George <damien@micropython.org>
- Use HCI_TRACE macro consistently.
- Use the same colour formatting.
- Add a tool to convert to .pcap for Wireshark.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This adds a mechanism to track a pending notify/indicate operation that
is deferred due to the send buffer being full. This uses a tracked alloc
that is passed as the content arg to the callback.
This replaces the previous mechanism that did this via the global pending
op queue, shared with client read/write ops.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Makes gatts_notify and gatts_indicate work in the same way: by default they
send the DB value, but you can manually override the payload.
In other words, makes gatts_indicate work the same as gatts_notify.
Note: This removes support for queuing notifications and indications on
btstack when the ACL buffer is full. This functionality will be
reimplemented in a future commit.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Spotted the Cosmo_pico port on circuitpython.org which is the same class of device as the Pimoroni PICO dv so I'm switching the VID/PID to use the Raspberry Pi owned values rather than the Adafruit values just as the Como device uses.
Don't idle from main if we scheduled an interrupt for 0 ticks in
the future.
Have RP2040 detect wakes that happen between setting the timer and
the idle call.
Fixes#7361
The Wio Terminal includes a RealTek RTL8720D as a companion to the main chip to provide WiFi and Bluetooth capabilities via eRPC over a UART connection. The WIO Terminal schematic labels some pins as the RXD/TXD for the UART, and that was captured in the board definition for CircuitPython. However, these pins may be used for logging in another mode, but they are not the main pins used to communicate with the RTL chip. The correct configuration is RX on PC24/pad 2 and TX on PB24/pad 0 of SERCOM 0. The comments on the pin definitions now reflect this situation, for anyone trying to get the WiFi/BLE to work on the Wio Terminal.
This commit adds support for the `timeout` keyword argument to machine.I2C
on the rp2 port, following how it's done on other ports.
The main motivation here is avoid the interpreter crashing due to infinite
loops when SDA is stuck low, which is quite common if the board gets reset
while reading from an I2C device.
A default timeout of 50ms is chosen because it's consistent with:
- Commit a707fe50b0 which used a timeout of
50,000us for zero-length writes on the rp2 port.
- The machine.SoftI2C class which uses 50,000us as the default timeout.
- The stm32 port's hardware I2C, which uses 50,000us for
I2C_POLL_DEFAULT_TIMEOUT_US.
This commit also fixes the default timeout on the esp32 port to be
consistent with the above, and updates the documentation for machine.I2C to
document this keyword argument.
PicoDVI in CP support 640x480 and 800x480 on Feather DVI, Pico and
Pico W. 1 and 2 bit grayscale are full resolution. 8 and 16 bit
color are half resolution.
Memory layout is modified to give the top most 4k of ram to the
second core. Its MPU is used to prevent flash access after startup.
The port saved word is moved to a watchdog scratch register so that
it doesn't get overwritten by other things in RAM.
Right align status bar and scroll area. This normally gives a few
pixels of padding on the left hand side and improves the odds it is
readable in a case. Fixes#7562
Fixes c stack checking. The length was correct but the top was being
set to the current stack pointer instead of the correct top.
Fixes#7643
This makes Bitmap subscr raise IndexError instead of ValueError
when the index arguments are wrong.
Doing a squash merge to avoid having the `slc_cli_linux` .zip files in the history. They were added in one commit and removed and replaced with a submodule in another.
* Initial commit for xg24
* Fix SLC issue
* Fix SLC extract fail
* Change board's name
* Correct spelling of code
Build immediately after slc generate
* Remove VID and PID
* Change creator and creation id
* Apply new creator_id and creation_id
* Update makefile, error message, mcu_processor function
* Update mpconfigboard.mk
* Update Board extensions, PORT_DEPS
* Update makefile
* Add exclude_patterns
* Show java, jinja2 version
* Show path for debugging CI
* Add requirements-dev for slc
* Add PATH slc_cli
* Update background function
* Add jinja2 PATH
* Show PATH
* Update jinja2 path
* Update jinja2 path
* Update jinja2 path
* Update jinja2 path
* Change slc folder
* Change markupsafe folder
* Add symbolic link for slc
* Update makefile
* Update makefile
* Update MX25R3235F.toml from submodule nvm.toml
* alphabetize the list
* Remove slc_cli_linux folder
* Update slc_cli submodule
---------
Co-authored-by: Chat Nguyen <cvnguyen@silabs.com>
Co-authored-by: silabs-ChatNguyen <chat.nguyen@silabs.com>
Co-authored-by: silabs-ChatNguyen <126220343+silabs-ChatNguyen@users.noreply.github.com>
If a board defines a custom bootloader entry function it will be called
first, if not and the ROM API supports RUN bootloader API, then
`machine.bootloader()` will jump to the ROM serial downloader in USB mode.
This commit allows boards to disable Ethernet and keep the networking stack
enabled, to use an alternate networking interface, such as WiFi.
Note that the `network` and `socket` modules are now enabled by default for
a board.
This commit is necessary to make MicroPython work on this eval kit out of
the box, as the eval kit ships with the HyperFlash physically disconnected
from the bus (refer to the schematics or the user guide) and the QSPI
connected instead, but the fuses/board/pins are configured to boot from
internal flash (on FlexSPI2).
Note that enabling the HyperFlash is not trivial, as it requires soldering
and desoldering of many small footprint resistors and changing fuses.
Previous pins definition stated that the UART1 RTS and CTS were not connected. They are connected and can currently be used via A1 and PWM0 respectively. To make things a little clearer, enabling the RTS1/CTS1.
In #7497 port_background_task was renamed to port_background_tick
but the actual call site wasn't changed. This meant that it was
no longer called!
Rename more functions from task to tick to make it clearer which is
which.
Fixes polling thread looping forever hangs preventing new connections.
Don't lose listening sockets on mp resets and re-init.
Keep better separation of "system" and "user" sockets.
Track socket states to prevent re-use of sockets before closed.
Close REST socket when transaction completes. No post-init.
Remove unnecessary state flags.
Helps prevent the filesystem from getting formatted by mistake, among other
things. For example, on a Pico board, entering Ctrl+D and Ctrl+C fast many
times will eventually wipe the filesystem (without warning or notice).
Further rationale: Ctrl+C is used a lot by automation scripts (eg mpremote)
and UI's (eg Mu, Thonny) to get the board into a known state. If the board
is not responding for a short time then it's not possible to know if it's
just a slow start up (eg in _boot.py), or an infinite loop in the main
application. The former should not be interrupted, but the latter should.
The only way to distinguish these two cases would be to wait "long enough",
and if there's nothing on the serial after "long enough" then assume it's
running the application and Ctrl+C should break out of it. But defining
"long enough" is impossible for all the different boards and their possible
behaviour. The solution in this commit is to make it so that frozen
start-up code cannot be interrupted by Ctrl+C. That code then effectively
acts like normal C start-up code, which also cannot be interrupted.
Note: on the stm32 port this was never seen as an issue because all
start-up code is in C. But now other ports start to put more things in
_boot.py and so this problem crops up.
Signed-off-by: David Grayson <davidegrayson@gmail.com>
The dispatch active flag is only set once and never reset, so it will
always call the dispatch handler (once enabled), and it's not really
needed because it doesn't make things more efficient.
Also remove unused included headers.
Changes in this commit:
- Move the pwm_seq array to the p_config data structure. That prevents
potential resource collisions between PWM devices.
- Rename the keyword argument 'id' to 'device'. That's consistent with the
SAMD port as the other port allowing to specify it.
In contrast to MidiTrack, this can be controlled from Python code,
turning notes on/off as desired.
Not tested on real HW yet, just the acceptance test based on checking
which notes it thinks are held internally.
This makes all the samples from Dan's collection register as 440Hz
when playing on pwmio or i2sout, using https://webaudiodemos.appspot.com/pitchdetect/index.html
to detect the frequency played (all should show as A 440Hz; an error
of up to 20 "cents" should be treated as OK)
There's an audible carrier with PWM output and the 8kHz samples. This is
probably a limitation of the peripheral which is documented as being for
input signals of 44 kHz or 48 kHz; the carrier frequency is a fixed
multiple of the sample frequency.
Closes#7800
