Commit Graph

66 Commits

Author SHA1 Message Date
Scott Shawcroft
7e3d4c61b5
Update TinyUSB and add interrupt hooks. 2020-04-17 14:16:49 -07:00
Scott Shawcroft
6544bf52fb
Enable SNVS interrupt
The iMX RT has a separate wake up controller, the GPC, that replaces
the NVIC when asleep. It adds the ability to only wake up on certain
interrupts. It seems that it requires at least one enabled interrupt
in the NVIC to turn on it's wake up circuitry. It doesn't need to
be the same interrupt as the wake up signal. For example, the RTC
in the SNVS can wake us up if a USB interrupt is enabled. Before
then it won't work. So, we enable the SNVS interrupt on start up
so it can wake us up.
2020-04-07 17:15:18 -07:00
Scott Shawcroft
aae0ce6bad
Fix autoreload and ticks on IMX RT 2020-04-07 14:16:07 -07:00
Scott Shawcroft
a8dfba235c
Fix alarm so that it is correctly set. 2020-04-07 13:07:29 -07:00
Lucian Copeland
47a5d83267 Implement F7 Nucleo 2020-04-02 11:47:16 -04:00
Scott Shawcroft
5e1e4d32db
Get basic sleep going on the iMX RT 1011 2020-03-24 15:46:10 -07:00
Scott Shawcroft
a8ed6d993c
Switch iMX RT to RTC. Untested. 2020-03-23 18:20:58 -07:00
Dave Marples
f0e5341b0f Addition of support for imxt1010, 1050 and 1060 families 2020-02-18 23:16:40 +00:00
Dave Marples
d388899985 Addition of RS485 support 2020-02-18 23:16:40 +00:00
hierophect
898f4e1f72
Merge branch 'master' into stm32-meowbit 2020-01-29 16:32:08 -05:00
Lucian Copeland
100409961a Move board_init to main.c 2020-01-29 16:29:43 -05:00
Scott Shawcroft
87344ff53a
Disable the DCache when USB is initialized. There are still issues enabling it. 2020-01-21 18:32:19 -08:00
Scott Shawcroft
9d5742ebd1
Fix start on power up by providing Reset_Handler ourselves.
On power up the FlexRAM banks are in an unknown config so we can't
rely on the stack until after we configure FlexRAM.
2020-01-18 11:54:01 -08:00
Scott Shawcroft
9f4ea2122a
teensy fixes 2020-01-17 18:35:09 -08:00
Scott Shawcroft
7d8dac9211
Refine iMX RT memory layout and add three boards
Introduces a way to place CircuitPython code and data into
tightly coupled memory (TCM) which is accessible by the CPU in a
single cycle. It also frees up room in the corresponding cache for
intermittent data. Loading from external flash is slow!

The data cache is also now enabled.

Adds support for the iMX RT 1021 chip. Adds three new boards:
* iMX RT 1020 EVK
* iMX RT 1060 EVK
* Teensy 4.0

Related to #2492, #2472 and #2477. Fixes #2475.
2020-01-17 17:36:08 -08:00
arturo182
13e0cba6f1 Add initial MIMXRT10XX port 2020-01-06 21:08:49 +01:00