2014-05-03 18:27:38 -04:00
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/*
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2017-06-30 03:22:17 -04:00
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* This file is part of the MicroPython project, http://micropython.org/
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2014-05-03 18:27:38 -04:00
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2014-03-25 19:26:14 -04:00
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#include <stdio.h>
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#include <string.h>
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2015-01-01 16:06:20 -05:00
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#include "py/nlr.h"
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#include "py/runtime.h"
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2015-10-30 19:03:58 -04:00
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#include "py/mphal.h"
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2015-06-10 08:53:00 -04:00
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#include "irq.h"
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2014-04-19 19:30:09 -04:00
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#include "pin.h"
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#include "genhdr/pins.h"
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2014-04-20 19:10:04 -04:00
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#include "bufhelper.h"
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2015-06-10 08:53:00 -04:00
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#include "dma.h"
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2014-03-25 19:26:14 -04:00
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#include "i2c.h"
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2014-04-29 17:55:34 -04:00
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/// \moduleref pyb
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/// \class I2C - a two-wire serial protocol
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///
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/// I2C is a two-wire protocol for communicating between devices. At the physical
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/// level it consists of 2 wires: SCL and SDA, the clock and data lines respectively.
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///
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/// I2C objects are created attached to a specific bus. They can be initialised
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/// when created, or initialised later on:
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///
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/// from pyb import I2C
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///
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/// i2c = I2C(1) # create on bus 1
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/// i2c = I2C(1, I2C.MASTER) # create and init as a master
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/// i2c.init(I2C.MASTER, baudrate=20000) # init as a master
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/// i2c.init(I2C.SLAVE, addr=0x42) # init as a slave with given address
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/// i2c.deinit() # turn off the peripheral
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///
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/// Printing the i2c object gives you information about its configuration.
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///
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/// Basic methods for slave are send and recv:
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///
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/// i2c.send('abc') # send 3 bytes
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/// i2c.send(0x42) # send a single byte, given by the number
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/// data = i2c.recv(3) # receive 3 bytes
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///
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/// To receive inplace, first create a bytearray:
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///
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/// data = bytearray(3) # create a buffer
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/// i2c.recv(data) # receive 3 bytes, writing them into data
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///
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/// You can specify a timeout (in ms):
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///
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/// i2c.send(b'123', timeout=2000) # timout after 2 seconds
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///
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/// A master must specify the recipient's address:
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///
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/// i2c.init(I2C.MASTER)
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/// i2c.send('123', 0x42) # send 3 bytes to slave with address 0x42
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/// i2c.send(b'456', addr=0x42) # keyword for address
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///
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/// Master also has other methods:
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///
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/// i2c.is_ready(0x42) # check if slave 0x42 is ready
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/// i2c.scan() # scan for slaves on the bus, returning
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/// # a list of valid addresses
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/// i2c.mem_read(3, 0x42, 2) # read 3 bytes from memory of slave 0x42,
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/// # starting at address 2 in the slave
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/// i2c.mem_write('abc', 0x42, 2, timeout=1000)
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2014-04-20 19:10:04 -04:00
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#define PYB_I2C_MASTER (0)
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#define PYB_I2C_SLAVE (1)
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2015-04-18 11:12:57 -04:00
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#if defined(MICROPY_HW_I2C1_SCL)
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2014-04-19 19:30:09 -04:00
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I2C_HandleTypeDef I2CHandle1 = {.Instance = NULL};
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2014-04-20 14:06:15 -04:00
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#endif
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2015-04-18 11:12:57 -04:00
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#if defined(MICROPY_HW_I2C2_SCL)
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2014-04-19 19:30:09 -04:00
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I2C_HandleTypeDef I2CHandle2 = {.Instance = NULL};
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2015-04-18 11:12:57 -04:00
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#endif
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#if defined(MICROPY_HW_I2C3_SCL)
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I2C_HandleTypeDef I2CHandle3 = {.Instance = NULL};
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#endif
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2016-11-24 19:21:18 -05:00
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#if defined(MICROPY_HW_I2C4_SCL)
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I2C_HandleTypeDef I2CHandle4 = {.Instance = NULL};
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#endif
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2014-03-25 19:26:14 -04:00
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2016-11-24 19:21:18 -05:00
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STATIC bool pyb_i2c_use_dma[4];
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2016-11-11 01:36:19 -05:00
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2016-11-25 00:30:51 -05:00
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const pyb_i2c_obj_t pyb_i2c_obj[] = {
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2015-06-10 08:53:00 -04:00
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#if defined(MICROPY_HW_I2C1_SCL)
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2016-11-11 01:36:19 -05:00
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{{&pyb_i2c_type}, &I2CHandle1, &dma_I2C_1_TX, &dma_I2C_1_RX, &pyb_i2c_use_dma[0]},
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2015-06-10 08:53:00 -04:00
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#else
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2016-11-11 01:36:19 -05:00
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{{&pyb_i2c_type}, NULL, NULL, NULL, NULL},
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2015-06-10 08:53:00 -04:00
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#endif
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#if defined(MICROPY_HW_I2C2_SCL)
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2016-11-11 01:36:19 -05:00
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{{&pyb_i2c_type}, &I2CHandle2, &dma_I2C_2_TX, &dma_I2C_2_RX, &pyb_i2c_use_dma[1]},
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2015-06-10 08:53:00 -04:00
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#else
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2016-11-11 01:36:19 -05:00
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{{&pyb_i2c_type}, NULL, NULL, NULL, NULL},
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2015-06-10 08:53:00 -04:00
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#endif
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#if defined(MICROPY_HW_I2C3_SCL)
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2016-11-11 01:36:19 -05:00
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{{&pyb_i2c_type}, &I2CHandle3, &dma_I2C_3_TX, &dma_I2C_3_RX, &pyb_i2c_use_dma[2]},
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2015-06-10 08:53:00 -04:00
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#else
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2016-11-11 01:36:19 -05:00
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{{&pyb_i2c_type}, NULL, NULL, NULL, NULL},
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2015-06-10 08:53:00 -04:00
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#endif
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2016-11-24 19:21:18 -05:00
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#if defined(MICROPY_HW_I2C4_SCL)
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{{&pyb_i2c_type}, &I2CHandle4, &dma_I2C_4_TX, &dma_I2C_4_RX, &pyb_i2c_use_dma[3]},
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#else
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{{&pyb_i2c_type}, NULL, NULL, NULL, NULL},
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#endif
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2015-06-10 08:53:00 -04:00
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};
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2017-03-30 21:53:56 -04:00
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#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4)
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2016-03-22 06:28:35 -04:00
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// The STM32F0, F3, F7 and L4 use a TIMINGR register rather than ClockSpeed and
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2015-08-04 02:04:57 -04:00
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// DutyCycle.
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2017-03-30 21:53:56 -04:00
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#if defined(STM32F746xx)
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// The value 0x40912732 was obtained from the DISCOVERY_I2Cx_TIMING constant
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// defined in the STM32F7Cube file Drivers/BSP/STM32F746G-Discovery/stm32f7456g_discovery.h
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#define MICROPY_HW_I2C_BAUDRATE_TIMING {{100000, 0x40912732}}
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#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (100000)
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#define MICROPY_HW_I2C_BAUDRATE_MAX (100000)
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#elif defined(STM32F767xx) || defined(STM32F769xx)
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// These timing values are for f_I2CCLK=54MHz and are only approximate
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#define MICROPY_HW_I2C_BAUDRATE_TIMING { \
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{100000, 0xb0420f13}, \
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{400000, 0x70330309}, \
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{1000000, 0x50100103}, \
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}
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#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (400000)
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#define MICROPY_HW_I2C_BAUDRATE_MAX (1000000)
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#elif defined(MCU_SERIES_L4)
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// The value 0x90112626 was obtained from the DISCOVERY_I2C1_TIMING constant
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// defined in the STM32L4Cube file Drivers/BSP/STM32L476G-Discovery/stm32l476g_discovery.h
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#define MICROPY_HW_I2C_BAUDRATE_TIMING {{100000, 0x90112626}}
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#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (100000)
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#define MICROPY_HW_I2C_BAUDRATE_MAX (100000)
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#else
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#error "no I2C timings for this MCU"
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#endif
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2015-08-04 02:04:57 -04:00
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STATIC const struct {
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uint32_t baudrate;
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uint32_t timing;
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} pyb_i2c_baudrate_timing[] = MICROPY_HW_I2C_BAUDRATE_TIMING;
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#define NUM_BAUDRATE_TIMINGS MP_ARRAY_SIZE(pyb_i2c_baudrate_timing)
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STATIC void i2c_set_baudrate(I2C_InitTypeDef *init, uint32_t baudrate) {
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for (int i = 0; i < NUM_BAUDRATE_TIMINGS; i++) {
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if (pyb_i2c_baudrate_timing[i].baudrate == baudrate) {
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init->Timing = pyb_i2c_baudrate_timing[i].timing;
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return;
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}
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}
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nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError,
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"Unsupported I2C baudrate: %lu", baudrate));
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}
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2016-11-25 00:30:51 -05:00
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uint32_t i2c_get_baudrate(I2C_InitTypeDef *init) {
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2015-08-04 02:04:57 -04:00
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for (int i = 0; i < NUM_BAUDRATE_TIMINGS; i++) {
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if (pyb_i2c_baudrate_timing[i].timing == init->Timing) {
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return pyb_i2c_baudrate_timing[i].baudrate;
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}
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}
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return 0;
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}
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#else
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2017-03-30 21:53:56 -04:00
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#define MICROPY_HW_I2C_BAUDRATE_DEFAULT (400000)
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#define MICROPY_HW_I2C_BAUDRATE_MAX (400000)
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2015-08-04 02:04:57 -04:00
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STATIC void i2c_set_baudrate(I2C_InitTypeDef *init, uint32_t baudrate) {
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init->ClockSpeed = baudrate;
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init->DutyCycle = I2C_DUTYCYCLE_16_9;
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}
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2016-11-25 00:30:51 -05:00
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uint32_t i2c_get_baudrate(I2C_InitTypeDef *init) {
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2015-08-04 02:04:57 -04:00
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return init->ClockSpeed;
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}
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2017-03-30 21:53:56 -04:00
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#endif
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2015-08-04 02:04:57 -04:00
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2014-04-19 19:30:09 -04:00
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void i2c_init0(void) {
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// reset the I2C1 handles
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2015-04-18 11:12:57 -04:00
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#if defined(MICROPY_HW_I2C1_SCL)
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2014-04-19 19:30:09 -04:00
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memset(&I2CHandle1, 0, sizeof(I2C_HandleTypeDef));
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I2CHandle1.Instance = I2C1;
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2015-04-18 11:12:57 -04:00
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#endif
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#if defined(MICROPY_HW_I2C2_SCL)
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2014-04-19 19:30:09 -04:00
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memset(&I2CHandle2, 0, sizeof(I2C_HandleTypeDef));
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I2CHandle2.Instance = I2C2;
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2015-04-18 11:12:57 -04:00
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#endif
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#if defined(MICROPY_HW_I2C3_SCL)
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memset(&I2CHandle3, 0, sizeof(I2C_HandleTypeDef));
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I2CHandle3.Instance = I2C3;
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#endif
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2016-11-24 19:21:18 -05:00
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#if defined(MICROPY_HW_I2C4_SCL)
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memset(&I2CHandle4, 0, sizeof(I2C_HandleTypeDef));
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I2CHandle3.Instance = I2C4;
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#endif
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2014-03-25 19:26:14 -04:00
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}
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2014-04-19 19:30:09 -04:00
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void i2c_init(I2C_HandleTypeDef *i2c) {
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2016-02-11 00:20:14 -05:00
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int i2c_unit;
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const pin_obj_t *scl_pin;
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const pin_obj_t *sda_pin;
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2015-06-10 08:53:00 -04:00
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2014-04-20 14:06:15 -04:00
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if (0) {
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2015-04-18 11:12:57 -04:00
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#if defined(MICROPY_HW_I2C1_SCL)
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2014-04-20 14:06:15 -04:00
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} else if (i2c == &I2CHandle1) {
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2016-02-11 00:20:14 -05:00
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i2c_unit = 1;
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scl_pin = &MICROPY_HW_I2C1_SCL;
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sda_pin = &MICROPY_HW_I2C1_SDA;
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2014-03-25 19:26:14 -04:00
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__I2C1_CLK_ENABLE();
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2015-04-18 11:12:57 -04:00
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#endif
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#if defined(MICROPY_HW_I2C2_SCL)
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2014-04-20 14:06:15 -04:00
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} else if (i2c == &I2CHandle2) {
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2016-02-11 00:20:14 -05:00
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i2c_unit = 2;
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scl_pin = &MICROPY_HW_I2C2_SCL;
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sda_pin = &MICROPY_HW_I2C2_SDA;
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2014-03-25 19:26:14 -04:00
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__I2C2_CLK_ENABLE();
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2015-04-18 11:12:57 -04:00
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#endif
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#if defined(MICROPY_HW_I2C3_SCL)
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} else if (i2c == &I2CHandle3) {
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2016-02-11 00:20:14 -05:00
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i2c_unit = 3;
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scl_pin = &MICROPY_HW_I2C3_SCL;
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sda_pin = &MICROPY_HW_I2C3_SDA;
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2015-04-18 11:12:57 -04:00
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__I2C3_CLK_ENABLE();
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#endif
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2016-11-24 19:21:18 -05:00
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#if defined(MICROPY_HW_I2C4_SCL)
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} else if (i2c == &I2CHandle4) {
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i2c_unit = 4;
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scl_pin = &MICROPY_HW_I2C4_SCL;
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sda_pin = &MICROPY_HW_I2C4_SDA;
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__I2C3_CLK_ENABLE();
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#endif
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2014-04-20 14:06:15 -04:00
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} else {
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// I2C does not exist for this board (shouldn't get here, should be checked by caller)
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return;
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2014-03-25 19:26:14 -04:00
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}
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2014-04-19 19:30:09 -04:00
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// init the GPIO lines
|
2016-11-11 01:53:45 -05:00
|
|
|
uint32_t mode = MP_HAL_PIN_MODE_ALT_OPEN_DRAIN;
|
|
|
|
uint32_t pull = MP_HAL_PIN_PULL_NONE; // have external pull-up resistors on both lines
|
|
|
|
mp_hal_pin_config_alt(scl_pin, mode, pull, AF_FN_I2C, i2c_unit);
|
|
|
|
mp_hal_pin_config_alt(sda_pin, mode, pull, AF_FN_I2C, i2c_unit);
|
2014-04-19 19:30:09 -04:00
|
|
|
|
2014-03-25 19:26:14 -04:00
|
|
|
// init the I2C device
|
2014-04-19 19:30:09 -04:00
|
|
|
if (HAL_I2C_Init(i2c) != HAL_OK) {
|
2014-03-25 19:26:14 -04:00
|
|
|
// init error
|
2014-04-20 14:06:15 -04:00
|
|
|
// TODO should raise an exception, but this function is not necessarily going to be
|
|
|
|
// called via Python, so may not be properly wrapped in an NLR handler
|
2014-10-23 09:25:32 -04:00
|
|
|
printf("OSError: HAL_I2C_Init failed\n");
|
2014-03-25 19:26:14 -04:00
|
|
|
return;
|
|
|
|
}
|
2015-06-10 08:53:00 -04:00
|
|
|
|
|
|
|
// invalidate the DMA channels so they are initialised on first use
|
2016-02-11 00:20:14 -05:00
|
|
|
const pyb_i2c_obj_t *self = &pyb_i2c_obj[i2c_unit - 1];
|
2016-03-22 06:28:35 -04:00
|
|
|
dma_invalidate_channel(self->tx_dma_descr);
|
|
|
|
dma_invalidate_channel(self->rx_dma_descr);
|
2017-07-18 23:12:10 -04:00
|
|
|
|
2016-09-07 07:00:17 -04:00
|
|
|
if (0) {
|
|
|
|
#if defined(MICROPY_HW_I2C1_SCL)
|
|
|
|
} else if (i2c->Instance == I2C1) {
|
|
|
|
HAL_NVIC_EnableIRQ(I2C1_EV_IRQn);
|
|
|
|
HAL_NVIC_EnableIRQ(I2C1_ER_IRQn);
|
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_I2C2_SCL)
|
|
|
|
} else if (i2c->Instance == I2C2) {
|
|
|
|
HAL_NVIC_EnableIRQ(I2C2_EV_IRQn);
|
|
|
|
HAL_NVIC_EnableIRQ(I2C2_ER_IRQn);
|
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_I2C3_SCL)
|
|
|
|
} else if (i2c->Instance == I2C3) {
|
|
|
|
HAL_NVIC_EnableIRQ(I2C3_EV_IRQn);
|
|
|
|
HAL_NVIC_EnableIRQ(I2C3_ER_IRQn);
|
|
|
|
#endif
|
2016-11-24 19:21:18 -05:00
|
|
|
#if defined(MICROPY_HW_I2C4_SCL)
|
|
|
|
} else if (i2c->Instance == I2C4) {
|
|
|
|
HAL_NVIC_EnableIRQ(I2C4_EV_IRQn);
|
|
|
|
HAL_NVIC_EnableIRQ(I2C4_ER_IRQn);
|
|
|
|
#endif
|
2016-09-07 07:00:17 -04:00
|
|
|
}
|
2014-03-25 19:26:14 -04:00
|
|
|
}
|
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
void i2c_deinit(I2C_HandleTypeDef *i2c) {
|
|
|
|
HAL_I2C_DeInit(i2c);
|
|
|
|
if (0) {
|
2015-04-18 11:12:57 -04:00
|
|
|
#if defined(MICROPY_HW_I2C1_SCL)
|
2014-04-20 19:10:04 -04:00
|
|
|
} else if (i2c->Instance == I2C1) {
|
|
|
|
__I2C1_FORCE_RESET();
|
|
|
|
__I2C1_RELEASE_RESET();
|
|
|
|
__I2C1_CLK_DISABLE();
|
2016-09-07 07:00:17 -04:00
|
|
|
HAL_NVIC_DisableIRQ(I2C1_EV_IRQn);
|
|
|
|
HAL_NVIC_DisableIRQ(I2C1_ER_IRQn);
|
2015-04-18 11:12:57 -04:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_I2C2_SCL)
|
2014-04-20 19:10:04 -04:00
|
|
|
} else if (i2c->Instance == I2C2) {
|
|
|
|
__I2C2_FORCE_RESET();
|
|
|
|
__I2C2_RELEASE_RESET();
|
|
|
|
__I2C2_CLK_DISABLE();
|
2016-09-07 07:00:17 -04:00
|
|
|
HAL_NVIC_DisableIRQ(I2C2_EV_IRQn);
|
|
|
|
HAL_NVIC_DisableIRQ(I2C2_ER_IRQn);
|
2015-04-18 11:12:57 -04:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_I2C3_SCL)
|
|
|
|
} else if (i2c->Instance == I2C3) {
|
|
|
|
__I2C3_FORCE_RESET();
|
|
|
|
__I2C3_RELEASE_RESET();
|
|
|
|
__I2C3_CLK_DISABLE();
|
2016-09-07 07:00:17 -04:00
|
|
|
HAL_NVIC_DisableIRQ(I2C3_EV_IRQn);
|
|
|
|
HAL_NVIC_DisableIRQ(I2C3_ER_IRQn);
|
2015-04-18 11:12:57 -04:00
|
|
|
#endif
|
2016-11-24 19:21:18 -05:00
|
|
|
#if defined(MICROPY_HW_I2C4_SCL)
|
|
|
|
} else if (i2c->Instance == I2C4) {
|
|
|
|
__HAL_RCC_I2C4_FORCE_RESET();
|
|
|
|
__HAL_RCC_I2C4_RELEASE_RESET();
|
|
|
|
__HAL_RCC_I2C4_CLK_DISABLE();
|
|
|
|
HAL_NVIC_DisableIRQ(I2C4_EV_IRQn);
|
|
|
|
HAL_NVIC_DisableIRQ(I2C4_ER_IRQn);
|
|
|
|
#endif
|
2014-04-20 19:10:04 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-11-25 00:30:51 -05:00
|
|
|
void i2c_init_freq(const pyb_i2c_obj_t *self, mp_int_t freq) {
|
|
|
|
I2C_InitTypeDef *init = &self->i2c->Init;
|
|
|
|
|
|
|
|
init->AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
|
|
|
init->DualAddressMode = I2C_DUALADDRESS_DISABLED;
|
|
|
|
init->GeneralCallMode = I2C_GENERALCALL_DISABLED;
|
|
|
|
init->NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
|
|
|
init->OwnAddress1 = PYB_I2C_MASTER_ADDRESS;
|
|
|
|
init->OwnAddress2 = 0; // unused
|
|
|
|
if (freq != -1) {
|
|
|
|
i2c_set_baudrate(init, MIN(freq, MICROPY_HW_I2C_BAUDRATE_MAX));
|
|
|
|
}
|
|
|
|
|
|
|
|
*self->use_dma = false;
|
|
|
|
|
|
|
|
// init the I2C bus
|
|
|
|
i2c_deinit(self->i2c);
|
|
|
|
i2c_init(self->i2c);
|
|
|
|
}
|
|
|
|
|
2016-11-11 01:38:52 -05:00
|
|
|
STATIC void i2c_reset_after_error(I2C_HandleTypeDef *i2c) {
|
|
|
|
// wait for bus-busy flag to be cleared, with a timeout
|
|
|
|
for (int timeout = 50; timeout > 0; --timeout) {
|
|
|
|
if (!__HAL_I2C_GET_FLAG(i2c, I2C_FLAG_BUSY)) {
|
|
|
|
// stop bit was generated and bus is back to normal
|
|
|
|
return;
|
|
|
|
}
|
2017-03-01 23:02:57 -05:00
|
|
|
mp_hal_delay_ms(1);
|
2016-11-11 01:38:52 -05:00
|
|
|
}
|
|
|
|
// bus was/is busy, need to reset the peripheral to get it to work again
|
|
|
|
i2c_deinit(i2c);
|
|
|
|
i2c_init(i2c);
|
|
|
|
}
|
|
|
|
|
2016-09-09 09:27:46 -04:00
|
|
|
void i2c_ev_irq_handler(mp_uint_t i2c_id) {
|
|
|
|
I2C_HandleTypeDef *hi2c;
|
|
|
|
|
|
|
|
switch (i2c_id) {
|
|
|
|
#if defined(MICROPY_HW_I2C1_SCL)
|
|
|
|
case 1:
|
|
|
|
hi2c = &I2CHandle1;
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_I2C2_SCL)
|
|
|
|
case 2:
|
|
|
|
hi2c = &I2CHandle2;
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_I2C3_SCL)
|
|
|
|
case 3:
|
|
|
|
hi2c = &I2CHandle3;
|
|
|
|
break;
|
|
|
|
#endif
|
2016-11-24 19:21:18 -05:00
|
|
|
#if defined(MICROPY_HW_I2C4_SCL)
|
|
|
|
case 4:
|
|
|
|
hi2c = &I2CHandle4;
|
|
|
|
break;
|
|
|
|
#endif
|
2016-09-09 09:27:46 -04:00
|
|
|
default:
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2016-11-21 00:12:09 -05:00
|
|
|
#if defined(MCU_SERIES_F4)
|
|
|
|
|
2016-09-09 09:27:46 -04:00
|
|
|
if (hi2c->Instance->SR1 & I2C_FLAG_BTF && hi2c->State == HAL_I2C_STATE_BUSY_TX) {
|
|
|
|
if (hi2c->XferCount != 0U) {
|
|
|
|
hi2c->Instance->DR = *hi2c->pBuffPtr++;
|
|
|
|
hi2c->XferCount--;
|
|
|
|
} else {
|
|
|
|
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
|
|
|
|
if (hi2c->XferOptions != I2C_FIRST_FRAME) {
|
|
|
|
hi2c->Instance->CR1 |= I2C_CR1_STOP;
|
|
|
|
}
|
|
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
|
|
}
|
|
|
|
}
|
2016-11-21 00:12:09 -05:00
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
// if not an F4 MCU, use the HAL's IRQ handler
|
|
|
|
HAL_I2C_EV_IRQHandler(hi2c);
|
|
|
|
|
|
|
|
#endif
|
2016-09-09 09:27:46 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
void i2c_er_irq_handler(mp_uint_t i2c_id) {
|
|
|
|
I2C_HandleTypeDef *hi2c;
|
|
|
|
|
|
|
|
switch (i2c_id) {
|
|
|
|
#if defined(MICROPY_HW_I2C1_SCL)
|
|
|
|
case 1:
|
|
|
|
hi2c = &I2CHandle1;
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_I2C2_SCL)
|
|
|
|
case 2:
|
|
|
|
hi2c = &I2CHandle2;
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_I2C3_SCL)
|
|
|
|
case 3:
|
|
|
|
hi2c = &I2CHandle3;
|
|
|
|
break;
|
|
|
|
#endif
|
2016-11-24 19:21:18 -05:00
|
|
|
#if defined(MICROPY_HW_I2C4_SCL)
|
|
|
|
case 4:
|
|
|
|
hi2c = &I2CHandle4;
|
|
|
|
break;
|
|
|
|
#endif
|
2016-09-09 09:27:46 -04:00
|
|
|
default:
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2016-11-21 00:12:09 -05:00
|
|
|
#if defined(MCU_SERIES_F4)
|
|
|
|
|
2016-09-09 09:27:46 -04:00
|
|
|
uint32_t sr1 = hi2c->Instance->SR1;
|
|
|
|
|
|
|
|
// I2C Bus error
|
|
|
|
if (sr1 & I2C_FLAG_BERR) {
|
|
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
|
|
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
|
|
|
|
}
|
|
|
|
|
|
|
|
// I2C Arbitration Loss error
|
|
|
|
if (sr1 & I2C_FLAG_ARLO) {
|
|
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
|
|
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
|
|
|
|
}
|
|
|
|
|
|
|
|
// I2C Acknowledge failure
|
|
|
|
if (sr1 & I2C_FLAG_AF) {
|
|
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
|
|
|
SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
|
|
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
|
|
|
}
|
|
|
|
|
|
|
|
// I2C Over-Run/Under-Run
|
|
|
|
if (sr1 & I2C_FLAG_OVR) {
|
|
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
|
|
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
|
|
|
|
}
|
2016-11-21 00:12:09 -05:00
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
// if not an F4 MCU, use the HAL's IRQ handler
|
|
|
|
HAL_I2C_ER_IRQHandler(hi2c);
|
|
|
|
|
|
|
|
#endif
|
2016-09-09 09:27:46 -04:00
|
|
|
}
|
|
|
|
|
2015-06-10 08:53:00 -04:00
|
|
|
STATIC HAL_StatusTypeDef i2c_wait_dma_finished(I2C_HandleTypeDef *i2c, uint32_t timeout) {
|
|
|
|
// Note: we can't use WFI to idle in this loop because the DMA completion
|
|
|
|
// interrupt may occur before the WFI. Hence we miss it and have to wait
|
|
|
|
// until the next sys-tick (up to 1ms).
|
|
|
|
uint32_t start = HAL_GetTick();
|
|
|
|
while (HAL_I2C_GetState(i2c) != HAL_I2C_STATE_READY) {
|
|
|
|
if (HAL_GetTick() - start >= timeout) {
|
|
|
|
return HAL_TIMEOUT;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
|
2014-03-25 19:26:14 -04:00
|
|
|
/******************************************************************************/
|
2017-06-30 03:22:17 -04:00
|
|
|
/* MicroPython bindings */
|
2014-03-25 19:26:14 -04:00
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
STATIC inline bool in_master_mode(pyb_i2c_obj_t *self) { return self->i2c->Init.OwnAddress1 == PYB_I2C_MASTER_ADDRESS; }
|
|
|
|
|
2015-04-09 18:56:15 -04:00
|
|
|
STATIC void pyb_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
|
2014-04-20 19:10:04 -04:00
|
|
|
pyb_i2c_obj_t *self = self_in;
|
|
|
|
|
2015-04-18 11:12:57 -04:00
|
|
|
uint i2c_num = 0;
|
|
|
|
if (0) { }
|
|
|
|
#if defined(MICROPY_HW_I2C1_SCL)
|
|
|
|
else if (self->i2c->Instance == I2C1) { i2c_num = 1; }
|
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_I2C2_SCL)
|
|
|
|
else if (self->i2c->Instance == I2C2) { i2c_num = 2; }
|
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_I2C3_SCL)
|
|
|
|
else if (self->i2c->Instance == I2C3) { i2c_num = 3; }
|
|
|
|
#endif
|
2016-11-24 19:21:18 -05:00
|
|
|
#if defined(MICROPY_HW_I2C4_SCL)
|
|
|
|
else if (self->i2c->Instance == I2C4) { i2c_num = 4; }
|
|
|
|
#endif
|
2014-04-20 19:10:04 -04:00
|
|
|
|
|
|
|
if (self->i2c->State == HAL_I2C_STATE_RESET) {
|
2015-04-09 18:56:15 -04:00
|
|
|
mp_printf(print, "I2C(%u)", i2c_num);
|
2014-04-20 19:10:04 -04:00
|
|
|
} else {
|
|
|
|
if (in_master_mode(self)) {
|
2015-08-04 02:04:57 -04:00
|
|
|
mp_printf(print, "I2C(%u, I2C.MASTER, baudrate=%u)", i2c_num, i2c_get_baudrate(&self->i2c->Init));
|
2014-04-20 19:10:04 -04:00
|
|
|
} else {
|
2015-04-09 18:56:15 -04:00
|
|
|
mp_printf(print, "I2C(%u, I2C.SLAVE, addr=0x%02x)", i2c_num, (self->i2c->Instance->OAR1 >> 1) & 0x7f);
|
2014-04-20 19:10:04 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-04-29 17:55:34 -04:00
|
|
|
/// \method init(mode, *, addr=0x12, baudrate=400000, gencall=False)
|
|
|
|
///
|
|
|
|
/// Initialise the I2C bus with the given parameters:
|
|
|
|
///
|
|
|
|
/// - `mode` must be either `I2C.MASTER` or `I2C.SLAVE`
|
|
|
|
/// - `addr` is the 7-bit address (only sensible for a slave)
|
|
|
|
/// - `baudrate` is the SCL clock rate (only sensible for a master)
|
|
|
|
/// - `gencall` is whether to support general call mode
|
2015-06-22 18:46:22 -04:00
|
|
|
STATIC mp_obj_t pyb_i2c_init_helper(const pyb_i2c_obj_t *self, mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
|
|
|
static const mp_arg_t allowed_args[] = {
|
stmhal/modmachine: Initial attempt to add I2C & SPI classes.
In new hardware API, these classes implement master modes of interfaces,
and "mode" parameter is not accepted. Trying to implement new HW API
in terms of older pyb module leaves variuos corner cases:
In new HW API, I2C(1) means "I2C #1 in master mode" (? depends on
interpretation), while in old API, it means "I2C #1, with no settings
changes".
For I2C class, it's easy to make mode optional, because that's last
positional param, but for SPI, there's "baudrate" after it (which
is inconsistent with I2C, which requires "baudrate" to be kwonly-arg).
2015-11-14 09:13:58 -05:00
|
|
|
{ MP_QSTR_mode, MP_ARG_INT, {.u_int = PYB_I2C_MASTER} },
|
2015-06-22 18:46:22 -04:00
|
|
|
{ MP_QSTR_addr, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0x12} },
|
2015-08-04 02:04:57 -04:00
|
|
|
{ MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = MICROPY_HW_I2C_BAUDRATE_DEFAULT} },
|
2015-06-22 18:46:22 -04:00
|
|
|
{ MP_QSTR_gencall, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} },
|
2016-11-11 01:36:19 -05:00
|
|
|
{ MP_QSTR_dma, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} },
|
2015-06-22 18:46:22 -04:00
|
|
|
};
|
2014-04-20 19:10:04 -04:00
|
|
|
|
|
|
|
// parse args
|
2015-06-22 18:46:22 -04:00
|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
|
|
|
mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
2014-04-20 19:10:04 -04:00
|
|
|
|
|
|
|
// set the I2C configuration values
|
|
|
|
I2C_InitTypeDef *init = &self->i2c->Init;
|
|
|
|
|
2015-06-22 18:46:22 -04:00
|
|
|
if (args[0].u_int == PYB_I2C_MASTER) {
|
2014-04-20 19:10:04 -04:00
|
|
|
// use a special address to indicate we are a master
|
|
|
|
init->OwnAddress1 = PYB_I2C_MASTER_ADDRESS;
|
|
|
|
} else {
|
2015-06-22 18:46:22 -04:00
|
|
|
init->OwnAddress1 = (args[1].u_int << 1) & 0xfe;
|
2014-04-20 19:10:04 -04:00
|
|
|
}
|
|
|
|
|
2015-08-04 02:04:57 -04:00
|
|
|
i2c_set_baudrate(init, MIN(args[2].u_int, MICROPY_HW_I2C_BAUDRATE_MAX));
|
2014-04-20 19:10:04 -04:00
|
|
|
init->AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
|
|
|
init->DualAddressMode = I2C_DUALADDRESS_DISABLED;
|
2015-06-22 18:46:22 -04:00
|
|
|
init->GeneralCallMode = args[3].u_bool ? I2C_GENERALCALL_ENABLED : I2C_GENERALCALL_DISABLED;
|
2015-08-04 02:04:57 -04:00
|
|
|
init->OwnAddress2 = 0; // unused
|
|
|
|
init->NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
2014-04-20 19:10:04 -04:00
|
|
|
|
2016-11-11 01:36:19 -05:00
|
|
|
*self->use_dma = args[4].u_bool;
|
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
// init the I2C bus
|
2016-11-11 01:38:52 -05:00
|
|
|
i2c_deinit(self->i2c);
|
2014-04-20 19:10:04 -04:00
|
|
|
i2c_init(self->i2c);
|
|
|
|
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
|
2014-04-29 17:55:34 -04:00
|
|
|
/// \classmethod \constructor(bus, ...)
|
|
|
|
///
|
|
|
|
/// Construct an I2C object on the given bus. `bus` can be 1 or 2.
|
|
|
|
/// With no additional parameters, the I2C object is created but not
|
|
|
|
/// initialised (it has the settings from the last initialisation of
|
|
|
|
/// the bus, if any). If extra arguments are given, the bus is initialised.
|
|
|
|
/// See `init` for parameters of initialisation.
|
2014-05-04 09:28:11 -04:00
|
|
|
///
|
|
|
|
/// The physical pins of the I2C busses are:
|
|
|
|
///
|
|
|
|
/// - `I2C(1)` is on the X position: `(SCL, SDA) = (X9, X10) = (PB6, PB7)`
|
|
|
|
/// - `I2C(2)` is on the Y position: `(SCL, SDA) = (Y9, Y10) = (PB10, PB11)`
|
2017-01-04 08:10:42 -05:00
|
|
|
STATIC mp_obj_t pyb_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
|
2014-03-25 19:26:14 -04:00
|
|
|
// check arguments
|
2014-04-20 19:10:04 -04:00
|
|
|
mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
|
2014-03-25 19:26:14 -04:00
|
|
|
|
2015-05-27 12:16:26 -04:00
|
|
|
// work out i2c bus
|
|
|
|
int i2c_id = 0;
|
|
|
|
if (MP_OBJ_IS_STR(args[0])) {
|
|
|
|
const char *port = mp_obj_str_get_str(args[0]);
|
|
|
|
if (0) {
|
|
|
|
#ifdef MICROPY_HW_I2C1_NAME
|
|
|
|
} else if (strcmp(port, MICROPY_HW_I2C1_NAME) == 0) {
|
|
|
|
i2c_id = 1;
|
|
|
|
#endif
|
|
|
|
#ifdef MICROPY_HW_I2C2_NAME
|
|
|
|
} else if (strcmp(port, MICROPY_HW_I2C2_NAME) == 0) {
|
|
|
|
i2c_id = 2;
|
|
|
|
#endif
|
|
|
|
#ifdef MICROPY_HW_I2C3_NAME
|
|
|
|
} else if (strcmp(port, MICROPY_HW_I2C3_NAME) == 0) {
|
|
|
|
i2c_id = 3;
|
|
|
|
#endif
|
|
|
|
} else {
|
|
|
|
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError,
|
2017-06-14 22:02:14 -04:00
|
|
|
"I2C(%s) doesn't exist", port));
|
2015-05-27 12:16:26 -04:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
i2c_id = mp_obj_get_int(args[0]);
|
|
|
|
if (i2c_id < 1 || i2c_id > MP_ARRAY_SIZE(pyb_i2c_obj)
|
2015-05-28 06:05:44 -04:00
|
|
|
|| pyb_i2c_obj[i2c_id - 1].i2c == NULL) {
|
2015-05-27 12:16:26 -04:00
|
|
|
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError,
|
2017-06-14 22:02:14 -04:00
|
|
|
"I2C(%d) doesn't exist", i2c_id));
|
2015-05-27 12:16:26 -04:00
|
|
|
}
|
2014-03-25 19:26:14 -04:00
|
|
|
}
|
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
// get I2C object
|
2015-05-27 12:16:26 -04:00
|
|
|
const pyb_i2c_obj_t *i2c_obj = &pyb_i2c_obj[i2c_id - 1];
|
2014-03-25 19:26:14 -04:00
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
if (n_args > 1 || n_kw > 0) {
|
|
|
|
// start the peripheral
|
|
|
|
mp_map_t kw_args;
|
|
|
|
mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
|
|
|
|
pyb_i2c_init_helper(i2c_obj, n_args - 1, args + 1, &kw_args);
|
|
|
|
}
|
2014-03-25 19:26:14 -04:00
|
|
|
|
2014-04-11 19:51:41 -04:00
|
|
|
return (mp_obj_t)i2c_obj;
|
2014-03-25 19:26:14 -04:00
|
|
|
}
|
|
|
|
|
2014-08-29 19:35:11 -04:00
|
|
|
STATIC mp_obj_t pyb_i2c_init(mp_uint_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
|
2014-04-20 19:10:04 -04:00
|
|
|
return pyb_i2c_init_helper(args[0], n_args - 1, args + 1, kw_args);
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_init_obj, 1, pyb_i2c_init);
|
|
|
|
|
2014-04-29 17:55:34 -04:00
|
|
|
/// \method deinit()
|
|
|
|
/// Turn off the I2C bus.
|
2014-04-20 19:10:04 -04:00
|
|
|
STATIC mp_obj_t pyb_i2c_deinit(mp_obj_t self_in) {
|
|
|
|
pyb_i2c_obj_t *self = self_in;
|
|
|
|
i2c_deinit(self->i2c);
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_i2c_deinit_obj, pyb_i2c_deinit);
|
|
|
|
|
2014-04-29 17:55:34 -04:00
|
|
|
/// \method is_ready(addr)
|
|
|
|
/// Check if an I2C device responds to the given address. Only valid when in master mode.
|
2014-03-25 19:26:14 -04:00
|
|
|
STATIC mp_obj_t pyb_i2c_is_ready(mp_obj_t self_in, mp_obj_t i2c_addr_o) {
|
|
|
|
pyb_i2c_obj_t *self = self_in;
|
2014-04-20 19:10:04 -04:00
|
|
|
|
|
|
|
if (!in_master_mode(self)) {
|
|
|
|
nlr_raise(mp_obj_new_exception_msg(&mp_type_TypeError, "I2C must be a master"));
|
|
|
|
}
|
|
|
|
|
2014-07-03 08:25:24 -04:00
|
|
|
mp_uint_t i2c_addr = mp_obj_get_int(i2c_addr_o) << 1;
|
2014-03-25 19:26:14 -04:00
|
|
|
|
|
|
|
for (int i = 0; i < 10; i++) {
|
2014-04-19 19:30:09 -04:00
|
|
|
HAL_StatusTypeDef status = HAL_I2C_IsDeviceReady(self->i2c, i2c_addr, 10, 200);
|
2014-03-25 19:26:14 -04:00
|
|
|
if (status == HAL_OK) {
|
|
|
|
return mp_const_true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return mp_const_false;
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_i2c_is_ready_obj, pyb_i2c_is_ready);
|
|
|
|
|
2014-04-29 17:55:34 -04:00
|
|
|
/// \method scan()
|
2016-05-02 06:15:36 -04:00
|
|
|
/// Scan all I2C addresses from 0x08 to 0x77 and return a list of those that respond.
|
2014-04-29 17:55:34 -04:00
|
|
|
/// Only valid when in master mode.
|
2014-04-15 14:24:13 -04:00
|
|
|
STATIC mp_obj_t pyb_i2c_scan(mp_obj_t self_in) {
|
|
|
|
pyb_i2c_obj_t *self = self_in;
|
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
if (!in_master_mode(self)) {
|
|
|
|
nlr_raise(mp_obj_new_exception_msg(&mp_type_TypeError, "I2C must be a master"));
|
|
|
|
}
|
|
|
|
|
2014-04-15 14:24:13 -04:00
|
|
|
mp_obj_t list = mp_obj_new_list(0, NULL);
|
|
|
|
|
2016-05-02 06:15:36 -04:00
|
|
|
for (uint addr = 0x08; addr <= 0x77; addr++) {
|
2014-04-15 14:24:13 -04:00
|
|
|
for (int i = 0; i < 10; i++) {
|
2014-04-19 19:30:09 -04:00
|
|
|
HAL_StatusTypeDef status = HAL_I2C_IsDeviceReady(self->i2c, addr << 1, 10, 200);
|
2014-04-15 14:24:13 -04:00
|
|
|
if (status == HAL_OK) {
|
|
|
|
mp_obj_list_append(list, mp_obj_new_int(addr));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return list;
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_i2c_scan_obj, pyb_i2c_scan);
|
|
|
|
|
2014-04-29 17:55:34 -04:00
|
|
|
/// \method send(send, addr=0x00, timeout=5000)
|
|
|
|
/// Send data on the bus:
|
|
|
|
///
|
|
|
|
/// - `send` is the data to send (an integer to send, or a buffer object)
|
|
|
|
/// - `addr` is the address to send to (only required in master mode)
|
|
|
|
/// - `timeout` is the timeout in milliseconds to wait for the send
|
|
|
|
///
|
|
|
|
/// Return value: `None`.
|
2015-06-22 18:46:22 -04:00
|
|
|
STATIC mp_obj_t pyb_i2c_send(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
|
|
|
static const mp_arg_t allowed_args[] = {
|
|
|
|
{ MP_QSTR_send, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
|
|
|
{ MP_QSTR_addr, MP_ARG_INT, {.u_int = PYB_I2C_MASTER_ADDRESS} },
|
|
|
|
{ MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} },
|
|
|
|
};
|
2014-04-20 19:10:04 -04:00
|
|
|
|
|
|
|
// parse args
|
2015-06-22 18:46:22 -04:00
|
|
|
pyb_i2c_obj_t *self = pos_args[0];
|
|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
|
|
|
mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
2014-04-20 19:10:04 -04:00
|
|
|
|
|
|
|
// get the buffer to send from
|
|
|
|
mp_buffer_info_t bufinfo;
|
|
|
|
uint8_t data[1];
|
2015-06-22 18:46:22 -04:00
|
|
|
pyb_buf_get_for_send(args[0].u_obj, &bufinfo, data);
|
2014-04-20 19:10:04 -04:00
|
|
|
|
2016-11-11 01:36:19 -05:00
|
|
|
// if option is set and IRQs are enabled then we can use DMA
|
|
|
|
bool use_dma = *self->use_dma && query_irq() == IRQ_STATE_ENABLED;
|
|
|
|
|
2015-06-10 08:53:00 -04:00
|
|
|
DMA_HandleTypeDef tx_dma;
|
2016-11-11 01:36:19 -05:00
|
|
|
if (use_dma) {
|
2016-03-22 06:28:35 -04:00
|
|
|
dma_init(&tx_dma, self->tx_dma_descr, self->i2c);
|
2015-06-10 08:53:00 -04:00
|
|
|
self->i2c->hdmatx = &tx_dma;
|
|
|
|
self->i2c->hdmarx = NULL;
|
|
|
|
}
|
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
// send the data
|
|
|
|
HAL_StatusTypeDef status;
|
|
|
|
if (in_master_mode(self)) {
|
2015-06-22 18:46:22 -04:00
|
|
|
if (args[1].u_int == PYB_I2C_MASTER_ADDRESS) {
|
2016-11-11 01:36:19 -05:00
|
|
|
if (use_dma) {
|
2016-03-22 06:28:35 -04:00
|
|
|
dma_deinit(self->tx_dma_descr);
|
2015-06-10 08:53:00 -04:00
|
|
|
}
|
2014-04-20 19:10:04 -04:00
|
|
|
nlr_raise(mp_obj_new_exception_msg(&mp_type_TypeError, "addr argument required"));
|
|
|
|
}
|
2015-06-22 18:46:22 -04:00
|
|
|
mp_uint_t i2c_addr = args[1].u_int << 1;
|
2016-11-11 01:36:19 -05:00
|
|
|
if (!use_dma) {
|
2015-06-22 18:46:22 -04:00
|
|
|
status = HAL_I2C_Master_Transmit(self->i2c, i2c_addr, bufinfo.buf, bufinfo.len, args[2].u_int);
|
2015-06-10 08:53:00 -04:00
|
|
|
} else {
|
2017-03-30 21:56:18 -04:00
|
|
|
MP_HAL_CLEAN_DCACHE(bufinfo.buf, bufinfo.len);
|
2015-06-10 08:53:00 -04:00
|
|
|
status = HAL_I2C_Master_Transmit_DMA(self->i2c, i2c_addr, bufinfo.buf, bufinfo.len);
|
|
|
|
}
|
2014-04-20 19:10:04 -04:00
|
|
|
} else {
|
2016-11-11 01:36:19 -05:00
|
|
|
if (!use_dma) {
|
2015-06-22 18:46:22 -04:00
|
|
|
status = HAL_I2C_Slave_Transmit(self->i2c, bufinfo.buf, bufinfo.len, args[2].u_int);
|
2015-06-10 08:53:00 -04:00
|
|
|
} else {
|
2017-03-30 21:56:18 -04:00
|
|
|
MP_HAL_CLEAN_DCACHE(bufinfo.buf, bufinfo.len);
|
2015-06-10 08:53:00 -04:00
|
|
|
status = HAL_I2C_Slave_Transmit_DMA(self->i2c, bufinfo.buf, bufinfo.len);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// if we used DMA, wait for it to finish
|
2016-11-11 01:36:19 -05:00
|
|
|
if (use_dma) {
|
2015-06-10 08:53:00 -04:00
|
|
|
if (status == HAL_OK) {
|
2015-06-22 18:46:22 -04:00
|
|
|
status = i2c_wait_dma_finished(self->i2c, args[2].u_int);
|
2015-06-10 08:53:00 -04:00
|
|
|
}
|
2016-03-22 06:28:35 -04:00
|
|
|
dma_deinit(self->tx_dma_descr);
|
2014-04-20 19:10:04 -04:00
|
|
|
}
|
2014-04-15 19:27:14 -04:00
|
|
|
|
|
|
|
if (status != HAL_OK) {
|
2016-11-11 01:38:52 -05:00
|
|
|
i2c_reset_after_error(self->i2c);
|
2014-10-23 09:25:32 -04:00
|
|
|
mp_hal_raise(status);
|
2014-04-15 19:27:14 -04:00
|
|
|
}
|
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
return mp_const_none;
|
2014-04-15 19:27:14 -04:00
|
|
|
}
|
2014-04-20 19:10:04 -04:00
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_send_obj, 1, pyb_i2c_send);
|
|
|
|
|
2014-05-03 11:42:27 -04:00
|
|
|
/// \method recv(recv, addr=0x00, timeout=5000)
|
2014-04-29 17:55:34 -04:00
|
|
|
///
|
|
|
|
/// Receive data on the bus:
|
|
|
|
///
|
|
|
|
/// - `recv` can be an integer, which is the number of bytes to receive,
|
|
|
|
/// or a mutable buffer, which will be filled with received bytes
|
|
|
|
/// - `addr` is the address to receive from (only required in master mode)
|
|
|
|
/// - `timeout` is the timeout in milliseconds to wait for the receive
|
|
|
|
///
|
|
|
|
/// Return value: if `recv` is an integer then a new buffer of the bytes received,
|
|
|
|
/// otherwise the same buffer that was passed in to `recv`.
|
2015-06-22 18:46:22 -04:00
|
|
|
STATIC mp_obj_t pyb_i2c_recv(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
|
|
|
static const mp_arg_t allowed_args[] = {
|
|
|
|
{ MP_QSTR_recv, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
|
|
|
{ MP_QSTR_addr, MP_ARG_INT, {.u_int = PYB_I2C_MASTER_ADDRESS} },
|
|
|
|
{ MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} },
|
|
|
|
};
|
2014-04-15 19:27:14 -04:00
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
// parse args
|
2015-06-22 18:46:22 -04:00
|
|
|
pyb_i2c_obj_t *self = pos_args[0];
|
|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
|
|
|
mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
2014-04-20 19:10:04 -04:00
|
|
|
|
|
|
|
// get the buffer to receive into
|
2015-01-21 17:48:37 -05:00
|
|
|
vstr_t vstr;
|
2015-06-22 18:46:22 -04:00
|
|
|
mp_obj_t o_ret = pyb_buf_get_for_recv(args[0].u_obj, &vstr);
|
2014-04-20 19:10:04 -04:00
|
|
|
|
2016-11-11 01:36:19 -05:00
|
|
|
// if option is set and IRQs are enabled then we can use DMA
|
|
|
|
bool use_dma = *self->use_dma && query_irq() == IRQ_STATE_ENABLED;
|
|
|
|
|
2015-06-10 08:53:00 -04:00
|
|
|
DMA_HandleTypeDef rx_dma;
|
2016-11-11 01:36:19 -05:00
|
|
|
if (use_dma) {
|
2016-03-22 06:28:35 -04:00
|
|
|
dma_init(&rx_dma, self->rx_dma_descr, self->i2c);
|
2015-06-10 08:53:00 -04:00
|
|
|
self->i2c->hdmatx = NULL;
|
|
|
|
self->i2c->hdmarx = &rx_dma;
|
|
|
|
}
|
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
// receive the data
|
2014-04-15 19:27:14 -04:00
|
|
|
HAL_StatusTypeDef status;
|
2014-04-20 19:10:04 -04:00
|
|
|
if (in_master_mode(self)) {
|
2015-06-22 18:46:22 -04:00
|
|
|
if (args[1].u_int == PYB_I2C_MASTER_ADDRESS) {
|
2014-04-20 19:10:04 -04:00
|
|
|
nlr_raise(mp_obj_new_exception_msg(&mp_type_TypeError, "addr argument required"));
|
|
|
|
}
|
2015-06-22 18:46:22 -04:00
|
|
|
mp_uint_t i2c_addr = args[1].u_int << 1;
|
2016-11-11 01:36:19 -05:00
|
|
|
if (!use_dma) {
|
2015-06-22 18:46:22 -04:00
|
|
|
status = HAL_I2C_Master_Receive(self->i2c, i2c_addr, (uint8_t*)vstr.buf, vstr.len, args[2].u_int);
|
2015-06-10 08:53:00 -04:00
|
|
|
} else {
|
2017-03-30 21:56:18 -04:00
|
|
|
MP_HAL_CLEANINVALIDATE_DCACHE(vstr.buf, vstr.len);
|
2015-06-10 08:53:00 -04:00
|
|
|
status = HAL_I2C_Master_Receive_DMA(self->i2c, i2c_addr, (uint8_t*)vstr.buf, vstr.len);
|
|
|
|
}
|
2014-04-15 19:27:14 -04:00
|
|
|
} else {
|
2016-11-11 01:36:19 -05:00
|
|
|
if (!use_dma) {
|
2015-06-22 18:46:22 -04:00
|
|
|
status = HAL_I2C_Slave_Receive(self->i2c, (uint8_t*)vstr.buf, vstr.len, args[2].u_int);
|
2015-06-10 08:53:00 -04:00
|
|
|
} else {
|
2017-03-30 21:56:18 -04:00
|
|
|
MP_HAL_CLEANINVALIDATE_DCACHE(vstr.buf, vstr.len);
|
2015-06-10 08:53:00 -04:00
|
|
|
status = HAL_I2C_Slave_Receive_DMA(self->i2c, (uint8_t*)vstr.buf, vstr.len);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// if we used DMA, wait for it to finish
|
2016-11-11 01:36:19 -05:00
|
|
|
if (use_dma) {
|
2015-06-10 08:53:00 -04:00
|
|
|
if (status == HAL_OK) {
|
2015-06-22 18:46:22 -04:00
|
|
|
status = i2c_wait_dma_finished(self->i2c, args[2].u_int);
|
2015-06-10 08:53:00 -04:00
|
|
|
}
|
2016-03-22 06:28:35 -04:00
|
|
|
dma_deinit(self->rx_dma_descr);
|
2014-04-15 19:27:14 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
if (status != HAL_OK) {
|
2016-11-11 01:38:52 -05:00
|
|
|
i2c_reset_after_error(self->i2c);
|
2014-10-23 09:25:32 -04:00
|
|
|
mp_hal_raise(status);
|
2014-04-15 19:27:14 -04:00
|
|
|
}
|
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
// return the received data
|
2015-01-21 17:48:37 -05:00
|
|
|
if (o_ret != MP_OBJ_NULL) {
|
|
|
|
return o_ret;
|
2014-04-20 19:10:04 -04:00
|
|
|
} else {
|
2015-01-21 17:48:37 -05:00
|
|
|
return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr);
|
2014-04-20 19:10:04 -04:00
|
|
|
}
|
2014-04-15 19:27:14 -04:00
|
|
|
}
|
2014-04-20 19:10:04 -04:00
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_recv_obj, 1, pyb_i2c_recv);
|
2014-04-15 19:27:14 -04:00
|
|
|
|
2014-07-21 22:45:04 -04:00
|
|
|
/// \method mem_read(data, addr, memaddr, timeout=5000, addr_size=8)
|
2014-04-29 17:55:34 -04:00
|
|
|
///
|
|
|
|
/// Read from the memory of an I2C device:
|
|
|
|
///
|
|
|
|
/// - `data` can be an integer or a buffer to read into
|
|
|
|
/// - `addr` is the I2C device address
|
|
|
|
/// - `memaddr` is the memory location within the I2C device
|
|
|
|
/// - `timeout` is the timeout in milliseconds to wait for the read
|
2014-07-21 22:45:04 -04:00
|
|
|
/// - `addr_size` selects width of memaddr: 8 or 16 bits
|
2014-04-29 17:55:34 -04:00
|
|
|
///
|
|
|
|
/// Returns the read data.
|
|
|
|
/// This is only valid in master mode.
|
2015-06-22 18:46:22 -04:00
|
|
|
STATIC const mp_arg_t pyb_i2c_mem_read_allowed_args[] = {
|
2014-04-26 06:19:17 -04:00
|
|
|
{ MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
|
|
|
{ MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} },
|
|
|
|
{ MP_QSTR_memaddr, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} },
|
|
|
|
{ MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 5000} },
|
2014-07-21 22:45:04 -04:00
|
|
|
{ MP_QSTR_addr_size, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
|
2014-04-20 19:10:04 -04:00
|
|
|
};
|
2014-04-15 19:27:14 -04:00
|
|
|
|
2015-06-22 18:46:22 -04:00
|
|
|
STATIC mp_obj_t pyb_i2c_mem_read(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
|
|
|
// parse args
|
|
|
|
pyb_i2c_obj_t *self = pos_args[0];
|
|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_mem_read_allowed_args)];
|
|
|
|
mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(pyb_i2c_mem_read_allowed_args), pyb_i2c_mem_read_allowed_args, args);
|
2014-03-25 19:26:14 -04:00
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
if (!in_master_mode(self)) {
|
|
|
|
nlr_raise(mp_obj_new_exception_msg(&mp_type_TypeError, "I2C must be a master"));
|
|
|
|
}
|
|
|
|
|
|
|
|
// get the buffer to read into
|
2015-01-21 17:48:37 -05:00
|
|
|
vstr_t vstr;
|
2015-06-22 18:46:22 -04:00
|
|
|
mp_obj_t o_ret = pyb_buf_get_for_recv(args[0].u_obj, &vstr);
|
2014-03-25 19:26:14 -04:00
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
// get the addresses
|
2015-06-22 18:46:22 -04:00
|
|
|
mp_uint_t i2c_addr = args[1].u_int << 1;
|
|
|
|
mp_uint_t mem_addr = args[2].u_int;
|
2014-07-21 22:45:04 -04:00
|
|
|
// determine width of mem_addr; default is 8 bits, entering any other value gives 16 bit width
|
2014-07-11 16:14:01 -04:00
|
|
|
mp_uint_t mem_addr_size = I2C_MEMADD_SIZE_8BIT;
|
2015-06-22 18:46:22 -04:00
|
|
|
if (args[4].u_int != 8) {
|
2014-07-11 21:18:09 -04:00
|
|
|
mem_addr_size = I2C_MEMADD_SIZE_16BIT;
|
2014-07-11 16:14:01 -04:00
|
|
|
}
|
2014-04-20 19:10:04 -04:00
|
|
|
|
2016-11-11 01:36:19 -05:00
|
|
|
// if option is set and IRQs are enabled then we can use DMA
|
|
|
|
bool use_dma = *self->use_dma && query_irq() == IRQ_STATE_ENABLED;
|
|
|
|
|
2015-06-10 08:53:00 -04:00
|
|
|
HAL_StatusTypeDef status;
|
2016-11-11 01:36:19 -05:00
|
|
|
if (!use_dma) {
|
2015-06-22 18:46:22 -04:00
|
|
|
status = HAL_I2C_Mem_Read(self->i2c, i2c_addr, mem_addr, mem_addr_size, (uint8_t*)vstr.buf, vstr.len, args[3].u_int);
|
2015-06-10 08:53:00 -04:00
|
|
|
} else {
|
|
|
|
DMA_HandleTypeDef rx_dma;
|
2016-03-22 06:28:35 -04:00
|
|
|
dma_init(&rx_dma, self->rx_dma_descr, self->i2c);
|
2015-06-10 08:53:00 -04:00
|
|
|
self->i2c->hdmatx = NULL;
|
|
|
|
self->i2c->hdmarx = &rx_dma;
|
2017-03-30 21:56:18 -04:00
|
|
|
MP_HAL_CLEANINVALIDATE_DCACHE(vstr.buf, vstr.len);
|
2015-06-10 08:53:00 -04:00
|
|
|
status = HAL_I2C_Mem_Read_DMA(self->i2c, i2c_addr, mem_addr, mem_addr_size, (uint8_t*)vstr.buf, vstr.len);
|
|
|
|
if (status == HAL_OK) {
|
2015-06-22 18:46:22 -04:00
|
|
|
status = i2c_wait_dma_finished(self->i2c, args[3].u_int);
|
2015-06-10 08:53:00 -04:00
|
|
|
}
|
2016-03-22 06:28:35 -04:00
|
|
|
dma_deinit(self->rx_dma_descr);
|
2015-06-10 08:53:00 -04:00
|
|
|
}
|
2014-03-25 19:26:14 -04:00
|
|
|
|
|
|
|
if (status != HAL_OK) {
|
2016-11-11 01:38:52 -05:00
|
|
|
i2c_reset_after_error(self->i2c);
|
2014-10-23 09:25:32 -04:00
|
|
|
mp_hal_raise(status);
|
2014-03-25 19:26:14 -04:00
|
|
|
}
|
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
// return the read data
|
2015-01-21 17:48:37 -05:00
|
|
|
if (o_ret != MP_OBJ_NULL) {
|
|
|
|
return o_ret;
|
2014-04-20 19:10:04 -04:00
|
|
|
} else {
|
2015-01-21 17:48:37 -05:00
|
|
|
return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr);
|
2014-04-20 19:10:04 -04:00
|
|
|
}
|
2014-03-25 19:26:14 -04:00
|
|
|
}
|
2014-04-20 19:10:04 -04:00
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_mem_read_obj, 1, pyb_i2c_mem_read);
|
2014-03-25 19:26:14 -04:00
|
|
|
|
2014-07-21 22:45:04 -04:00
|
|
|
/// \method mem_write(data, addr, memaddr, timeout=5000, addr_size=8)
|
2014-04-29 17:55:34 -04:00
|
|
|
///
|
|
|
|
/// Write to the memory of an I2C device:
|
|
|
|
///
|
|
|
|
/// - `data` can be an integer or a buffer to write from
|
|
|
|
/// - `addr` is the I2C device address
|
|
|
|
/// - `memaddr` is the memory location within the I2C device
|
|
|
|
/// - `timeout` is the timeout in milliseconds to wait for the write
|
2014-07-21 22:45:04 -04:00
|
|
|
/// - `addr_size` selects width of memaddr: 8 or 16 bits
|
2014-04-29 17:55:34 -04:00
|
|
|
///
|
|
|
|
/// Returns `None`.
|
|
|
|
/// This is only valid in master mode.
|
2015-06-22 18:46:22 -04:00
|
|
|
STATIC mp_obj_t pyb_i2c_mem_write(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
|
|
|
// parse args (same as mem_read)
|
|
|
|
pyb_i2c_obj_t *self = pos_args[0];
|
|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(pyb_i2c_mem_read_allowed_args)];
|
|
|
|
mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(pyb_i2c_mem_read_allowed_args), pyb_i2c_mem_read_allowed_args, args);
|
2014-04-20 19:10:04 -04:00
|
|
|
|
|
|
|
if (!in_master_mode(self)) {
|
|
|
|
nlr_raise(mp_obj_new_exception_msg(&mp_type_TypeError, "I2C must be a master"));
|
2014-03-25 19:26:14 -04:00
|
|
|
}
|
|
|
|
|
2014-04-20 19:10:04 -04:00
|
|
|
// get the buffer to write from
|
|
|
|
mp_buffer_info_t bufinfo;
|
|
|
|
uint8_t data[1];
|
2015-06-22 18:46:22 -04:00
|
|
|
pyb_buf_get_for_send(args[0].u_obj, &bufinfo, data);
|
2014-04-20 19:10:04 -04:00
|
|
|
|
|
|
|
// get the addresses
|
2015-06-22 18:46:22 -04:00
|
|
|
mp_uint_t i2c_addr = args[1].u_int << 1;
|
|
|
|
mp_uint_t mem_addr = args[2].u_int;
|
2014-07-21 22:45:04 -04:00
|
|
|
// determine width of mem_addr; default is 8 bits, entering any other value gives 16 bit width
|
2014-07-11 16:14:01 -04:00
|
|
|
mp_uint_t mem_addr_size = I2C_MEMADD_SIZE_8BIT;
|
2015-06-22 18:46:22 -04:00
|
|
|
if (args[4].u_int != 8) {
|
2014-07-11 21:18:09 -04:00
|
|
|
mem_addr_size = I2C_MEMADD_SIZE_16BIT;
|
2014-07-11 16:14:01 -04:00
|
|
|
}
|
2014-04-20 19:10:04 -04:00
|
|
|
|
2016-11-11 01:36:19 -05:00
|
|
|
// if option is set and IRQs are enabled then we can use DMA
|
|
|
|
bool use_dma = *self->use_dma && query_irq() == IRQ_STATE_ENABLED;
|
|
|
|
|
2015-06-10 08:53:00 -04:00
|
|
|
HAL_StatusTypeDef status;
|
2016-11-11 01:36:19 -05:00
|
|
|
if (!use_dma) {
|
2015-06-22 18:46:22 -04:00
|
|
|
status = HAL_I2C_Mem_Write(self->i2c, i2c_addr, mem_addr, mem_addr_size, bufinfo.buf, bufinfo.len, args[3].u_int);
|
2015-06-10 08:53:00 -04:00
|
|
|
} else {
|
|
|
|
DMA_HandleTypeDef tx_dma;
|
2016-03-22 06:28:35 -04:00
|
|
|
dma_init(&tx_dma, self->tx_dma_descr, self->i2c);
|
2015-06-10 08:53:00 -04:00
|
|
|
self->i2c->hdmatx = &tx_dma;
|
|
|
|
self->i2c->hdmarx = NULL;
|
2017-03-30 21:56:18 -04:00
|
|
|
MP_HAL_CLEAN_DCACHE(bufinfo.buf, bufinfo.len);
|
2015-06-10 08:53:00 -04:00
|
|
|
status = HAL_I2C_Mem_Write_DMA(self->i2c, i2c_addr, mem_addr, mem_addr_size, bufinfo.buf, bufinfo.len);
|
|
|
|
if (status == HAL_OK) {
|
2015-06-22 18:46:22 -04:00
|
|
|
status = i2c_wait_dma_finished(self->i2c, args[3].u_int);
|
2015-06-10 08:53:00 -04:00
|
|
|
}
|
2016-03-22 06:28:35 -04:00
|
|
|
dma_deinit(self->tx_dma_descr);
|
2015-06-10 08:53:00 -04:00
|
|
|
}
|
2014-03-25 19:26:14 -04:00
|
|
|
|
|
|
|
if (status != HAL_OK) {
|
2016-11-11 01:38:52 -05:00
|
|
|
i2c_reset_after_error(self->i2c);
|
2014-10-23 09:25:32 -04:00
|
|
|
mp_hal_raise(status);
|
2014-03-25 19:26:14 -04:00
|
|
|
}
|
|
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return mp_const_none;
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}
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2014-04-20 19:10:04 -04:00
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STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_i2c_mem_write_obj, 1, pyb_i2c_mem_write);
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2014-03-25 19:26:14 -04:00
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2017-05-06 03:03:40 -04:00
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STATIC const mp_rom_map_elem_t pyb_i2c_locals_dict_table[] = {
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2014-04-20 19:10:04 -04:00
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// instance methods
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2017-05-06 03:03:40 -04:00
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{ MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_i2c_init_obj) },
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{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_i2c_deinit_obj) },
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{ MP_ROM_QSTR(MP_QSTR_is_ready), MP_ROM_PTR(&pyb_i2c_is_ready_obj) },
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{ MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&pyb_i2c_scan_obj) },
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{ MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&pyb_i2c_send_obj) },
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{ MP_ROM_QSTR(MP_QSTR_recv), MP_ROM_PTR(&pyb_i2c_recv_obj) },
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{ MP_ROM_QSTR(MP_QSTR_mem_read), MP_ROM_PTR(&pyb_i2c_mem_read_obj) },
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{ MP_ROM_QSTR(MP_QSTR_mem_write), MP_ROM_PTR(&pyb_i2c_mem_write_obj) },
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2014-04-20 19:10:04 -04:00
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// class constants
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2014-04-29 17:55:34 -04:00
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/// \constant MASTER - for initialising the bus to master mode
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/// \constant SLAVE - for initialising the bus to slave mode
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2017-05-06 03:03:40 -04:00
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{ MP_ROM_QSTR(MP_QSTR_MASTER), MP_ROM_INT(PYB_I2C_MASTER) },
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{ MP_ROM_QSTR(MP_QSTR_SLAVE), MP_ROM_INT(PYB_I2C_SLAVE) },
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2014-03-25 19:26:14 -04:00
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};
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2014-03-26 17:47:19 -04:00
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STATIC MP_DEFINE_CONST_DICT(pyb_i2c_locals_dict, pyb_i2c_locals_dict_table);
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2014-03-25 19:26:14 -04:00
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const mp_obj_type_t pyb_i2c_type = {
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{ &mp_type_type },
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.name = MP_QSTR_I2C,
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2014-04-20 19:10:04 -04:00
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.print = pyb_i2c_print,
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2014-03-25 19:26:14 -04:00
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.make_new = pyb_i2c_make_new,
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2017-05-06 03:03:40 -04:00
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.locals_dict = (mp_obj_dict_t*)&pyb_i2c_locals_dict,
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2014-03-25 19:26:14 -04:00
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};
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