stmhal/i2c: provide custom IRQ handlers
Use custom handlers providing minimal required functionality because those provided by ST increase code size by almost 2 KiB.
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7604de3fc2
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8fa0733647
89
stmhal/i2c.c
89
stmhal/i2c.c
@ -317,6 +317,95 @@ STATIC void i2c_reset_after_error(I2C_HandleTypeDef *i2c) {
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i2c_init(i2c);
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}
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void i2c_ev_irq_handler(mp_uint_t i2c_id) {
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I2C_HandleTypeDef *hi2c;
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switch (i2c_id) {
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#if defined(MICROPY_HW_I2C1_SCL)
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case 1:
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hi2c = &I2CHandle1;
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break;
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#endif
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#if defined(MICROPY_HW_I2C2_SCL)
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case 2:
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hi2c = &I2CHandle2;
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break;
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#endif
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#if defined(MICROPY_HW_I2C3_SCL)
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case 3:
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hi2c = &I2CHandle3;
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break;
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#endif
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default:
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return;
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}
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if (hi2c->Instance->SR1 & I2C_FLAG_BTF && hi2c->State == HAL_I2C_STATE_BUSY_TX) {
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if (hi2c->XferCount != 0U) {
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hi2c->Instance->DR = *hi2c->pBuffPtr++;
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hi2c->XferCount--;
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} else {
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__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
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if (hi2c->XferOptions != I2C_FIRST_FRAME) {
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hi2c->Instance->CR1 |= I2C_CR1_STOP;
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}
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hi2c->Mode = HAL_I2C_MODE_NONE;
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hi2c->State = HAL_I2C_STATE_READY;
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}
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}
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}
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void i2c_er_irq_handler(mp_uint_t i2c_id) {
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I2C_HandleTypeDef *hi2c;
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switch (i2c_id) {
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#if defined(MICROPY_HW_I2C1_SCL)
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case 1:
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hi2c = &I2CHandle1;
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break;
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#endif
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#if defined(MICROPY_HW_I2C2_SCL)
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case 2:
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hi2c = &I2CHandle2;
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break;
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#endif
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#if defined(MICROPY_HW_I2C3_SCL)
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case 3:
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hi2c = &I2CHandle3;
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break;
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#endif
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default:
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return;
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}
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uint32_t sr1 = hi2c->Instance->SR1;
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// I2C Bus error
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if (sr1 & I2C_FLAG_BERR) {
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hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
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__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
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}
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// I2C Arbitration Loss error
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if (sr1 & I2C_FLAG_ARLO) {
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hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
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__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
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}
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// I2C Acknowledge failure
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if (sr1 & I2C_FLAG_AF) {
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hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
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SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
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__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
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}
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// I2C Over-Run/Under-Run
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if (sr1 & I2C_FLAG_OVR) {
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hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
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__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
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}
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}
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STATIC HAL_StatusTypeDef i2c_wait_dma_finished(I2C_HandleTypeDef *i2c, uint32_t timeout) {
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// Note: we can't use WFI to idle in this loop because the DMA completion
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// interrupt may occur before the WFI. Hence we miss it and have to wait
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@ -34,3 +34,5 @@ extern const mp_obj_type_t pyb_i2c_type;
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void i2c_init0(void);
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void i2c_init(I2C_HandleTypeDef *i2c);
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void i2c_ev_irq_handler(mp_uint_t i2c_id);
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void i2c_er_irq_handler(mp_uint_t i2c_id);
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@ -706,13 +706,13 @@ void CAN2_RX1_IRQHandler(void) {
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#if defined(MICROPY_HW_I2C1_SCL)
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void I2C1_EV_IRQHandler(void) {
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IRQ_ENTER(I2C1_EV_IRQn);
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HAL_I2C_EV_IRQHandler(&I2CHandle1);
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i2c_ev_irq_handler(1);
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IRQ_EXIT(I2C1_EV_IRQn);
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}
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void I2C1_ER_IRQHandler(void) {
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IRQ_ENTER(I2C1_ER_IRQn);
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HAL_I2C_ER_IRQHandler(&I2CHandle1);
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i2c_er_irq_handler(1);
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IRQ_EXIT(I2C1_ER_IRQn);
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}
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#endif // defined(MICROPY_HW_I2C1_SCL)
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@ -720,13 +720,13 @@ void I2C1_ER_IRQHandler(void) {
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#if defined(MICROPY_HW_I2C2_SCL)
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void I2C2_EV_IRQHandler(void) {
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IRQ_ENTER(I2C2_EV_IRQn);
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HAL_I2C_EV_IRQHandler(&I2CHandle2);
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i2c_ev_irq_handler(2);
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IRQ_EXIT(I2C2_EV_IRQn);
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}
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void I2C2_ER_IRQHandler(void) {
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IRQ_ENTER(I2C2_ER_IRQn);
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HAL_I2C_ER_IRQHandler(&I2CHandle2);
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i2c_er_irq_handler(2);
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IRQ_EXIT(I2C2_ER_IRQn);
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}
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#endif // defined(MICROPY_HW_I2C2_SCL)
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@ -734,13 +734,13 @@ void I2C2_ER_IRQHandler(void) {
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#if defined(MICROPY_HW_I2C3_SCL)
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void I2C3_EV_IRQHandler(void) {
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IRQ_ENTER(I2C3_EV_IRQn);
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HAL_I2C_EV_IRQHandler(&I2CHandle3);
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i2c_ev_irq_handler(3);
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IRQ_EXIT(I2C3_EV_IRQn);
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}
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void I2C3_ER_IRQHandler(void) {
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IRQ_ENTER(I2C3_ER_IRQn);
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HAL_I2C_ER_IRQHandler(&I2CHandle3);
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i2c_er_irq_handler(3);
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IRQ_EXIT(I2C3_ER_IRQn);
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}
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#endif // defined(MICROPY_HW_I2C3_SCL)
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