2019-06-28 15:36:08 -04:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
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2019-07-24 14:21:27 -04:00
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* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
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2019-06-28 15:36:08 -04:00
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include "supervisor/port.h"
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#include "boards/board.h"
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2020-03-20 15:58:34 -04:00
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#include "lib/timeutils/timeutils.h"
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2019-07-18 17:55:57 -04:00
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2019-09-12 13:47:01 -04:00
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#include "common-hal/microcontroller/Pin.h"
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2020-04-13 12:03:05 -04:00
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#if CIRCUITPY_BUSIO
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2019-09-19 16:02:52 -04:00
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#include "common-hal/busio/I2C.h"
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2019-09-27 17:59:55 -04:00
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#include "common-hal/busio/SPI.h"
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2019-10-04 14:37:18 -04:00
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#include "common-hal/busio/UART.h"
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2020-04-13 12:03:05 -04:00
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#endif
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#if CIRCUITPY_PULSEIO
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2019-10-27 19:17:01 -04:00
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#include "common-hal/pulseio/PWMOut.h"
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2020-02-29 14:44:33 -05:00
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#include "common-hal/pulseio/PulseOut.h"
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2020-03-10 17:16:31 -04:00
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#include "common-hal/pulseio/PulseIn.h"
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2020-03-17 18:26:13 -04:00
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#endif
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2019-07-18 17:55:57 -04:00
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2020-03-17 18:26:13 -04:00
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#include "clocks.h"
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#include "gpio.h"
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2019-07-18 17:55:57 -04:00
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2020-04-20 21:25:13 -04:00
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#include STM32_HAL_H
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2020-04-02 16:15:12 -04:00
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//only enable the Reset Handler overwrite for the H7 for now
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2020-05-11 18:02:40 -04:00
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#if (CPY_STM32H7)
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2020-04-02 16:15:12 -04:00
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// Device memories must be accessed in order.
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#define DEVICE 2
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// Normal memory can have accesses reorder and prefetched.
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#define NORMAL 0
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// Prevents instruction access.
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#define NO_EXECUTION 1
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#define EXECUTION 0
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// Shareable if the memory system manages coherency.
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#define NOT_SHAREABLE 0
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#define SHAREABLE 1
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#define NOT_CACHEABLE 0
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#define CACHEABLE 1
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#define NOT_BUFFERABLE 0
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#define BUFFERABLE 1
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#define NO_SUBREGIONS 0
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extern uint32_t _ld_stack_top;
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extern uint32_t _ld_d1_ram_bss_start;
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extern uint32_t _ld_d1_ram_bss_size;
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extern uint32_t _ld_d1_ram_data_destination;
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extern uint32_t _ld_d1_ram_data_size;
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extern uint32_t _ld_d1_ram_data_flash_copy;
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extern uint32_t _ld_dtcm_bss_start;
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extern uint32_t _ld_dtcm_bss_size;
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extern uint32_t _ld_dtcm_data_destination;
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extern uint32_t _ld_dtcm_data_size;
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extern uint32_t _ld_dtcm_data_flash_copy;
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extern uint32_t _ld_itcm_destination;
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extern uint32_t _ld_itcm_size;
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extern uint32_t _ld_itcm_flash_copy;
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extern void main(void);
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extern void SystemInit(void);
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// This replaces the Reset_Handler in startup_*.S and SystemInit in system_*.c.
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__attribute__((used, naked)) void Reset_Handler(void) {
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__disable_irq();
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__set_MSP((uint32_t) &_ld_stack_top);
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/* Disable MPU */
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ARM_MPU_Disable();
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// Copy all of the itcm code to run from ITCM. Do this while the MPU is disabled because we write
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// protect it.
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for (uint32_t i = 0; i < ((size_t) &_ld_itcm_size) / 4; i++) {
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(&_ld_itcm_destination)[i] = (&_ld_itcm_flash_copy)[i];
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}
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// The first number in RBAR is the region number. When searching for a policy, the region with
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// the highest number wins. If none match, then the default policy set at enable applies.
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2020-04-20 21:25:13 -04:00
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// Mark all the flash the same until instructed otherwise.
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2020-04-02 16:15:12 -04:00
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MPU->RBAR = ARM_MPU_RBAR(11, 0x08000000U);
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MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_2MB);
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// This the ITCM. Set it to read-only because we've loaded everything already and it's easy to
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// accidentally write the wrong value to 0x00000000 (aka NULL).
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MPU->RBAR = ARM_MPU_RBAR(12, 0x00000000U);
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2020-04-13 12:03:05 -04:00
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MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_RO, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_64KB);
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2020-04-02 16:15:12 -04:00
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// This the DTCM.
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MPU->RBAR = ARM_MPU_RBAR(14, 0x20000000U);
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MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_128KB);
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// This is AXI SRAM (D1).
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MPU->RBAR = ARM_MPU_RBAR(15, 0x24000000U);
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MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_512KB);
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/* Enable MPU */
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ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
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2019-09-12 13:47:01 -04:00
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2020-04-02 16:15:12 -04:00
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// Copy all of the data to run from DTCM.
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for (uint32_t i = 0; i < ((size_t) &_ld_dtcm_data_size) / 4; i++) {
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(&_ld_dtcm_data_destination)[i] = (&_ld_dtcm_data_flash_copy)[i];
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}
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// Clear DTCM bss.
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for (uint32_t i = 0; i < ((size_t) &_ld_dtcm_bss_size) / 4; i++) {
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(&_ld_dtcm_bss_start)[i] = 0;
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}
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2019-07-18 17:55:57 -04:00
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2020-04-02 16:15:12 -04:00
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// Copy all of the data to run from D1 RAM.
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for (uint32_t i = 0; i < ((size_t) &_ld_d1_ram_data_size) / 4; i++) {
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(&_ld_d1_ram_data_destination)[i] = (&_ld_d1_ram_data_flash_copy)[i];
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}
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// Clear D1 RAM bss.
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for (uint32_t i = 0; i < ((size_t) &_ld_d1_ram_bss_size) / 4; i++) {
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(&_ld_d1_ram_bss_start)[i] = 0;
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}
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SystemInit();
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__enable_irq();
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main();
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}
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#endif //end H7 specific code
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2019-07-18 17:55:57 -04:00
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2020-03-20 15:58:34 -04:00
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static RTC_HandleTypeDef _hrtc;
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2020-04-21 17:14:30 -04:00
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#if BOARD_HAS_LOW_SPEED_CRYSTAL
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2020-05-07 14:49:33 -04:00
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static uint32_t rtc_clock_frequency = LSE_VALUE;
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2020-03-23 17:46:25 -04:00
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#else
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2020-05-07 14:49:33 -04:00
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static uint32_t rtc_clock_frequency = LSI_VALUE;
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2020-03-23 17:46:25 -04:00
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#endif
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2019-06-28 15:36:08 -04:00
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safe_mode_t port_init(void) {
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2019-11-12 11:26:14 -05:00
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HAL_Init();
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2019-09-18 16:49:15 -04:00
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__HAL_RCC_SYSCFG_CLK_ENABLE();
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2019-06-28 15:36:08 -04:00
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2020-05-11 18:02:40 -04:00
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#if (CPY_STM32F4)
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2020-03-17 18:26:13 -04:00
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__HAL_RCC_PWR_CLK_ENABLE();
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#endif
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2019-06-28 15:36:08 -04:00
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2020-03-17 18:26:13 -04:00
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stm32_peripherals_clocks_init();
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stm32_peripherals_gpio_init();
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2019-07-11 13:41:10 -04:00
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2020-03-20 15:58:34 -04:00
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HAL_PWR_EnableBkUpAccess();
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2020-05-11 18:02:40 -04:00
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// TODO: move all of this to clocks.c
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2020-04-21 17:14:30 -04:00
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#if BOARD_HAS_LOW_SPEED_CRYSTAL
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2020-05-11 18:02:40 -04:00
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uint32_t tickstart = HAL_GetTick();
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// H7/F7 untested with LSE, so autofail them until above move is done
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2020-05-15 19:22:33 -04:00
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#if (CPY_STM32F4)
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2020-05-07 14:49:33 -04:00
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bool lse_setupsuccess = true;
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2020-05-11 18:02:40 -04:00
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#else
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bool lse_setupsuccess = false;
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#endif
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// Update LSE configuration in Backup Domain control register
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// Requires to enable write access to Backup Domain of necessary
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// TODO: should be using the HAL OSC initializer, otherwise we'll need
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// preprocessor defines for every register to account for F7/H7
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#if (CPY_STM32F4)
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if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
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{
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// Enable write access to Backup domain
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SET_BIT(PWR->CR, PWR_CR_DBP);
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// Wait for Backup domain Write protection disable
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tickstart = HAL_GetTick();
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while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
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{
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if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
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{
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lse_setupsuccess = false;
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}
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}
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}
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#endif
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__HAL_RCC_LSE_CONFIG(RCC_LSE_ON);
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tickstart = HAL_GetTick();
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2020-05-07 14:49:33 -04:00
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while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) {
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2020-05-11 18:02:40 -04:00
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if((HAL_GetTick() - tickstart ) > LSE_STARTUP_TIMEOUT)
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2020-05-07 14:49:33 -04:00
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{
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lse_setupsuccess = false;
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__HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
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__HAL_RCC_LSI_ENABLE();
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rtc_clock_frequency = LSI_VALUE;
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2020-05-11 18:02:40 -04:00
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break;
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2020-05-07 14:49:33 -04:00
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}
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}
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2020-05-11 18:02:40 -04:00
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2020-05-07 14:49:33 -04:00
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if (lse_setupsuccess) {
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__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
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} else {
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__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
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}
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2020-05-11 18:02:40 -04:00
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2020-04-21 17:14:30 -04:00
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#else
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2020-05-11 18:02:40 -04:00
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__HAL_RCC_LSI_ENABLE();
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2020-04-21 17:14:30 -04:00
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__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
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#endif
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2020-05-11 18:02:40 -04:00
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2020-03-20 15:58:34 -04:00
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__HAL_RCC_RTC_ENABLE();
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_hrtc.Instance = RTC;
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_hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
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2020-05-07 14:49:33 -04:00
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// Divide async as little as possible so that we have rtc_clock_frequency count in subseconds.
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2020-03-24 18:49:24 -04:00
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// This ensures our timing > 1 second is correct.
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2020-03-20 15:58:34 -04:00
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_hrtc.Init.AsynchPrediv = 0x0;
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2020-05-07 14:49:33 -04:00
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_hrtc.Init.SynchPrediv = rtc_clock_frequency - 1;
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2020-03-20 15:58:34 -04:00
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_hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
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2020-03-23 17:46:25 -04:00
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HAL_RTC_Init(&_hrtc);
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2019-06-28 15:36:08 -04:00
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2020-04-08 17:41:57 -04:00
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HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn);
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2019-06-28 15:36:08 -04:00
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return NO_SAFE_MODE;
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}
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2020-03-20 15:58:34 -04:00
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void SysTick_Handler(void) {
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// Read the CTRL register to clear the SysTick interrupt.
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SysTick->CTRL;
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HAL_IncTick();
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}
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2019-06-28 15:36:08 -04:00
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void reset_port(void) {
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2019-11-12 11:26:14 -05:00
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reset_all_pins();
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2020-04-13 12:03:05 -04:00
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#if CIRCUITPY_BUSIO
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2019-09-19 16:02:52 -04:00
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i2c_reset();
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2019-09-27 17:59:55 -04:00
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spi_reset();
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2019-10-04 14:37:18 -04:00
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uart_reset();
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2020-04-13 12:03:05 -04:00
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#endif
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#if CIRCUITPY_PULSEIO
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2019-10-27 19:17:01 -04:00
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pwmout_reset();
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2020-02-29 14:44:33 -05:00
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pulseout_reset();
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2020-03-10 17:16:31 -04:00
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pulsein_reset();
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2020-04-13 12:03:05 -04:00
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#endif
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2019-06-28 15:36:08 -04:00
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}
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void reset_to_bootloader(void) {
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}
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void reset_cpu(void) {
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2019-11-12 11:26:14 -05:00
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NVIC_SystemReset();
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2019-06-28 15:36:08 -04:00
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}
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2020-04-02 16:15:12 -04:00
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extern uint32_t _ld_heap_start, _ld_heap_end, _ld_stack_top, _ld_stack_bottom;
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2020-01-18 21:06:56 -05:00
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uint32_t *port_heap_get_bottom(void) {
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2020-04-02 16:15:12 -04:00
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return &_ld_heap_start;
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2020-01-18 21:06:56 -05:00
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}
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uint32_t *port_heap_get_top(void) {
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2020-04-02 16:15:12 -04:00
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return &_ld_heap_end;
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2020-01-18 21:06:56 -05:00
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}
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|
2020-05-15 19:22:33 -04:00
|
|
|
supervisor_allocation* port_fixed_stack(void) {
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2019-10-18 05:00:09 -04:00
|
|
|
uint32_t *port_stack_get_limit(void) {
|
2020-04-20 21:25:13 -04:00
|
|
|
return &_ld_stack_bottom;
|
2019-10-18 05:00:09 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t *port_stack_get_top(void) {
|
2020-04-02 16:15:12 -04:00
|
|
|
return &_ld_stack_top;
|
2019-10-18 05:00:09 -04:00
|
|
|
}
|
|
|
|
|
2019-06-28 15:36:08 -04:00
|
|
|
extern uint32_t _ebss;
|
2020-04-15 10:18:09 -04:00
|
|
|
|
2019-06-28 15:36:08 -04:00
|
|
|
// Place the word to save just after our BSS section that gets blanked.
|
|
|
|
void port_set_saved_word(uint32_t value) {
|
|
|
|
_ebss = value;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t port_get_saved_word(void) {
|
|
|
|
return _ebss;
|
|
|
|
}
|
|
|
|
|
2020-04-02 16:15:12 -04:00
|
|
|
__attribute__((used)) void MemManage_Handler(void)
|
|
|
|
{
|
|
|
|
reset_into_safe_mode(MEM_MANAGE);
|
|
|
|
while (true) {
|
|
|
|
asm("nop;");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
__attribute__((used)) void BusFault_Handler(void)
|
|
|
|
{
|
|
|
|
reset_into_safe_mode(MEM_MANAGE);
|
|
|
|
while (true) {
|
|
|
|
asm("nop;");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
__attribute__((used)) void UsageFault_Handler(void)
|
|
|
|
{
|
|
|
|
reset_into_safe_mode(MEM_MANAGE);
|
|
|
|
while (true) {
|
|
|
|
asm("nop;");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
__attribute__((used)) void HardFault_Handler(void)
|
|
|
|
{
|
2019-11-12 11:26:14 -05:00
|
|
|
reset_into_safe_mode(HARD_CRASH);
|
2019-09-12 13:47:01 -04:00
|
|
|
while (true) {
|
|
|
|
asm("nop;");
|
|
|
|
}
|
2019-08-14 13:14:42 -04:00
|
|
|
}
|
2020-03-20 15:58:34 -04:00
|
|
|
|
|
|
|
// This function is called often for timing so we cache the seconds elapsed computation based on the
|
|
|
|
// register value. The STM HAL always does shifts and conversion if we use it directly.
|
|
|
|
volatile uint32_t seconds_to_date = 0;
|
|
|
|
volatile uint32_t cached_date = 0;
|
|
|
|
volatile uint32_t seconds_to_minute = 0;
|
|
|
|
volatile uint32_t cached_hours_minutes = 0;
|
|
|
|
uint64_t port_get_raw_ticks(uint8_t* subticks) {
|
2020-05-07 14:49:33 -04:00
|
|
|
uint32_t subseconds = rtc_clock_frequency - (uint32_t)(RTC->SSR);
|
2020-03-20 15:58:34 -04:00
|
|
|
uint32_t time = (uint32_t)(RTC->TR & RTC_TR_RESERVED_MASK);
|
|
|
|
uint32_t date = (uint32_t)(RTC->DR & RTC_DR_RESERVED_MASK);
|
|
|
|
if (date != cached_date) {
|
|
|
|
uint32_t year = (uint8_t)((date & (RTC_DR_YT | RTC_DR_YU)) >> 16U);
|
|
|
|
uint8_t month = (uint8_t)((date & (RTC_DR_MT | RTC_DR_MU)) >> 8U);
|
|
|
|
uint8_t day = (uint8_t)(date & (RTC_DR_DT | RTC_DR_DU));
|
|
|
|
// Add 2000 since the year is only the last two digits.
|
|
|
|
year = 2000 + (uint32_t)RTC_Bcd2ToByte(year);
|
|
|
|
month = (uint8_t)RTC_Bcd2ToByte(month);
|
|
|
|
day = (uint8_t)RTC_Bcd2ToByte(day);
|
|
|
|
seconds_to_date = timeutils_seconds_since_2000(year, month, day, 0, 0, 0);
|
|
|
|
cached_date = date;
|
|
|
|
}
|
|
|
|
uint32_t hours_minutes = time & (RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU);
|
|
|
|
if (hours_minutes != cached_hours_minutes) {
|
|
|
|
uint8_t hours = (uint8_t)((time & (RTC_TR_HT | RTC_TR_HU)) >> 16U);
|
|
|
|
uint8_t minutes = (uint8_t)((time & (RTC_TR_MNT | RTC_TR_MNU)) >> 8U);
|
|
|
|
hours = (uint8_t)RTC_Bcd2ToByte(hours);
|
|
|
|
minutes = (uint8_t)RTC_Bcd2ToByte(minutes);
|
|
|
|
seconds_to_minute = 60 * (60 * hours + minutes);
|
|
|
|
}
|
|
|
|
uint8_t seconds = (uint8_t)(time & (RTC_TR_ST | RTC_TR_SU));
|
|
|
|
seconds = (uint8_t)RTC_Bcd2ToByte(seconds);
|
|
|
|
if (subticks != NULL) {
|
|
|
|
*subticks = subseconds % 32;
|
|
|
|
}
|
|
|
|
|
2020-04-22 14:10:51 -04:00
|
|
|
uint64_t raw_ticks = ((uint64_t) 1024) * (seconds_to_date + seconds_to_minute + seconds) + subseconds / 32;
|
|
|
|
return raw_ticks;
|
2020-03-20 15:58:34 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
void RTC_WKUP_IRQHandler(void) {
|
|
|
|
supervisor_tick();
|
|
|
|
__HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&_hrtc, RTC_FLAG_WUTF);
|
|
|
|
__HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG();
|
|
|
|
}
|
2020-04-22 14:10:51 -04:00
|
|
|
|
2020-04-08 17:41:57 -04:00
|
|
|
volatile bool alarmed_already = false;
|
2020-03-20 15:58:34 -04:00
|
|
|
void RTC_Alarm_IRQHandler(void) {
|
|
|
|
HAL_RTC_DeactivateAlarm(&_hrtc, RTC_ALARM_A);
|
2020-04-22 14:10:51 -04:00
|
|
|
__HAL_RTC_ALARM_EXTI_CLEAR_FLAG();
|
|
|
|
__HAL_RTC_ALARM_CLEAR_FLAG(&_hrtc, RTC_FLAG_ALRAF);
|
2020-04-08 17:41:57 -04:00
|
|
|
alarmed_already = true;
|
2020-03-20 15:58:34 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// Enable 1/1024 second tick.
|
|
|
|
void port_enable_tick(void) {
|
2020-05-07 14:49:33 -04:00
|
|
|
HAL_RTCEx_SetWakeUpTimer_IT(&_hrtc, rtc_clock_frequency / 1024 / 2, RTC_WAKEUPCLOCK_RTCCLK_DIV2);
|
2020-03-20 15:58:34 -04:00
|
|
|
HAL_NVIC_SetPriority(RTC_WKUP_IRQn, 1, 0U);
|
|
|
|
HAL_NVIC_EnableIRQ(RTC_WKUP_IRQn);
|
|
|
|
}
|
|
|
|
extern volatile uint32_t autoreload_delay_ms;
|
|
|
|
|
|
|
|
// Disable 1/1024 second tick.
|
|
|
|
void port_disable_tick(void) {
|
|
|
|
HAL_NVIC_DisableIRQ(RTC_WKUP_IRQn);
|
|
|
|
HAL_RTCEx_DeactivateWakeUpTimer(&_hrtc);
|
|
|
|
}
|
|
|
|
|
|
|
|
void port_interrupt_after_ticks(uint32_t ticks) {
|
|
|
|
uint64_t raw_ticks = port_get_raw_ticks(NULL) + ticks;
|
|
|
|
|
|
|
|
RTC_AlarmTypeDef alarm;
|
|
|
|
if (ticks > 1024) {
|
|
|
|
timeutils_struct_time_t tm;
|
|
|
|
timeutils_seconds_since_2000_to_struct_time(raw_ticks / 1024, &tm);
|
|
|
|
alarm.AlarmTime.Hours = tm.tm_hour;
|
|
|
|
alarm.AlarmTime.Minutes = tm.tm_min;
|
|
|
|
alarm.AlarmTime.Seconds = tm.tm_sec;
|
|
|
|
alarm.AlarmDateWeekDay = tm.tm_mday;
|
2020-04-22 14:10:51 -04:00
|
|
|
// Masking here means that the value is ignored so we set none.
|
2020-03-20 15:58:34 -04:00
|
|
|
alarm.AlarmMask = RTC_ALARMMASK_NONE;
|
2020-04-22 14:10:51 -04:00
|
|
|
} else {
|
|
|
|
// Masking here means that the value is ignored so we set them all. Only the subseconds
|
|
|
|
// value matters.
|
|
|
|
alarm.AlarmMask = RTC_ALARMMASK_ALL;
|
2020-03-20 15:58:34 -04:00
|
|
|
}
|
|
|
|
|
2020-05-07 14:49:33 -04:00
|
|
|
alarm.AlarmTime.SubSeconds = rtc_clock_frequency -
|
2020-04-22 14:10:51 -04:00
|
|
|
((raw_ticks % 1024) * 32);
|
2020-03-20 15:58:34 -04:00
|
|
|
alarm.AlarmTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
|
|
|
|
alarm.AlarmTime.StoreOperation = RTC_STOREOPERATION_SET;
|
2020-04-22 14:10:51 -04:00
|
|
|
// Masking here means that the bits are ignored so we set none of them.
|
2020-03-20 15:58:34 -04:00
|
|
|
alarm.AlarmSubSecondMask = RTC_ALARMSUBSECONDMASK_NONE;
|
|
|
|
alarm.AlarmDateWeekDaySel = RTC_ALARMDATEWEEKDAYSEL_DATE;
|
|
|
|
alarm.Alarm = RTC_ALARM_A;
|
|
|
|
|
|
|
|
HAL_RTC_SetAlarm_IT(&_hrtc, &alarm, RTC_FORMAT_BIN);
|
2020-04-08 17:41:57 -04:00
|
|
|
alarmed_already = false;
|
2020-03-20 15:58:34 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
void port_sleep_until_interrupt(void) {
|
|
|
|
// Clear the FPU interrupt because it can prevent us from sleeping.
|
|
|
|
if (__get_FPSCR() & ~(0x9f)) {
|
|
|
|
__set_FPSCR(__get_FPSCR() & ~(0x9f));
|
|
|
|
(void) __get_FPSCR();
|
|
|
|
}
|
2020-04-08 17:41:57 -04:00
|
|
|
if (alarmed_already) {
|
|
|
|
return;
|
|
|
|
}
|
2020-03-20 15:58:34 -04:00
|
|
|
__WFI();
|
|
|
|
}
|
|
|
|
|
2020-04-16 14:53:52 -04:00
|
|
|
// Required by __libc_init_array in startup code if we are compiling using
|
|
|
|
// -nostdlib/-nostartfiles.
|
|
|
|
void _init(void)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|