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circuitpython/ports/stm/boards/STM32F405_default.ld

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/*
Linker file restructure, TCM and MPU additions
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GNU linker script for STM32F405, no filesystem
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*/
/* Specify the memory areas */
MEMORY
{
linker scripts: Re-align at ":" With "git show -b" you can verify that this is a whitespace only change because the diff will be empty.
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
stm: Use FLASH_FIRMWARE instead of FLASH_TEXT in linker scripts for compatibility with the build_memory_info script This change was scripted: git grep -l FLASH_TEXT | xargs sed -i s/FLASH_TEXT/FLASH_FIRMWARE/
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FLASH_FIRMWARE (rx) : ORIGIN = 0x08004000, LENGTH = 1008K /* sectors 0-7*/
linker scripts: Re-align at ":" With "git show -b" you can verify that this is a whitespace only change because the diff will be empty.
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CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
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}
/* produce a link error if there is not this amount of RAM for these sections */
Add recovery domain write access, adjust stack
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_minimum_stack_size = 24K;
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_minimum_heap_size = 16K;
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);