864f671744
In order to be able to support GPIO1 port on nrf52840 the port has been removed from the Pin object. All pins on port1 will now be incrementally on top of the pin numbers for gpio0. Hence, Pin 1.00 will become P32, and Pin 1.15 will become P47. The modification is done to address the new gpio HAL interface in nrfx, which resolves the port to be configured base on a multiple of 32. The patch also affects the existing devices which does not have a second GPIO port in the way that the port indication A and B is removed from Pin generation. This means that the port which was earlier addressed as PA0 is now P0, and PA31 is P31. Also, this patch removes the gpio member which earlier pointed to the perihperal GPIO base address. This is not needed anymore, hence removed.
256 B
256 B
| 1 | P0 | P0 |
|---|---|---|
| 2 | P1 | P1 |
| 3 | P2 | P2 |
| 4 | P3 | P3 |
| 5 | P4 | P4 |
| 6 | P5 | P5 |
| 7 | P6 | P6 |
| 8 | P7 | P7 |
| 9 | UART_RTS | P8 |
| 10 | UART_TX | P9 |
| 11 | UART_CTS | P10 |
| 12 | UART_RX | P11 |
| 13 | P12 | P12 |
| 14 | P13 | P13 |
| 15 | P14 | P14 |
| 16 | P15 | P15 |
| 17 | P16 | P16 |
| 18 | P17 | P17 |
| 19 | P18 | P18 |
| 20 | P19 | P19 |
| 21 | P20 | P20 |
| 22 | P21 | P21 |
| 23 | P22 | P22 |
| 24 | P23 | P23 |
| 25 | P24 | P24 |
| 26 | P25 | P25 |
| 27 | P26 | P26 |
| 28 | P27 | P27 |
| 29 | P28 | P28 |
| 30 | P29 | P29 |
| 31 | P30 | P30 |
| 32 | P31 | P31 |