7d8dac9211
Introduces a way to place CircuitPython code and data into tightly coupled memory (TCM) which is accessible by the CPU in a single cycle. It also frees up room in the corresponding cache for intermittent data. Loading from external flash is slow! The data cache is also now enabled. Adds support for the iMX RT 1021 chip. Adds three new boards: * iMX RT 1020 EVK * iMX RT 1060 EVK * Teensy 4.0 Related to #2492, #2472 and #2477. Fixes #2475.
258 lines
9.5 KiB
C
258 lines
9.5 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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* Copyright (c) 2019 Artur Pacholec
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "supervisor/flash.h"
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#include <stdint.h>
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#include <string.h>
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#include <stdio.h>
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#include "extmod/vfs.h"
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#include "extmod/vfs_fat.h"
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#include "py/mphal.h"
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#include "py/obj.h"
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#include "py/runtime.h"
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#include "lib/oofatfs/ff.h"
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#include "fsl_cache.h"
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#include "fsl_flexspi.h"
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#include "fsl_iomuxc.h"
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// defined in linker
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extern uint32_t __fatfs_flash_start_addr[];
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extern uint32_t __fatfs_flash_length[];
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#define NO_CACHE 0xffffffff
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#define SECTOR_SIZE 0x1000 /* 4K */
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uint8_t _flash_cache[SECTOR_SIZE] __attribute__((aligned(4)));
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uint32_t _flash_page_addr = NO_CACHE;
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static bool init_done = false;
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flexspi_device_config_t deviceconfig = {
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.flexspiRootClk = 133000000,
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.flashSize = (BOARD_FLASH_SIZE / 1024),
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.CSIntervalUnit = kFLEXSPI_CsIntervalUnit1SckCycle,
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.CSInterval = 2,
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.CSHoldTime = 3,
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.CSSetupTime = 3,
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.dataValidTime = 0,
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.columnspace = 0,
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.enableWordAddress = 0,
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.AWRSeqIndex = 0,
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.AWRSeqNumber = 0,
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.ARDSeqIndex = NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD,
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.ARDSeqNumber = 1,
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.AHBWriteWaitUnit = kFLEXSPI_AhbWriteWaitUnit2AhbCycle,
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.AHBWriteWaitInterval = 0,
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};
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const uint32_t customLUT[CUSTOM_LUT_LENGTH] = {
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/* Normal read mode -SDR */
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/* Normal read mode -SDR */
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[4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x03, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
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[4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL + 1] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),
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/* Fast read mode - SDR */
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[4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x0B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
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[4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST + 1] = FLEXSPI_LUT_SEQ(
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kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_1PAD, 0x08, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),
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/* Fast read quad mode - SDR */
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[4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xEB, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 0x18),
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[4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD + 1] = FLEXSPI_LUT_SEQ(
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kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 0x06, kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04),
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/* Read extend parameters */
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[4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x81, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),
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/* Write Enable */
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[4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x06, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),
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/* Erase Sector */
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[4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x20, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
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/* Page Program - single mode */
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[4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x02, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
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[4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE + 1] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),
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/* Page Program - quad mode */
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[4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x32, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
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[4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD + 1] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_4PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),
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/* Read ID */
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[4 * NOR_CMD_LUT_SEQ_IDX_READID] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x9F, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),
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/* Enable Quad mode */
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[4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x31, kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04),
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/* Read status register */
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[4 * NOR_CMD_LUT_SEQ_IDX_READSTATUSREG] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x05, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),
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/* Erase whole chip */
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[4 * NOR_CMD_LUT_SEQ_IDX_ERASECHIP] =
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FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xC7, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),
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};
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extern status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address);
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extern status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src);
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extern status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId);
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extern status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base);
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extern status_t flexspi_nor_erase_chip(FLEXSPI_Type *base);
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extern void flexspi_nor_flash_init(FLEXSPI_Type *base);
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void supervisor_flash_init(void) {
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if (init_done)
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return;
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SCB_DisableDCache();
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status_t status;
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uint8_t vendorID = 0;
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flexspi_nor_flash_init(FLEXSPI);
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/* Get vendor ID. */
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status = flexspi_nor_get_vendor_id(FLEXSPI, &vendorID);
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if (status != kStatus_Success) {
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printf("flexspi_nor_get_vendor_id fail %ld\r\n", status);
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return;
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}
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/* Enter quad mode. */
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__disable_irq();
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status = flexspi_nor_enable_quad_mode(FLEXSPI);
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if (status != kStatus_Success)
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{
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printf("flexspi_nor_enable_quad_mode fail %ld\r\n", status);
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return;
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}
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__enable_irq();
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SCB_EnableDCache();
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init_done = true;
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}
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static inline uint32_t lba2addr(uint32_t block) {
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return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR + block * FILESYSTEM_BLOCK_SIZE;
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}
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uint32_t supervisor_flash_get_block_size(void) {
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return FILESYSTEM_BLOCK_SIZE;
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}
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uint32_t supervisor_flash_get_block_count(void) {
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return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE;
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}
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void supervisor_flash_flush(void) {
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if (_flash_page_addr == NO_CACHE) return;
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status_t status;
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// Skip if data is the same
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if (memcmp(_flash_cache, (void *)_flash_page_addr, SECTOR_SIZE) != 0) {
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volatile uint32_t sector_addr = (_flash_page_addr - FlexSPI_AMBA_BASE);
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__disable_irq();
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status = flexspi_nor_flash_erase_sector(FLEXSPI, sector_addr);
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__enable_irq();
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if (status != kStatus_Success) {
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printf("Page erase failure %ld!\r\n", status);
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return;
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}
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for (int i = 0; i < SECTOR_SIZE / FLASH_PAGE_SIZE; ++i) {
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__disable_irq();
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status = flexspi_nor_flash_page_program(FLEXSPI, sector_addr + i * FLASH_PAGE_SIZE, (void *)_flash_cache + i * FLASH_PAGE_SIZE);
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__enable_irq();
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if (status != kStatus_Success) {
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printf("Page program failure %ld!\r\n", status);
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return;
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}
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}
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DCACHE_CleanInvalidateByRange(_flash_page_addr, SECTOR_SIZE);
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}
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}
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mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) {
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// Must write out anything in cache before trying to read.
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supervisor_flash_flush();
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uint32_t src = lba2addr(block);
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memcpy(dest, (uint8_t*)src, FILESYSTEM_BLOCK_SIZE * num_blocks);
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return 0; // success
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}
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mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32_t num_blocks) {
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while (num_blocks) {
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uint32_t const addr = lba2addr(lba);
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uint32_t const page_addr = addr & ~(SECTOR_SIZE - 1);
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uint32_t count = 8 - (lba % 8); // up to page boundary
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count = MIN(num_blocks, count);
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if (page_addr != _flash_page_addr) {
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// Write out anything in cache before overwriting it.
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supervisor_flash_flush();
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_flash_page_addr = page_addr;
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// Copy the current contents of the entire page into the cache.
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memcpy(_flash_cache, (void *)page_addr, SECTOR_SIZE);
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}
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// Overwrite part or all of the page cache with the src data.
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memcpy(_flash_cache + (addr & (SECTOR_SIZE - 1)), src, count * FILESYSTEM_BLOCK_SIZE);
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// adjust for next run
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lba += count;
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src += count * FILESYSTEM_BLOCK_SIZE;
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num_blocks -= count;
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}
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return 0; // success
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}
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void supervisor_flash_release_cache(void) {
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}
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