circuitpython/ports/stm32/boards/stm32l072_af.csv

4.3 KiB

1PortPinAF0AF1AF2AF3AF4AF5AF6AF7
2SPI1/SPI2/I2S2/USART1/2/LPUART1/USB/LPTIM1/TSC/TIM2/21/22/EVENTOUT/SYS_AFSPI1/SPI2/I2S2/I2C1/TIM2/21SPI1/SPI2/I2S2/LPUART1/USART5/USB/LPTIM1/TIM2/3/EVENTOUT/SYS_AFI2C1/TSC/EVENTOUTI2C1/USART1/2/LPUART1/TIM3/22/EVENTOUTSPI2/I2S2/I2C2/USART1/TIM2/21/22I2C1/2/LPUART1/USART4/UASRT5/TIM21/EVENTOUTI2C3/LPUART1/COMP1/2/TIM3ADC
3PortAPA0TIM2_CH1TSC_G1_IO1USART2_CTSTIM2_ETRUSART4_TXCOMP1_OUTADC_IN0
4PortAPA1EVENTOUTTIM2_CH2TSC_G1_IO2USART2_RTS_DETIM21_ETRUSART4_RXADC_IN1
5PortAPA2TIM21_CH1TIM2_CH3TSC_G1_IO3USART2_TXLPUART1_TXCOMP2_OUTADC_IN2
6PortAPA3TIM21_CH2TIM2_CH4TSC_G1_IO4USART2_RXLPUART1_RXADC_IN3
7PortAPA4SPI1_NSSTSC_G2_IO1USART2_CKTIM22_ETRADC_IN4
8PortAPA5SPI1_SCKTIM2_ETRTSC_G2_IO2TIM2_CH1ADC_IN5
9PortAPA6SPI1_MISOTIM3_CH1TSC_G2_IO3LPUART1_CTSTIM22_CH1EVENTOUTCOMP1_OUTADC_IN6
10PortAPA7SPI1_MOSITIM3_CH2TSC_G2_IO4TIM22_CH2EVENTOUTCOMP2_OUTADC_IN7
11PortAPA8MCOUSB_CRS_SYNCEVENTOUTUSART1_CKI2C3_SCL
12PortAPA9MCOTSC_G4_IO1USART1_TXI2C1_SCLI2C3_SMBA
13PortAPA10TSC_G4_IO2USART1_RXI2C1_SDA
14PortAPA11SPI1_MISOEVENTOUTTSC_G4_IO3USART1_CTSCOMP1_OUT
15PortAPA12SPI1_MOSIEVENTOUTTSC_G4_IO4USART1_RTS_DECOMP2_OUT
16PortAPA13SWDIOUSB_NOELPUART1_RX
17PortAPA14SWCLKUSART2_TXLPUART1_TX
18PortAPA15SPI1_NSSTIM2_ETREVENTOUTUSART2_RXTIM2_CH1USART4_RTS_DE
19PortBPB0EVENTOUTTIM3_CH3TSC_G3_IO2ADC_IN8
20PortBPB1TIM3_CH4TSC_G3_IO3LPUART1_RTS_DEADC_IN9
21PortBPB2LPTIM1_OUTTSC_G3_IO4I2C3_SMBA
22PortBPB3SPI1_SCKTIM2_CH2TSC_G5_IO1EVENTOUTUSART1_RTS_DEUSART5_TX
23PortBPB4SPI1_MISOTIM3_CH1TSC_G5_IO2TIM22_CH1USART1_CTSUSART5_RXI2C3_SDA
24PortBPB5SPI1_MOSILPTIM1_IN1I2C1_SMBATIM3_CH2/TIM22_CH2USART1_CKUSART5_CK/USART5_RTS_DE
25PortBPB6USART1_TXI2C1_SCLLPTIM1_ETRTSC_G5_IO3
26PortBPB7USART1_RXI2C1_SDALPTIM1_IN2TSC_G5_IO4USART4_CTS
27PortBPB8TSC_SYNCI2C1_SCL
28PortBPB9EVENTOUTI2C1_SDASPI2_NSS/I2S2_WS
29PortBPB10TIM2_CH3TSC_SYNCLPUART1_TXSPI2_SCKI2C2_SCLLPUART1_RX
30PortBPB11EVENTOUTTIM2_CH4TSC_G6_IO1LPUART1_RXI2C2_SDALPUART1_TX
31PortBPB12SPI2_NSS/I2S2_WSLPUART1_RTS_DETSC_G6_IO2I2C2_SMBAEVENTOUT
32PortBPB13SPI2_SCK/I2S2_CKMCOTSC_G6_IO3LPUART1_CTSI2C2_SCLTIM21_CH1
33PortBPB14SPI2_MISO/I2S2_MCKRTC_OUTTSC_G6_IO4LPUART1_RTS_DEI2C2_SDATIM21_CH2
34PortBPB15SPI2_MOSI/I2S2_SDRTC_REFIN
35PortCPC0LPTIM1_IN1EVENTOUTTSC_G7_IO1LPUART1_RXI2C3_SCLADC_IN10
36PortCPC1LPTIM1_OUTEVENTOUTTSC_G7_IO2LPUART1_TXI2C3_SDAADC_IN11
37PortCPC2LPTIM1_IN2SPI2_MISO/I2S2_MCKTSC_G7_IO3ADC_IN12
38PortCPC3LPTIM1_ETRSPI2_MOSI/I2S2_SDTSC_G7_IO4ADC_IN13
39PortCPC4EVENTOUTLPUART1_TXADC_IN14
40PortCPC5LPUART1_RXTSC_G3_IO1ADC_IN15
41PortCPC6TIM22_CH1TIM3_CH1TSC_G8_IO1
42PortCPC7TIM22_CH2TIM3_CH2TSC_G8_IO2
43PortCPC8TIM22_ETRTIM3_CH3TSC_G8_IO3
44PortCPC9TIM21_ETRUSB_NOE/TIM3_CH4TSC_G8_IO4I2C3_SDA
45PortCPC10LPUART1_TXUSART4_TX
46PortCPC11LPUART1_RXUSART4_RX
47PortCPC12USART5_TXUSART4_CK
48PortCPC13
49PortCPC14
50PortCPC15
51PortDPD0TIM21_CH1SPI2_NSS/I2S2_WS
52PortDPD1SPI2_SCK/I2S2_CK
53PortDPD2LPUART1_RTS_DETIM3_ETRUSART5_RX
54PortDPD3USART2_CTSSPI2_MISO/I2S2_MCK
55PortDPD4USART2_RTS_DESPI2_MOSI/I2S2_SD
56PortDPD5USART2_TX
57PortDPD6USART2_RX
58PortDPD7USART2_CKTIM21_CH2
59PortDPD8LPUART1_TX
60PortDPD9LPUART1_RX
61PortDPD10
62PortDPD11LPUART1_CTS
63PortDPD12LPUART1_RTS_DE
64PortDPD13
65PortDPD14
66PortDPD15USB_CRS_SYNC
67PortEPE0EVENTOUT
68PortEPE1EVENTOUT
69PortEPE2TIM3_ETR
70PortEPE3TIM22_CH1TIM3_CH1
71PortEPE4TIM22_CH2TIM3_CH2
72PortEPE5TIM21_CH1TIM3_CH3
73PortEPE6TIM21_CH2TIM3_CH4
74PortEPE7USART5_CK/USART5_RTS_DE
75PortEPE8USART4_TX
76PortEPE9TIM2_CH1TIM2_ETRUSART4_RX
77PortEPE10TIM2_CH2USART5_TX
78PortEPE11TIM2_CH3USART5_RX
79PortEPE12TIM2_CH4SPI1_NSS
80PortEPE13SPI1_SCK
81PortEPE14SPI1_MISO
82PortEPE15SPI1_MOSI
83PortHPH0USB_CRS_SYNC
84PortHPH1