circuitpython/ports/stm32/boards/stm32wl55_af.csv

1	Port		AF0	AF1	AF2	AF3	AF4	AF5	AF6	AF7	AF8	AF9	AF10	AF11	AF12	AF13	AF14	AF15
2			SYS_AF	TIM1/TIM2/LPTIM1	TIM1/TIM2	SPI2S2/TIM1/LPTIM3	I2C1/I2C2/I2C3	SPI1/SPI2S2	RF	USART1/USART2	LPUART1				COMP1/COMP2/TIM1	DEBUG	TIM2/TIM16/TIM17/LPTIM2	EVENOUT	ADC
3	PortA	PA0		TIM2_CH1			I2C3_SMBA	I2S_CKIN		USART2_CTS					COMP1_OUT	DEBUG_PWR_REGLP1S	TIM2_ETR	EVENTOUT	ADC123_IN0
4	PortA	PA1		TIM2_CH2		LPTIM3_OUT	I2C1_SMBA	SPI1_SCK		USART2_RTS	LPUART1_RTS					DEBUG_PWR_REGLP2S		EVENTOUT	ADC123_IN1
5	PortA	PA2	LSCO	TIM2_CH3						USART2_TX	LPUART1_TX				COMP2_OUT	DEBUG_PWR_LDORDY		EVENTOUT	ADC123_IN2
6	PortA	PA3		TIM2_CH4				I2S2_MCK		USART2_RX	LPUART1_RX							EVENTOUT	ADC123_IN3
7	PortA	PA4	RTC_OUT2	LPTIM1_OUT				SPI1_NSS		USART2_CK						DEBUG_SUBGHZSPI_NSSOUT	LPTIM2_OUT	EVENTOUT	ADC12_IN4
8	PortA	PA5		TIM2_CH1	TIM2_ETR	SPI2_MISO		SPI1_SCK								DEBUG_SUBGHZSPI_SCKOUT	LPTIM2_ETR	EVENTOUT	ADC12_IN5
9	PortA	PA6		TIM1_BKIN			I2C2_SMBA	SPI1_MISO			LPUART1_CTS				TIM1_BKIN	DEBUG_SUBGHZSPI_MISOOUT	TIM16_CH1	EVENTOUT	ADC12_IN6
10	PortA	PA7		TIM1_CH1N			I2C3_SCL	SPI1_MOSI							COMP2_OUT	DEBUG_SUBGHZSPI_MOSIOUT	TIM17_CH1	EVENTOUT	ADC12_IN7
11	PortA	PA8	MCO	TIM1_CH1				SPI2_SCK/I2S2_CK		USART1_CK							LPTIM2_OUT	EVENTOUT
12	PortA	PA9		TIM1_CH2		SPI2_NSS/I2S2_WS	I2C1_SCL	SPI2_SCK/I2S2_CK		USART1_TX								EVENTOUT
13	PortA	PA10	RTC_REFIN	TIM1_CH3			I2C1_SDA	SPI2_MOSI/I2S2_SD		USART1_RX						DEBUG_RF_HSE32RDY	TIM17_BKIN	EVENTOUT
14	PortA	PA11		TIM1_CH4	TIM1_BKIN2	LPTIM3_ETR	I2C2_SDA	SPI1_MISO		USART1_CTS					TIM1_BKIN2	DEBUG_RF_NRESET		EVENTOUT
15	PortA	PA12		TIM1_ETR		LPTIM3_IN1	I2C2_SCL	SPI1_MOSI	RF_BUSY	USART1_RTS								EVENTOUT
16	PortA	PA13	JTMS/SWDIO				I2C2_SMBA				IR_OUT							EVENTOUT
17	PortA	PA14	JTCK/SWCLK	LPTIM1_OUT			I2C1_SMBA											EVENTOUT
18	PortA	PA15	JTDI	TIM2_CH1	TIM2_ETR		I2C2_SDA	SPI1_NSS										EVENTOUT
19	PortB	PB0													COMP1_OUT			EVENTOUT	ADC12_IN8
20	PortB	PB1									LPUART1_RTS_DE						LPTIM2_IN1	EVENTOUT	ADC12_IN9
21	PortB	PB2		LPTIM1_OUT			I2C3_SMBA	SPI1_NSS								DEBUG_RF_SMPSRDY		EVENTOUT
22	PortB	PB3	JTDO/TRACESWO	TIM2_CH2				SPI1_SCK	RF_IRQ0	USART1_RTS						DEBUG_RF_DTB1		EVENTOUT
23	PortB	PB4	NJTRST				I2C3_SDA	SPI1_MISO		USART1_CTS						DEBUG_RF_LDORDY	TIM17_BKIN	EVENTOUT
24	PortB	PB5		LPTIM1_IN1			I2C1_SMBA	SPI1_MOSI	RF_IRQ1	USART1_CK					COMP2_OUT		TIM16_BKIN	EVENTOUT
25	PortB	PB6		LPTIM1_ETR			I2C1_SCL			USART1_TX							TIM16_CH1N	EVENTOUT
26	PortB	PB7		LPTIM1_IN2		TIM1_BKIN	I2C1_SDA			USART1_RX							TIM17_CH1N	EVENTOUT
27	PortB	PB8		TIM1_CH2N			I2C1_SCL		RF_IRQ2								TIM16_CH1	EVENTOUT
28	PortB	PB9		TIM1_CH3N			I2C1_SDA	SPI2_NSS/I2S2_WS			IR_OUT						TIM17_CH1	EVENTOUT
29	PortB	PB10		TIM2_CH3			I2C3_SCL	SPI2_SCK/I2S2_CK			LPUART1_RX				COMP1_OUT			EVENTOUT
30	PortB	PB11		TIM2_CH4			I2C3_SDA				LPUART1_TX				COMP2_OUT			EVENTOUT
31	PortB	PB12		TIM1_BKIN		TIM1_BKIN	I2C3_SMBA	SPI2_NSS/I2S2_WS			LPUART1_RTS							EVENTOUT
32	PortB	PB13		TIM1_CH1N			I2C3_SCL	SPI2_SCK/I2S2_CK			LPUART1_CTS							EVENTOUT
33	PortB	PB14		TIM1_CH2N		I2S2_MCK	I2C3_SDA	SPI2_MISO										EVENTOUT
34	PortB	PB15		TIM1_CH3N			I2C2_SCL	SPI2_MOSI/I2S2_SD										EVENTOUT
35	PortC	PC0		LPTIM1_IN1			I2C3_SCL				LPUART1_RX						LPTIM2_IN1	EVENTOUT	ADC123_IN10
36	PortC	PC1		LPTIM1_OUT		SPI2_MOSI/I2S2_SD	I2C3_SDA				LPUART1_TX							EVENTOUT	ADC123_IN11
37	PortC	PC2		LPTIM1_IN2				SPI2_MISO										EVENTOUT	ADC123_IN12
38	PortC	PC3		LPTIM1_ETR				SPI2_MOSI/I2S2_SD									LPTIM2_ETR	EVENTOUT	ADC123_IN13
39	PortC	PC4																EVENTOUT	ADC12_IN14
40	PortC	PC5																EVENTOUT	ADC12_IN15
41	PortC	PC6						I2S2_MCK										EVENTOUT
42	PortC	PC13																EVENTOUT
43	PortC	PC14																EVENTOUT
44	PortC	PC15																EVENTOUT
45	PortH	PH3																EVENTOUT