circuitpython/rp2_af.csv at 4bbe879c2668e5fd81f266a0779387337858cbf9

iabdalkader c214c9e648 rp2/machine_pin: Add support for named pins and alternate functions.

This commit adds support for generating named pin mappings for all pins
including CPU, board-defined, LED and externally controlled pins.  CPU pins
are mapped to `pin_GPIO<n>`, externally-controlled pins are mapped to
`pin_EXT_GPIO<n>`, and defined conditionally (up to 10 pins, and can be
expanded in the future), and they are non-const to allow `machine-pin.c` to
write the pin object fields.  Both CPU and externally controlled pins are
generated even if there's no board CSV file; if one exists it will just be
added to board pins.

2023-01-16 11:44:26 +11:00

2.1 KiB

Raw Blame History

1	Pin	AF1	AF2	AF3	AF4	AF5	AF6	AF7	AF8	AF9
2	GPIO0	SPI0_RX	UART0_TX	I2C0_SDA	PWM0_A	SIO	PIO0	PIO1		USB_OVCUR_DET
3	GPIO1	SPI0_CS	UART0_RX	I2C0_SCL	PWM0_B	SIO	PIO0	PIO1		USB_VBUS_DET
4	GPIO2	SPI0_SCK	UART0_CTS	I2C1_SDA	PWM1_A	SIO	PIO0	PIO1		USB_VBUS_EN
5	GPIO3	SPI0_TX	UART0_RTS	I2C1_SCL	PWM1_B	SIO	PIO0	PIO1		USB_OVCUR_DET
6	GPIO4	SPI0_RX	UART1_TX	I2C0_SDA	PWM2_A	SIO	PIO0	PIO1		USB_VBUS_DET
7	GPIO5	SPI0_CS	UART1_RX	I2C0_SCL	PWM2_B	SIO	PIO0	PIO1		USB_VBUS_EN
8	GPIO6	SPI0_SCK	UART1_CTS	I2C1_SDA	PWM3_A	SIO	PIO0	PIO1		USB_OVCUR_DET
9	GPIO7	SPI0_TX	UART1_RTS	I2C1_SCL	PWM3_B	SIO	PIO0	PIO1		USB_VBUS_DET
10	GPIO8	SPI1_RX	UART1_TX	I2C0_SDA	PWM4_A	SIO	PIO0	PIO1		USB_VBUS_EN
11	GPIO9	SPI1_CS	UART1_RX	I2C0_SCL	PWM4_B	SIO	PIO0	PIO1		USB_OVCUR_DET
12	GPIO10	SPI1_SCK	UART1_CTS	I2C1_SDA	PWM5_A	SIO	PIO0	PIO1		USB_VBUS_DET
13	GPIO11	SPI1_TX	UART1_RTS	I2C1_SCL	PWM5_B	SIO	PIO0	PIO1		USB_VBUS_EN
14	GPIO12	SPI1_RX	UART0_TX	I2C0_SDA	PWM6_A	SIO	PIO0	PIO1		USB_OVCUR_DET
15	GPIO13	SPI1_CS	UART0_RX	I2C0_SCL	PWM6_B	SIO	PIO0	PIO1		USB_VBUS_DET
16	GPIO14	SPI1_SCK	UART0_CTS	I2C1_SDA	PWM7_A	SIO	PIO0	PIO1		USB_VBUS_EN
17	GPIO15	SPI1_TX	UART0_RTS	I2C1_SCL	PWM7_B	SIO	PIO0	PIO1		USB_OVCUR_DET
18	GPIO16	SPI0_RX	UART0_TX	I2C0_SDA	PWM0_A	SIO	PIO0	PIO1		USB_VBUS_DET
19	GPIO17	SPI0_CS	UART0_RX	I2C0_SCL	PWM0_B	SIO	PIO0	PIO1		USB_VBUS_EN
20	GPIO18	SPI0_SCK	UART0_CTS	I2C1_SDA	PWM1_A	SIO	PIO0	PIO1		USB_OVCUR_DET
21	GPIO19	SPI0_TX	UART0_RTS	I2C1_SCL	PWM1_B	SIO	PIO0	PIO1		USB_VBUS_DET
22	GPIO20	SPI0_RX	UART1_TX	I2C0_SDA	PWM2_A	SIO	PIO0	PIO1	GPCK_GPIN0	USB_VBUS_EN
23	GPIO21	SPI0_CS	UART1_RX	I2C0_SCL	PWM2_B	SIO	PIO0	PIO1	GPCK_GPOUT0	USB_OVCUR_DET
24	GPIO22	SPI0_SCK	UART1_CTS	I2C1_SDA	PWM3_A	SIO	PIO0	PIO1	GPCK_GPIN1	USB_VBUS_DET
25	GPIO23	SPI0_TX	UART1_RTS	I2C1_SCL	PWM3_B	SIO	PIO0	PIO1	GPCK_GPOUT1	USB_VBUS_EN
26	GPIO24	SPI1_RX	UART1_TX	I2C0_SDA	PWM4_A	SIO	PIO0	PIO1	GPCK_GPOUT2	USB_OVCUR_DET
27	GPIO25	SPI1_CS	UART1_RX	I2C0_SCL	PWM4_B	SIO	PIO0	PIO1	GPCK_GPOUT3	USB_VBUS_DET
28	GPIO26	SPI1_SCK	UART1_CTS	I2C1_SDA	PWM5_A	SIO	PIO0	PIO1		USB_VBUS_EN
29	GPIO27	SPI1_TX	UART1_RTS	I2C1_SCL	PWM5_B	SIO	PIO0	PIO1		USB_OVCUR_DET
30	GPIO28	SPI1_RX	UART0_TX	I2C0_SDA	PWM6_A	SIO	PIO0	PIO1		USB_VBUS_DET
31	GPIO29	SPI1_CS	UART0_RX	I2C0_SCL	PWM6_B	SIO	PIO0	PIO1		USB_VBUS_EN

2.1 KiB Raw Blame History

2.1 KiB

Raw Blame History