circuitpython/ports/stm32/boards/stm32h573_af.csv

1	Port		AF0	AF1	AF2	AF3	AF4	AF5	AF6	AF7	AF8	AF9	AF10	AF11	AF12	AF13	AF14	AF15
2			SYS	LPTIM1/TIM1/2/16/17	LPTIM3/PDM_SAI1/TIM3/4/5/12/15	I3C1/LPTIM2/3/LPUART1/OCTOSPI/TIM1/8	CEC/DCMI/I2C1/2/3/4/LPTIM1/2/SPI1/I2S1/TIM15/USART1	CEC/I3C1/LPTIM1/SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5/6	I2C4/OCTOSPI/SAI1/SPI3/I2S3/SPI4/UART4/12/USART10/USB_PD	SDMMC1/SPI2/I2S2/SPI3/I2S3/SPI6/UART7/8/12/USART1/2/3/6/10/11	LPUART1/SAI2/SDMMC1/SPI6/UART4/5/8	FDCAN1/2/FMC[NAND16]/FMC[NORmux]/FMC[NOR_RAM]/OCTOSPI/SDMMC2/TIM13/14	CRS/FMC[NAND16]/OCTOSPI/SAI2/SDMMC2/TIM8/USB_	ETH[MII/RMII]/FMC[NAND16]/OCTOSPI/SDMMC2/UART7/9/USB_PD	FMC[NAND16]/FMC[NORmux]/FMC[NOR_RAM]/FMC[SDRAM_16bit]/SDMMC1	DCMI/FMC[NAND16]/FMC[NORmux]/FMC[NOR_RAM]/LPTIM5	LPTIM3/4/5/6/TIM2/UART5	SYS	ADC
3	PortA	PA0		TIM2_CH1	TIM5_CH1	TIM8_ETR	TIM15_BKIN	SPI6_NSS	SPI3_RDY	USART2_CTS/USART2_NSS	UART4_TX	SDMMC2_CMD	SAI2_SD_B	ETH_MII_CRS			TIM2_ETR	EVENTOUT	ADC12_INP0/ADC12_INN1
4	PortA	PA1		TIM2_CH2	TIM5_CH2		TIM15_CH1N	LPTIM1_IN1	OCTOSPI1_DQS	USART2_RTS	UART4_RX	OCTOSPI1_IO3	SAI2_MCLK_B	ETH_MII_RX_CLK/ETH_RMII_REF_CLK				EVENTOUT	ADC12_INP1
5	PortA	PA2		TIM2_CH3	TIM5_CH3		TIM15_CH1	LPTIM1_IN2		USART2_TX	SAI2_SCK_B			ETH_MDIO				EVENTOUT	ADC12_INP14
6	PortA	PA3		TIM2_CH4	TIM5_CH4	OCTOSPI1_CLK	TIM15_CH2	SPI2_NSS/I2S2_WS	SAI1_SD_B	USART2_RX				ETH_MII_COL				EVENTOUT	ADC12_INP15
7	PortA	PA4			TIM5_ETR	LPTIM2_CH1		SPI1_NSS/I2S1_WS	SPI3_NSS/I2S3_WS	USART2_CK	SPI6_NSS					DCMI_HSYNC/PSSI_DE		EVENTOUT	ADC12_INP18
8	PortA	PA5		TIM2_CH1		TIM8_CH1N		SPI1_SCK/I2S1_CK			SPI6_SCK			ETH_MII_TX_EN/ETH_RMII_TX_EN		PSSI_D14	TIM2_ETR	EVENTOUT	ADC12_INP19/ADC12_INN18
9	PortA	PA6		TIM1_BKIN	TIM3_CH1	TIM8_BKIN		SPI1_MISO/I2S1_SDI	OCTOSPI1_IO3	USART11_TX	SPI6_MISO	TIM13_CH1				DCMI_PIXCLK/PSSI_PDCK		EVENTOUT	ADC12_INP3
10	PortA	PA7		TIM1_CH1N	TIM3_CH2	TIM8_CH1N		SPI1_MOSI/I2S1_SDO		USART11_RX	SPI6_MOSI	TIM14_CH1	OCTOSPI1_IO2	ETH_MII_RX_DV/ETH_RMII_CRS_DV	FMC_SDNWE	FMC_NWE		EVENTOUT	ADC12_INP7/ADC12_INN3
11	PortA	PA8	MCO1	TIM1_CH1		TIM8_BKIN2	I2C3_SCL	SPI1_RDY		USART1_CK			USB_SOF	UART7_RX	FMC_NOE	DCMI_D3/PSSI_D3		EVENTOUT
12	PortA	PA9		TIM1_CH2		LPUART1_TX	I2C3_SMBA	SPI2_SCK/I2S2_CK		USART1_TX				ETH_MII_TX_ER	FMC_NWE	DCMI_D0/PSSI_D0		EVENTOUT
13	PortA	PA10		TIM1_CH3		LPUART1_RX	LPTIM2_IN2		UCPD1_FRSTX	USART1_RX		FDCAN2_TX			SDMMC1_D0	DCMI_D1/PSSI_D1		EVENTOUT
14	PortA	PA11		TIM1_CH4		LPUART1_CTS		SPI2_NSS/I2S2_WS	UART4_RX	USART1_CTS/USART1_NSS		FDCAN1_RX	USB_DM					EVENTOUT
15	PortA	PA12		TIM1_ETR		LPUART1_RTS		SPI2_SCK/I2S2_CK	UART4_TX	USART1_RTS	SAI2_FS_B	FDCAN1_TX	USB_DP					EVENTOUT
16	PortA	PA13	JTMS/SWDIO															EVENTOUT
17	PortA	PA14	JTCK/SWCLK															EVENTOUT
18	PortA	PA15	JTDI	TIM2_CH1	LPTIM3_IN2		HDMI_CEC	SPI1_NSS/I2S1_WS	SPI3_NSS/I2S3_WS	SPI6_NSS	UART4_RTS			UART7_TX	FMC_NBL1	DCMI_D11/PSSI_D11	TIM2_ETR	EVENTOUT
19	PortB	PB0		TIM1_CH2N	TIM3_CH3	TIM8_CH2N			OCTOSPI1_IO1	USART11_CK	UART4_CTS			ETH_MII_RXD2			LPTIM3_CH1	EVENTOUT	ADC12_INP9/ADC12_INN5
20	PortB	PB1		TIM1_CH3N	TIM3_CH4	TIM8_CH3N			OCTOSPI1_IO0					ETH_MII_RXD3			LPTIM3_CH2	EVENTOUT	ADC12_INP5
21	PortB	PB2	RTC_OUT2		SAI1_D1	TIM8_CH4N	SPI1_RDY	LPTIM1_CH1	SAI1_SD_A	SPI3_MOSI/I2S3_SDO		OCTOSPI1_CLK	OCTOSPI1_DQS		SDMMC1_CMD	LPTIM5_ETR		EVENTOUT
22	PortB	PB3	JTDO/TRACESWO	TIM2_CH2			I2C2_SDA	SPI1_SCK/I2S1_CK	SPI3_SCK/I2S3_CK	UART12_CTS/UART12_NSS	SPI6_SCK	SDMMC2_D2	CRS_SYNC	UART7_RX			LPTIM6_ETR	EVENTOUT
23	PortB	PB4	NJTRST	TIM16_BKIN	TIM3_CH1	OCTOSPI1_CLK	LPTIM1_CH2	SPI1_MISO/I2S1_SDI	SPI3_MISO/I2S3_SDI	SPI2_NSS/I2S2_WS	SPI6_MISO	SDMMC2_D3		UART7_TX		DCMI_D7/PSSI_D7		EVENTOUT
24	PortB	PB5		TIM17_BKIN	TIM3_CH2	OCTOSPI1_NCLK	I2C1_SMBA	SPI1_MOSI/I2S1_SDO	I2C4_SMBA	SPI3_MOSI/I2S3_SDO	SPI6_MOSI	FDCAN2_RX		ETH_PPS_OUT	FMC_SDCKE1	DCMI_D10/PSSI_D10	UART5_RX	EVENTOUT
25	PortB	PB6		TIM16_CH1N	TIM4_CH1	I3C1_SCL	I2C1_SCL	HDMI_CEC	I2C4_SCL	USART1_TX	LPUART1_TX	FDCAN2_TX	OCTOSPI1_NCS		FMC_SDNE1	DCMI_D5/PSSI_D5	UART5_TX	EVENTOUT
26	PortB	PB7		TIM17_CH1N	TIM4_CH2	I3C1_SDA	I2C1_SDA		I2C4_SDA	USART1_RX	LPUART1_RX	FDCAN1_TX	SDMMC2_D5	SDMMC2_CKIN	FMC_NL	DCMI_VSYNC/PSSI_RDY		EVENTOUT
27	PortB	PB8		TIM16_CH1	TIM4_CH3	I3C1_SCL	I2C1_SCL	SPI4_RDY	I2C4_SCL	SDMMC1_CKIN	UART4_RX	FDCAN1_RX	SDMMC2_D4	ETH_MII_TXD3	SDMMC1_D4	DCMI_D6/PSSI_D6		EVENTOUT
28	PortB	PB9		TIM17_CH1	TIM4_CH4	I3C1_SDA	I2C1_SDA	SPI2_NSS/I2S2_WS	I2C4_SDA	SDMMC1_CDIR	UART4_TX	FDCAN1_TX	SDMMC2_D5	SDMMC2_CKIN	SDMMC1_D5	DCMI_D7/PSSI_D7		EVENTOUT
29	PortB	PB10		TIM2_CH3	LPTIM3_CH1	LPTIM2_IN1	I2C2_SCL	SPI2_SCK/I2S2_CK		USART3_TX		OCTOSPI1_NCS		ETH_MII_RX_ER				EVENTOUT
30	PortB	PB11		TIM2_CH4		LPTIM2_ETR	I2C2_SDA	SPI2_RDY	SPI4_RDY	USART3_RX				ETH_MII_TX_EN/ETH_RMII_TX_EN	FMC_NBL1			EVENTOUT
31	PortB	PB12		TIM1_BKIN		OCTOSPI1_NCLK	I2C2_SDA	SPI2_NSS/I2S2_WS	UCPD1_FRSTX	USART3_CK		FDCAN2_RX		ETH_MII_TXD0/ETH_RMII_TXD0			UART5_RX	EVENTOUT
32	PortB	PB13		TIM1_CH1N	LPTIM3_IN1	LPTIM2_CH1	I2C2_SMBA	SPI2_SCK/I2S2_CK		USART3_CTS/USART3_NSS		FDCAN2_TX			SDMMC1_D0		UART5_TX	EVENTOUT
33	PortB	PB14		TIM1_CH2N	TIM12_CH1	TIM8_CH2N	USART1_TX	SPI2_MISO/I2S2_SDI		USART3_RTS	UART4_RTS	SDMMC2_D0					LPTIM3_ETR	EVENTOUT
34	PortB	PB15	RTC_REFIN	TIM1_CH3N	TIM12_CH2	TIM8_CH3N	USART1_RX	SPI2_MOSI/I2S2_SDO		USART11_CTS/USART11_NSS	UART4_CTS	SDMMC2_D1	OCTOSPI1_CLK	ETH_MII_TXD1/ETH_RMII_TXD1		DCMI_D2/PSSI_D2	UART5_RX	EVENTOUT
35	PortC	PC0		TIM16_BKIN					SAI1_MCLK_A	SPI2_RDY	SAI2_FS_B	FMC_A25	OCTOSPI1_IO7		FMC_SDNWE			EVENTOUT	ADC12_INP10
36	PortC	PC1	TRACED0		SAI1_D1			SPI2_MOSI/I2S2_SDO	SAI1_SD_A	USART11_RTS	SAI2_SD_A	SDMMC2_CK	OCTOSPI1_IO4	ETH_MDC				EVENTOUT	ADC12_INP11/ADC12_INN10
37	PortC	PC2	PWR_CSLEEP	TIM17_CH1	TIM4_CH4			SPI2_MISO/I2S2_SDI	OCTOSPI1_IO5			OCTOSPI1_IO2		ETH_MII_TXD2	FMC_SDNE0			EVENTOUT	ADC12_INP12/ADC12_INN11
38	PortC	PC3	PWR_CSTOP		SAI1_D3	LPTIM3_CH1		SPI2_MOSI/I2S2_SDO	OCTOSPI1_IO6			OCTOSPI1_IO0		ETH_MII_TX_CLK	FMC_SDCKE0			EVENTOUT	ADC12_INP13/ADC12_INN12
39	PortC	PC4		TIM2_CH4	SAI1_CK1	LPTIM2_ETR		I2S1_MCK		USART3_RX				ETH_MII_RXD0/ETH_RMII_RXD0	FMC_SDNE0			EVENTOUT	ADC12_INP4
40	PortC	PC5		TIM1_CH4N	SAI1_D3		PSSI_D15		SAI1_FS_A	UART12_RTS			OCTOSPI1_DQS	ETH_MII_RXD1/ETH_RMII_RXD1	FMC_SDCKE0			EVENTOUT	ADC12_INP8/ADC12_INN4
41	PortC	PC6			TIM3_CH1	TIM8_CH1		I2S2_MCK	SAI1_SCK_A	USART6_TX	SDMMC1_D0DIR	FMC_NWAIT	SDMMC2_D6	OCTOSPI1_IO5	SDMMC1_D6	DCMI_D0/PSSI_D0		EVENTOUT
42	PortC	PC7	TRGIO		TIM3_CH2	TIM8_CH2			I2S3_MCK	USART6_RX	SDMMC1_D123DIR	FMC_NE1	SDMMC2_D7	OCTOSPI1_IO6	SDMMC1_D7	DCMI_D1/PSSI_D1		EVENTOUT
43	PortC	PC8	TRACED1		TIM3_CH3	TIM8_CH3				USART6_CK	UART5_RTS	FMC_NE2/FMC_NCE	FMC_INT	FMC_ALE	SDMMC1_D0	DCMI_D2/PSSI_D2		EVENTOUT
44	PortC	PC9	MCO2		TIM3_CH4	TIM8_CH4	I2C3_SDA	AUDIOCLK			UART5_CTS	OCTOSPI1_IO0		FMC_CLE	SDMMC1_D1	DCMI_D3/PSSI_D3		EVENTOUT
45	PortC	PC10			LPTIM3_ETR				SPI3_SCK/I2S3_CK	USART3_TX	UART4_TX	OCTOSPI1_IO1		ETH_MII_TXD0/ETH_RMII_TXD0	SDMMC1_D2	DCMI_D8/PSSI_D8		EVENTOUT
46	PortC	PC11			LPTIM3_IN1				SPI3_MISO/I2S3_SDI	USART3_RX	UART4_RX	OCTOSPI1_NCS			SDMMC1_D3	DCMI_D4/PSSI_D4		EVENTOUT
47	PortC	PC12	TRACED3		TIM15_CH1			SPI6_SCK	SPI3_MOSI/I2S3_SDO	USART3_CK	UART5_TX				SDMMC1_CK	DCMI_D9/PSSI_D9		EVENTOUT
48	PortC	PC13																EVENTOUT
49	PortC	PC14																EVENTOUT
50	PortC	PC15																EVENTOUT
51	PortD	PD0				TIM8_CH4N					UART4_RX	FDCAN1_RX		UART9_CTS	FMC_D2/FMC_AD2			EVENTOUT
52	PortD	PD1									UART4_TX	FDCAN1_TX			FMC_D3/FMC_AD3			EVENTOUT
53	PortD	PD2	TRACED2		TIM3_ETR		TIM15_BKIN				UART5_RX				SDMMC1_CMD	DCMI_D11/PSSI_D11	LPTIM4_ETR	EVENTOUT
54	PortD	PD3						SPI2_SCK/I2S2_CK		USART2_CTS/USART2_NSS					FMC_CLK	DCMI_D5/PSSI_D5		EVENTOUT
55	PortD	PD4								USART2_RTS			OCTOSPI1_IO4		FMC_NOE			EVENTOUT
56	PortD	PD5		TIM1_CH4N				SPI2_RDY		USART2_TX		FDCAN1_TX	OCTOSPI1_IO5		FMC_NWE			EVENTOUT
57	PortD	PD6			SAI1_D1			SPI3_MOSI/I2S3_SDO	SAI1_SD_A	USART2_RX			OCTOSPI1_IO6	SDMMC2_CK	FMC_NWAIT	DCMI_D10/PSSI_D10		EVENTOUT
58	PortD	PD7						SPI1_MOSI/I2S1_SDO		USART2_CK			OCTOSPI1_IO7	SDMMC2_CMD	FMC_NE1/FMC_NCE		LPTIM4_OUT	EVENTOUT
59	PortD	PD8								USART3_TX					FMC_D13/FMC_AD13			EVENTOUT
60	PortD	PD9								USART3_RX		FDCAN2_RX			FMC_D14/FMC_AD14			EVENTOUT
61	PortD	PD10				LPTIM2_CH2				USART3_CK					FMC_D15/FMC_AD15			EVENTOUT
62	PortD	PD11			SAI1_CK1	LPTIM2_IN2	I2C4_SMBA			USART3_CTS/USART3_NSS	UART4_RX	OCTOSPI1_IO0	SAI2_SD_A		FMC_A16/FMC_CLE			EVENTOUT
63	PortD	PD12		LPTIM1_IN1	TIM4_CH1	LPTIM2_IN1	I2C4_SCL	I3C1_SCL	SAI1_D1	USART3_RTS	UART4_TX	OCTOSPI1_IO1	SAI2_FS_A		FMC_A17/FMC_ALE	DCMI_D12/PSSI_D12		EVENTOUT
64	PortD	PD13		LPTIM1_CH1	TIM4_CH2	LPTIM2_CH1	I2C4_SDA	I3C1_SDA				OCTOSPI1_IO3	SAI2_SCK_A	UART9_RTS	FMC_A18	DCMI_D13/PSSI_D13	LPTIM4_IN1	EVENTOUT
65	PortD	PD14			TIM4_CH3						UART8_CTS			UART9_RX	FMC_D0/FMC_AD0			EVENTOUT
66	PortD	PD15			TIM4_CH4						UART8_RTS			UART9_TX	FMC_D1/FMC_AD1			EVENTOUT
67	PortE	PE0		LPTIM1_ETR	TIM4_ETR	LPTIM2_CH2	LPTIM2_ETR		SPI3_RDY		UART8_RX	FDCAN1_RX	SAI2_MCLK_A		FMC_NBL0	DCMI_D2/PSSI_D2		EVENTOUT
68	PortE	PE1		LPTIM1_IN2							UART8_TX	FDCAN1_TX			FMC_NBL1	DCMI_D3/PSSI_D3		EVENTOUT
69	PortE	PE2	TRACECLK	LPTIM1_IN2	SAI1_CK1			SPI4_SCK	SAI1_MCLK_A	USART10_RX	UART8_TX	OCTOSPI1_IO2		ETH_MII_TXD3	FMC_A23	DCMI_D3/PSSI_D3		EVENTOUT
70	PortE	PE3	TRACED0				TIM15_BKIN		SAI1_SD_B	USART10_TX					FMC_A19			EVENTOUT
71	PortE	PE4	TRACED1		SAI1_D2		TIM15_CH1N	SPI4_NSS	SAI1_FS_A						FMC_A20	DCMI_D4/PSSI_D4		EVENTOUT
72	PortE	PE5	TRACED2		SAI1_CK2		TIM15_CH1	SPI4_MISO	SAI1_SCK_A						FMC_A21	DCMI_D6/PSSI_D6		EVENTOUT
73	PortE	PE6	TRACED3	TIM1_BKIN2	SAI1_D1		TIM15_CH2	SPI4_MOSI	SAI1_SD_A				SAI2_MCLK_B		FMC_A22	DCMI_D7/PSSI_D7		EVENTOUT
74	PortE	PE7		TIM1_ETR					UART12_RTS	UART7_RX			OCTOSPI1_IO4		FMC_D4/FMC_AD4			EVENTOUT
75	PortE	PE8		TIM1_CH1N					UART12_CTS/UART12_NSS	UART7_TX			OCTOSPI1_IO5		FMC_D5/FMC_AD5			EVENTOUT
76	PortE	PE9		TIM1_CH1					UART12_RX	UART7_RTS			OCTOSPI1_IO6		FMC_D6/FMC_AD6			EVENTOUT
77	PortE	PE10		TIM1_CH2N					UART12_TX	UART7_CTS			OCTOSPI1_IO7		FMC_D7/FMC_AD7			EVENTOUT
78	PortE	PE11		TIM1_CH2			SPI1_RDY	SPI4_NSS	OCTOSPI1_NCS				SAI2_SD_B		FMC_D8/FMC_AD8			EVENTOUT
79	PortE	PE12		TIM1_CH3N				SPI4_SCK					SAI2_SCK_B		FMC_D9/FMC_AD9			EVENTOUT
80	PortE	PE13		TIM1_CH3				SPI4_MISO					SAI2_FS_B		FMC_D10/FMC_AD10			EVENTOUT
81	PortE	PE14		TIM1_CH4				SPI4_MOSI					SAI2_MCLK_B		FMC_D11/FMC_AD11			EVENTOUT
82	PortE	PE15		TIM1_BKIN		TIM1_CH4N				USART10_CK					FMC_D12/FMC_AD12			EVENTOUT
83	PortF	PF0					I2C2_SDA								FMC_A0	LPTIM5_CH1		EVENTOUT
84	PortF	PF1					I2C2_SCL								FMC_A1	LPTIM5_CH2		EVENTOUT
85	PortF	PF2			LPTIM3_CH2	LPTIM3_IN2	I2C2_SMBA		UART12_TX	USART11_CK					FMC_A2	LPTIM5_IN1		EVENTOUT
86	PortF	PF3			LPTIM3_IN1					USART11_TX					FMC_A3	LPTIM5_IN2		EVENTOUT
87	PortF	PF4			LPTIM3_ETR					USART11_RX					FMC_A4			EVENTOUT
88	PortF	PF5			LPTIM3_CH1		I2C4_SCL	I3C1_SCL	UART12_RX	USART11_CTS/USART11_NSS					FMC_A5		LPTIM3_IN1	EVENTOUT
89	PortF	PF6		TIM16_CH1				SPI5_NSS	SAI1_SD_B	UART7_RX			OCTOSPI1_IO3			LPTIM5_CH1		EVENTOUT
90	PortF	PF7		TIM17_CH1				SPI5_SCK	SAI1_MCLK_B	UART7_TX			OCTOSPI1_IO2			LPTIM5_CH2		EVENTOUT
91	PortF	PF8		TIM16_CH1N				SPI5_MISO	SAI1_SCK_B	UART7_RTS		TIM13_CH1	OCTOSPI1_IO0			LPTIM5_IN1		EVENTOUT
92	PortF	PF9		TIM17_CH1N				SPI5_MOSI	SAI1_FS_B	UART7_CTS		TIM14_CH1	OCTOSPI1_IO1			LPTIM5_IN2		EVENTOUT
93	PortF	PF10		TIM16_BKIN	SAI1_D3		PSSI_D15					OCTOSPI1_CLK				DCMI_D11/PSSI_D11		EVENTOUT
94	PortF	PF11						SPI5_MOSI				OCTOSPI1_NCLK	SAI2_SD_B		FMC_NRAS	DCMI_D12/PSSI_D12	LPTIM6_CH1	EVENTOUT	ADC1_INP2
95	PortF	PF12													FMC_A6		LPTIM6_CH2	EVENTOUT	ADC1_INP6/ADC1_INN2
96	PortF	PF13					I2C4_SMBA								FMC_A7		LPTIM6_IN1	EVENTOUT	ADC2_INP2
97	PortF	PF14													FMC_A8		LPTIM6_IN2	EVENTOUT	ADC2_INP6/ADC2_INN2
98	PortF	PF15					I2C4_SDA	I3C1_SDA							FMC_A9			EVENTOUT
99	PortG	PG0												UART9_RX	FMC_A10		LPTIM4_IN1	EVENTOUT
100	PortG	PG1								SPI2_MOSI/I2S2_SDO				UART9_TX	FMC_A11			EVENTOUT
101	PortG	PG2				TIM8_BKIN				UART12_RX					FMC_A12		LPTIM6_ETR	EVENTOUT
102	PortG	PG3				TIM8_BKIN2				UART12_TX					FMC_A13	LPTIM5_ETR		EVENTOUT
103	PortG	PG4		TIM1_BKIN2											FMC_A14/FMC_BA0		LPTIM4_ETR	EVENTOUT
104	PortG	PG5		TIM1_ETR											FMC_A15/FMC_BA1			EVENTOUT
105	PortG	PG6		TIM17_BKIN		I3C1_SDA	I2C4_SDA	SPI1_RDY					OCTOSPI1_NCS	UCPD1_FRSTX	FMC_NE3	DCMI_D12/PSSI_D12		EVENTOUT
106	PortG	PG7			SAI1_CK2	I3C1_SCL	I2C4_SCL		SAI1_MCLK_A	USART6_CK				UCPD1_FRSTX	FMC_INT	DCMI_D13/PSSI_D13		EVENTOUT
107	PortG	PG8				TIM8_ETR		SPI6_NSS		USART6_RTS				ETH_PPS_OUT	FMC_SDCLK			EVENTOUT
108	PortG	PG9						SPI1_MISO/I2S1_SDI		USART6_RX		OCTOSPI1_IO6	SAI2_FS_B	SDMMC2_D0	FMC_NE2/FMC_NCE	DCMI_VSYNC/PSSI_RDY		EVENTOUT
109	PortG	PG10						SPI1_NSS/I2S1_WS					SAI2_SD_B	SDMMC2_D1	FMC_NE3	DCMI_D2/PSSI_D2		EVENTOUT
110	PortG	PG11		LPTIM1_IN2				SPI1_SCK/I2S1_CK	USART10_RX	USART11_RTS			SDMMC2_D2	ETH_MII_TX_EN/ETH_RMII_TX_EN		DCMI_D3/PSSI_D3		EVENTOUT
111	PortG	PG12		LPTIM1_IN1			PSSI_D15	SPI6_MISO	USART10_TX	USART6_RTS			SDMMC2_D3	ETH_MII_TXD1/ETH_RMII_TXD1	FMC_NE4	DCMI_D11/PSSI_D11	LPTIM5_CH1	EVENTOUT
112	PortG	PG13	TRACED0	LPTIM1_CH1				SPI6_SCK	USART10_CTS/USART10_NSS	USART6_CTS/USART6_NSS			SDMMC2_D6	ETH_MII_TXD0/ETH_RMII_TXD0	FMC_A24	LPTIM5_CH2		EVENTOUT
113	PortG	PG14	TRACED1	LPTIM1_ETR			LPTIM1_CH2	SPI6_MOSI	USART10_RTS	USART6_TX		OCTOSPI1_IO7	SDMMC2_D7	ETH_MII_TXD1/ETH_RMII_TXD1	FMC_A25	LPTIM5_IN1		EVENTOUT
114	PortG	PG15						SPI4_RDY	USART10_CK	USART6_CTS/USART6_NSS					FMC_NCAS	DCMI_D13/PSSI_D13		EVENTOUT
115	PortH	PH0																EVENTOUT
116	PortH	PH1																EVENTOUT
117	PortH	PH2		LPTIM1_IN2								OCTOSPI1_IO4	SAI2_SCK_B	ETH_MII_CRS	FMC_SDCKE0			EVENTOUT
118	PortH	PH3										OCTOSPI1_IO5	SAI2_MCLK_B	ETH_MII_COL	FMC_SDNE0			EVENTOUT
119	PortH	PH4					I2C2_SCL	SPI5_RDY		SPI6_RDY						PSSI_D14		EVENTOUT
120	PortH	PH5					I2C2_SDA	SPI5_NSS		SPI6_RDY					FMC_SDNWE			EVENTOUT
121	PortH	PH6		TIM1_CH3N	TIM12_CH1	TIM8_CH1	I2C2_SMBA	SPI5_SCK						ETH_MII_RXD2	FMC_SDNE1	DCMI_D8/PSSI_D8		EVENTOUT
122	PortH	PH7		TIM1_CH3		TIM8_CH1N	I2C3_SCL	SPI5_MISO						ETH_MII_RXD3	FMC_SDCKE1	DCMI_D9/PSSI_D9		EVENTOUT
123	PortH	PH8		TIM1_CH2N	TIM5_ETR	TIM8_CH2	I2C3_SDA	SPI5_MOSI								DCMI_HSYNC/PSSI_DE		EVENTOUT
124	PortH	PH9		TIM1_CH2	TIM12_CH2	TIM8_CH2N	I2C3_SMBA	SPI5_NSS								DCMI_D0/PSSI_D0		EVENTOUT
125	PortH	PH10		TIM1_CH1N	TIM5_CH1	TIM8_CH3	I2C4_SMBA	SPI5_RDY								DCMI_D1/PSSI_D1		EVENTOUT
126	PortH	PH11		TIM1_CH1	TIM5_CH2	TIM8_CH3N	I2C4_SCL	I3C1_SCL								DCMI_D2/PSSI_D2		EVENTOUT
127	PortH	PH12		TIM1_BKIN	TIM5_CH3	TIM8_BKIN	I2C4_SDA	I3C1_SDA					TIM8_CH4N			DCMI_D3/PSSI_D3		EVENTOUT
128	PortH	PH13		LPTIM1_IN2		TIM8_CH1N				UART8_TX	UART4_TX	FDCAN1_TX				DCMI_D3/PSSI_D3		EVENTOUT
129	PortH	PH14				TIM8_CH2N					UART4_RX	FDCAN1_RX				DCMI_D4/PSSI_D4		EVENTOUT
130	PortH	PH15				TIM8_CH3N										DCMI_D11/PSSI_D11		EVENTOUT
131	PortI	PI0			TIM5_CH4			SPI2_NSS/I2S2_WS								DCMI_D13/PSSI_D13		EVENTOUT
132	PortI	PI1				TIM8_BKIN2		SPI2_SCK/I2S2_CK								DCMI_D8/PSSI_D8		EVENTOUT
133	PortI	PI2				TIM8_CH4		SPI2_MISO/I2S2_SDI								DCMI_D9/PSSI_D9		EVENTOUT
134	PortI	PI3				TIM8_ETR		SPI2_MOSI/I2S2_SDO								DCMI_D10/PSSI_D10		EVENTOUT
135	PortI	PI4				TIM8_BKIN				SPI2_RDY			SAI2_MCLK_A			DCMI_D5/PSSI_D5		EVENTOUT
136	PortI	PI5				TIM8_CH1							SAI2_SCK_A			DCMI_VSYNC/PSSI_RDY		EVENTOUT
137	PortI	PI6				TIM8_CH2							SAI2_SD_A			DCMI_D6/PSSI_D6		EVENTOUT
138	PortI	PI7				TIM8_CH3							SAI2_FS_A			DCMI_D7/PSSI_D7		EVENTOUT
139	PortI	PI8																EVENTOUT
140	PortI	PI9									UART4_RX	FDCAN1_RX						EVENTOUT
141	PortI	PI10										FDCAN1_RX		ETH_MII_RX_ER		PSSI_D14		EVENTOUT
142	PortI	PI11														PSSI_D15		EVENTOUT