circuitpython/ports/mimxrt10xx/supervisor
Scott Shawcroft 9d5742ebd1
Fix start on power up by providing Reset_Handler ourselves.
On power up the FlexRAM banks are in an unknown config so we can't
rely on the stack until after we configure FlexRAM.
2020-01-18 11:54:01 -08:00
..
cpu.S Add initial MIMXRT10XX port 2020-01-06 21:08:49 +01:00
flexspi_nor_flash_ops.c Fix start on power up by providing Reset_Handler ourselves. 2020-01-18 11:54:01 -08:00
internal_flash_root_pointers.h Add initial MIMXRT10XX port 2020-01-06 21:08:49 +01:00
internal_flash.c Refine iMX RT memory layout and add three boards 2020-01-17 17:36:08 -08:00
internal_flash.h Add initial MIMXRT10XX port 2020-01-06 21:08:49 +01:00
port.c Fix start on power up by providing Reset_Handler ourselves. 2020-01-18 11:54:01 -08:00
serial.c Add initial MIMXRT10XX port 2020-01-06 21:08:49 +01:00
usb.c Add initial MIMXRT10XX port 2020-01-06 21:08:49 +01:00