126 lines
4.7 KiB
C
126 lines
4.7 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "genhdr/mpversion.h"
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#include "py/mpconfig.h"
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#include "py/objstr.h"
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#include "py/objtuple.h"
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#include "py/qstr.h"
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#include "extmod/crypto-algorithms/sha256.h"
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#include "hardware/structs/rosc.h"
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#include <string.h>
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STATIC const qstr os_uname_info_fields[] = {
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MP_QSTR_sysname, MP_QSTR_nodename,
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MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine
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};
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STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "rp2040");
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STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "rp2040");
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STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING);
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STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE);
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STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME);
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STATIC MP_DEFINE_ATTRTUPLE(
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os_uname_info_obj,
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os_uname_info_fields,
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5,
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(mp_obj_t)&os_uname_info_sysname_obj,
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(mp_obj_t)&os_uname_info_nodename_obj,
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(mp_obj_t)&os_uname_info_release_obj,
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(mp_obj_t)&os_uname_info_version_obj,
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(mp_obj_t)&os_uname_info_machine_obj
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);
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mp_obj_t common_hal_os_uname(void) {
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return (mp_obj_t)&os_uname_info_obj;
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}
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// NIST Special Publication 800-90B (draft) recommends several extractors,
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// including the SHA hash family and states that if the amount of entropy input
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// is twice the number of bits output from them, that output can be considered
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// essentially fully random. If every RANDOM_SAFETY_MARGIN bits from
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// `rosc_hw->randombit` have at least 1 bit of entropy, then this criterion is met.
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//
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// This works by seeding the `random_state` with plenty of random bits (SHA256
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// as entropy harvesting function), then using that state it as a counter input
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// (SHA256 as a CSPRNG), re-seeding at least every 256 blocks (8kB).
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//
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// In practice, `PractRand` doesn't detect any gross problems with the output
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// random numbers on samples of 1 to 8 megabytes, no matter the setting of
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// RANDOM_SAFETY_MARGIN. (it does detect "unusual" results from time to time,
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// as it will with any RNG)
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#define RANDOM_SAFETY_MARGIN (4)
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static BYTE random_state[SHA256_BLOCK_SIZE];
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static void seed_random_bits(BYTE out[SHA256_BLOCK_SIZE]) {
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CRYAL_SHA256_CTX context;
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sha256_init(&context);
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for (int i=0; i<2*RANDOM_SAFETY_MARGIN; i++) {
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for(int j=0; j<SHA256_BLOCK_SIZE; j++) {
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out[j] = rosc_hw->randombit & 1;
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for(int k=0; k<8; k++) {
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out[j] = (out[j] << 1) ^ (rosc_hw->randombit & 1);
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}
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}
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sha256_update(&context, out, SHA256_BLOCK_SIZE);
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}
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sha256_final(&context, out);
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}
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static void get_random_bits(BYTE out[SHA256_BLOCK_SIZE]) {
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if (!random_state[0]++) {
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seed_random_bits(random_state);
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}
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CRYAL_SHA256_CTX context;
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sha256_init(&context);
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sha256_update(&context, random_state, SHA256_BLOCK_SIZE);
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sha256_final(&context, out);
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}
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bool common_hal_os_urandom(uint8_t* buffer, uint32_t length) {
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#define ROSC_POWER_SAVE (1) // assume ROSC is not necessarily active all the time
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#if ROSC_POWER_SAVE
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uint32_t old_rosc_ctrl = rosc_hw->ctrl;
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rosc_hw->ctrl = (old_rosc_ctrl & ~ROSC_CTRL_ENABLE_BITS) | (ROSC_CTRL_ENABLE_VALUE_ENABLE << 12);
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#endif
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while (length) {
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size_t n = MIN(length, SHA256_BLOCK_SIZE);
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BYTE sha_buf[SHA256_BLOCK_SIZE];
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get_random_bits(sha_buf);
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memcpy(buffer, sha_buf, n);
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buffer += n;
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length -= n;
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}
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#if ROSC_POWER_SAVE
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rosc_hw->ctrl = old_rosc_ctrl;
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#endif
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return true;
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}
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