circuitpython/ports/stm32/boards/stm32f091_af.csv

5.1 KiB

1PortPinAF0AF1AF2AF3AF4AF5AF6AF7
2AF0AF1AF2AF3AF4AF5AF6AF7ADC
3PortAPA0USART2_CTSTIM2_CH1_ETRTSC_G1_IO1USART4_TXCOMP1_OUTADC1_IN0
4PortAPA1EVENTOUTUSART2_RTSTIM2_CH2TSC_G1_IO2USART4_RXTIM15_CH1NADC1_IN1
5PortAPA2TIM15_CH1USART2_TXTIM2_CH3TSC_G1_IO3COMP2_OUTADC1_IN2
6PortAPA3TIM15_CH2USART2_RXTIM2_CH4TSC_G1_IO4ADC1_IN3
7PortAPA4SPI1_NSS/I2S1_WSUSART2_CKTSC_G2_IO1TIM14_CH1USART6_TXADC1_IN4
8PortAPA5SPI1_SCK/I2S1_CKCECTIM2_CH1_ETRTSC_G2_IO2USART6_RXADC1_IN5
9PortAPA6SPI1_MISO/I2S1_MCKTIM3_CH1TIM1_BKINTSC_G2_IO3USART3_CTSTIM16_CH1EVENTOUTCOMP1_OUTADC1_IN6
10PortAPA7SPI1_MOSI/I2S1_SDTIM3_CH2TIM1_CH1NTSC_G2_IO4TIM14_CH1TIM17_CH1EVENTOUTCOMP2_OUTADC1_IN7
11PortAPA8MCOUSART1_CKTIM1_CH1EVENTOUTCRS_SYNC
12PortAPA9TIM15_BKINUSART1_TXTIM1_CH2TSC_G4_IO1I2C1_SCLMCO
13PortAPA10TIM17_BKINUSART1_RXTIM1_CH3TSC_G4_IO2I2C1_SDA
14PortAPA11EVENTOUTUSART1_CTSTIM1_CH4TSC_G4_IO3CAN1_RXI2C2_SCLCOMP1_OUT
15PortAPA12EVENTOUTUSART1_RTSTIM1_ETRTSC_G4_IO4CAN1_TXI2C2_SDACOMP2_OUT
16PortAPA13SWDIOIR_OUT
17PortAPA14SWCLKUSART2_TX
18PortAPA15SPI1_NSS/I2S1_WSUSART2_RXTIM2_CH1_ETREVENTOUTUSART4_RTS
19PortBPB0EVENTOUTTIM3_CH3TIM1_CH2NTSC_G3_IO2USART3_CKADC1_IN8
20PortBPB1TIM14_CH1TIM3_CH4TIM1_CH3NTSC_G3_IO3USART3_RTSADC1_IN9
21PortBPB2TSC_G3_IO4
22PortCPC0EVENTOUTUSART7_TXUSART6_TXADC1_IN10
23PortCPC1EVENTOUTUSART7_RXUSART6_RXADC1_IN11
24PortCPC2EVENTOUTSPI2_MISO/I2S2_MCKUSART8_TXADC1_IN12
25PortCPC3EVENTOUTSPI2_MOSI/I2S2_SDUSART8_RXADC1_IN13
26PortCPC4EVENTOUTUSART3_TXADC1_IN14
27PortCPC5TSC_G3_IO1USART3_RXADC1_IN15
28PortCPC6TIM3_CH1USART7_TX
29PortCPC7TIM3_CH2USART7_RX
30PortCPC8TIM3_CH3USART8_TX
31PortCPC9TIM3_CH4USART8_RX
32PortCPC10USART4_TXUSART3_TX
33PortCPC11USART4_RXUSART3_RX
34PortCPC12USART4_CKUSART3_CKUSART5_TX
35PortCPC13
36PortCPC14
37PortCPC15
38PortDPD0CAN1_RXSPI2_NSS/I2S2_WS
39PortDPD1CAN1_TXSPI2_SCK/I2S2_CK
40PortDPD2TIM3_ETRUSART3_RTSUSART5_RX
41PortDPD3USART2_CTSSPI2_MISO/I2S2_MCK
42PortDPD4USART2_RTSSPI2_MOSI/I2S2_SD
43PortDPD5USART2_TX
44PortDPD6USART2_RX
45PortDPD7USART2_CK
46PortDPD8USART3_TX
47PortDPD9USART3_RX
48PortDPD10USART3_CK
49PortDPD11USART3_CTS
50PortDPD12USART3_RTSTSC_G8_IO1USART8_CK/USART8_RTS
51PortDPD13USART8_TXTSC_G8_IO2
52PortDPD14USART8_RXTSC_G8_IO3
53PortDPD15CRS_SYNCTSC_G8_IO4USART7_CK/USART7_RTS
54PortEPE0TIM16_CH1EVENTOUT
55PortEPE1TIM17_CH1EVENTOUT
56PortEPE2TIM3_ETRTSC_G7_IO1
57PortEPE3TIM3_CH1TSC_G7_IO2
58PortEPE4TIM3_CH2TSC_G7_IO3
59PortEPE5TIM3_CH3TSC_G7_IO4
60PortEPE6TIM3_CH4
61PortEPE7TIM1_ETRUSART5_CK/USART5_RTS
62PortEPE8TIM1_CH1NUSART4_TX
63PortEPE9TIM1_CH1USART4_RX
64PortEPE10TIM1_CH2NUSART5_TX
65PortEPE11TIM1_CH2USART5_RX
66PortEPE12TIM1_CH3NSPI1_NSS/I2S1_WS
67PortEPE13TIM1_CH3SPI1_SCK/I2S1_CK
68PortEPE14TIM1_CH4SPI1_MISO/I2S1_MCK
69PortEPE15TIM1_BKINSPI1_MOSI/I2S1_SD
70PortFPF0CRS_SYNCI2C1_SDA
71PortFPF1I2C1_SCL
72PortFPF2EVENTOUTUSART7_TXUSART7_CK/USART7_RTS
73PortFPF3EVENTOUTUSART7_RXUSART6_CK/USART6_RTS
74PortFPF6
75PortFPF9TIM15_CH1USART6_TX
76PortFPF10TIM15_CH2USART6_RX