Commit Graph

14 Commits

Author SHA1 Message Date
robert-hh 20fd22edad samd/machine_uart: Add support for UART hardware flow control.
By specifying rts=pin(x) and/or cts=Pin(x) in the constructor.  The pad
numbers for the UART pins are fix in this case: TX must be at pad 0, RX at
pad 1, RTS at pad 2 and CTS at pad 3.

repr(uart) shows the pin names for rts and cts, if set.  In case of a RX
overflow, the rx interrupt will be disabled instead of just discarding the
data.  That allows RTS to act.

If RTS is inactive, still 2 bytes can be buffered in the FIFO.

Signed-off-by: robert-hh <robert@hammelrath.com>
2023-05-23 09:53:24 +10:00
robert-hh 47fa723586 samd/modmachine: Make some machine classes configurable by #defines.
These include ADC, DAC, I2C, SoftI2C, SPI, SoftI2C, PWM, UART, pulse.  This
is useful for devices like the Adafruit Trinket series which have almost no
accessible GPIO pins.

Signed-off-by: robert-hh <robert@hammelrath.com>
2023-05-22 18:39:07 +10:00
Damien George b1229efbd1 all: Fix spelling mistakes based on codespell check.
Signed-off-by: Damien George <damien@micropython.org>
2023-04-27 18:03:06 +10:00
robert-hh a73dcb3d22 samd/machine_uart: Fix uart.deinit() and save some RAM.
Changes in this commit:
- Do not deinit IRQ when uart.deinit() is called with an inactive object.
- Remove using it for the finaliser.  There is another machanism for soft
  reset, and it is not needed otherwise.
- Do not tag the UART buffers with MP_STATE_PORT, it is not required.
2022-12-14 12:46:20 +11:00
robert-hh f78dd25a2c samd/machine_uart: Check the UART TX pin assignment.
Check, if TX is at Pad 0 (SAMD51), or Pad 0 or 2 (SAMD21).
2022-12-14 12:45:51 +11:00
robert-hh 5b1fd8802a samd/machine_uart: Simplify machine_uart_any() and machine_uart_read().
Remove the call to uart_drain_rx_fifo().  It is not required, and may cause
a race condition.
2022-12-14 12:43:34 +11:00
robert-hh 4199f986ad samd/machine_uart: Fix IRQ flag setting and clearing.
Clearing the DRE flag for the transmit interrupt at the end of a
uart.write() also cleared the RXC flag disabling the receive interrupt.

This commit also changes the flag set/clear mechanism in the driver for SPI
as well, even if it did not cause a problem there.  But at least it saves a
few bytes of code.
2022-12-14 12:42:34 +11:00
robert-hh a1eebc507e samd/machine_spi: Register SerCom objects as root pointers.
Protect SerCom (UART, SPI, I2C) objects from getting freed by the GC when
they go out of scope without being deinitialized.  Otherwise the ISR of a
Sercom may access an invalid data structure.
2022-10-25 23:48:37 +11:00
robert-hh 9c2bc379f1 samd/machine_uart: Use a finaliser to tidy up UART on soft reset.
And use the common sercom_table, saving a few bytes of RAM.
2022-10-25 23:44:49 +11:00
robert-hh 2251cb774b samd/machine_uart: Implement uart.txdone() and uart.flush().
Using the stream method for uart.flush().

uart.txdone() returns True, if the uart not busy, False otherwise.

uart.flush() waits until all bytes have been transmitted or a timeout
triggers.  The timeout is determined by the buffer size and the baud rate.

Also fix two inconsistencies when not using txbuf:
- Report in ioctl as being writeable if there is room in the tx buffer,
  only if it is configured.
- Print the txbuf size if configured.
2022-10-25 23:11:57 +11:00
robert-hh d9338aabc5 samd: Change the symbol names for the peripheral clocks.
From APB_FREQ to DFLL48M_FREQ, and from apb_freq to peripheral_freq.
2022-10-06 23:10:08 +11:00
robert-hh 9a567b04e7 samd/machine_uart: Support buffered TX for UART.
It can be enabled/disabled by a configuration switch.  The code size
increase is 308 bytes, but it requires RAM space for buffers, the larger
UART object and root pointers.
2022-10-06 22:57:37 +11:00
robert-hh 3625388d8c samd/samd_isr: Change the way a Sercom ISR is registered and called.
Code size diff: +12 Bytes
BSS diff: -12 Bytes
RAM usage: +16 Bytes
Speed increase: a few clock cycles per call
Style improvement: ++
2022-10-06 22:52:10 +11:00
robert-hh b33f204529 samd/machine_uart: Add the machine.UART class.
All board pins that have UART's assigned can be used.  Baud rate range is
75 Baud to ~2 MBaud.

No flow control yet, and only RX is buffered.  TX buffer and flow control
may be added later for SAMD51 with its larger RAM and Flash.
2022-10-06 22:48:12 +11:00