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samd: Change the symbol names for the peripheral clocks. 

From APB_FREQ to DFLL48M_FREQ, and from apb_freq to peripheral_freq.
This commit is contained in:
robert-hh 2022-06-30 16:50:15 +02:00 committed by Damien George
parent e9a76310ec
commit d9338aabc5
9 changed files with 19 additions and 18 deletions
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2
ports/samd/clock_config.h
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@ -29,6 +29,6 @@
void init_clocks(uint32_t cpu_freq);
void set_cpu_freq(uint32_t cpu_freq);
uint32_t get_cpu_freq(void);
uint32_t get_apb_freq(void);
uint32_t get_peripheral_freq(void);
void check_usb_recovery_mode(void);
void enable_sercom_clock(int id);

2
ports/samd/machine_i2c.c
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@ -185,7 +185,7 @@ mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
// baud = peripheral_freq / (2 * baudrate) - 5 - (rise_time * peripheral_freq) / 2
// Just set the minimal configuration for standard and fast mode.
// Set Baud. Assume ~300ns rise time. Maybe set later by a keyword argument.
i2c->I2CM.BAUD.reg = get_apb_freq() / (2 * self->freq) - 5 - (get_apb_freq() / 1000000) * RISETIME_NS / 2000;
i2c->I2CM.BAUD.reg = get_peripheral_freq() / (2 * self->freq) - 5 - (get_peripheral_freq() / 1000000) * RISETIME_NS / 2000;
// Enable interrupts
sercom_register_irq(self->id, &common_i2c_irq_handler);

3
ports/samd/machine_pwm.c
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@ -28,6 +28,7 @@
#include "py/runtime.h"
#include "py/mphal.h"
#include "modmachine.h"
#include "clock_config.h"
#include "sam.h"
#include "pin_af.h"
@ -50,7 +51,7 @@ typedef struct _machine_pwm_obj_t {
#define PWM_NOT_INIT (0)
#define PWM_CLK_READY (1)
#define PWM_TCC_ENABLED (2)
#define PWM_MASTER_CLK (48000000)
#define PWM_MASTER_CLK (get_peripheral_freq())
#define PWM_FULL_SCALE (65536)
static Tcc *tcc_instance[] = TCC_INSTS;

4
ports/samd/machine_spi.c
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@ -206,9 +206,9 @@ STATIC void machine_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj
spi->SPI.CTRLC.reg = 1; // 1 clock cycle character spacing
#endif
// SPI is driven by the clock of GCLK Generator 2, freq in bus_freq
// SPI is driven by the clock of GCLK Generator 2, freq by get_peripheral_freq()
// baud = bus_freq / (2 * baudrate) - 1
uint32_t baud = get_apb_freq() / (2 * self->baudrate) - 1;
uint32_t baud = get_peripheral_freq() / (2 * self->baudrate) - 1;
spi->SPI.BAUD.reg = baud; // Set Baud
// Enable RXC interrupt only if miso is defined

4
ports/samd/machine_uart.c
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@ -276,9 +276,9 @@ STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args
while (uart->USART.SYNCBUSY.bit.CTRLB) {
}
// USART is driven by the clock of GCLK Generator 2, freq by get_apb_freq()
// USART is driven by the clock of GCLK Generator 2, freq by get_peripheral_freq()
// baud rate; 65536 * (1 - 16 * 115200/bus_freq)
uint32_t baud = 65536 - ((uint64_t)(65536 * 16) * self->baudrate + get_apb_freq() / 2) / get_apb_freq();
uint32_t baud = 65536 - ((uint64_t)(65536 * 16) * self->baudrate + get_peripheral_freq() / 2) / get_peripheral_freq();
uart->USART.BAUD.bit.BAUD = baud; // Set Baud
sercom_register_irq(self->id, &common_uart_irq_handler);

6
ports/samd/mcu/samd21/clock_config.c
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@ -33,7 +33,7 @@
#include "samd_soc.h"
static uint32_t cpu_freq = CPU_FREQ;
static uint32_t apb_freq = APB_FREQ;
static uint32_t peripheral_freq = DFLL48M_FREQ;
static uint32_t dfll48m_calibration;
int sercom_gclk_id[] = {
@ -46,8 +46,8 @@ uint32_t get_cpu_freq(void) {
return cpu_freq;
}
uint32_t get_apb_freq(void) {
return apb_freq;
uint32_t get_peripheral_freq(void) {
return peripheral_freq;
}
void set_cpu_freq(uint32_t cpu_freq_arg) {

2
ports/samd/mcu/samd21/mpconfigmcu.h
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@ -16,7 +16,7 @@
#define MICROPY_HW_UART_TXBUF (1)
#define CPU_FREQ (48000000)
#define APB_FREQ (48000000)
#define DFLL48M_FREQ (48000000)
#define IRQ_PRI_PENDSV ((1 << __NVIC_PRIO_BITS) - 1)

12
ports/samd/mcu/samd51/clock_config.c
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@ -33,7 +33,7 @@
#include "samd_soc.h"
static uint32_t cpu_freq = CPU_FREQ;
static uint32_t apb_freq = APB_FREQ;
static uint32_t peripheral_freq = DFLL48M_FREQ;
static uint32_t dfll48m_calibration;
int sercom_gclk_id[] = {
@ -49,8 +49,8 @@ uint32_t get_cpu_freq(void) {
return cpu_freq;
}
uint32_t get_apb_freq(void) {
return apb_freq;
uint32_t get_peripheral_freq(void) {
return peripheral_freq;
}
void set_cpu_freq(uint32_t cpu_freq_arg) {
@ -181,7 +181,7 @@ void init_clocks(uint32_t cpu_freq) {
while (GCLK->PCHCTRL[0].bit.CHEN == 0) {
}
// Step 2: Set the multiplication values. The offset of 16384 to the freq is for rounding.
OSCCTRL->DFLLMUL.reg = OSCCTRL_DFLLMUL_MUL((APB_FREQ + DPLLx_REF_FREQ / 2) / DPLLx_REF_FREQ) |
OSCCTRL->DFLLMUL.reg = OSCCTRL_DFLLMUL_MUL((DFLL48M_FREQ + DPLLx_REF_FREQ / 2) / DPLLx_REF_FREQ) |
OSCCTRL_DFLLMUL_FSTEP(1) | OSCCTRL_DFLLMUL_CSTEP(1);
while (OSCCTRL->DFLLSYNC.bit.DFLLMUL == 1) {
}
@ -200,7 +200,7 @@ void init_clocks(uint32_t cpu_freq) {
#else // MICROPY_HW_XOSC32K
// Derive GCLK1 from DFLL48M at DPLL0_REF_FREQ as defined in mpconfigboard.h (e.g. 32768 Hz)
GCLK->GENCTRL[1].reg = ((APB_FREQ + DPLLx_REF_FREQ / 2) / DPLLx_REF_FREQ) << GCLK_GENCTRL_DIV_Pos
GCLK->GENCTRL[1].reg = ((DFLL48M_FREQ + DPLLx_REF_FREQ / 2) / DPLLx_REF_FREQ) << GCLK_GENCTRL_DIV_Pos
| GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL;
while (GCLK->SYNCBUSY.bit.GENCTRL1) {
}
@ -236,7 +236,7 @@ void init_clocks(uint32_t cpu_freq) {
set_cpu_freq(cpu_freq);
apb_freq = APB_FREQ; // To be changed if CPU_FREQ < 48M
peripheral_freq = DFLL48M_FREQ; // To be changed if CPU_FREQ < 48M
// Setup GCLK2 for DPLL1 output (48 MHz)
GCLK->GENCTRL[2].reg = GCLK_GENCTRL_DIV(1) | GCLK_GENCTRL_RUNSTDBY | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL;

2
ports/samd/mcu/samd51/mpconfigmcu.h
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@ -29,7 +29,7 @@ unsigned long trng_random_u32(void);
#define MICROPY_HW_UART_TXBUF (1)
#define CPU_FREQ (120000000)
#define APB_FREQ (48000000)
#define DFLL48M_FREQ (48000000)
#define DPLLx_REF_FREQ (32768)
#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003)