Commit Graph

20 Commits

Author SHA1 Message Date
Damien George 69661f3343 all: Reformat C and Python source code with tools/codeformat.py.
This is run with uncrustify 0.70.1, and black 19.10b0.
2020-02-28 10:33:03 +11:00
hahmadi 266146ad64 stm32/system_stm32: Support selection of HSE and LSI on L4 MCUs.
This commit adds the option to use HSE or MSI system clock, and LSE or LSI
RTC clock, on L4 MCUs.

Note that prior to this commit the default clocks on an L4 part were MSI
and LSE.  The defaults are now MSI and LSI.

In mpconfigboard.h select the clock source via:

    #define MICROPY_HW_RTC_USE_LSE (0) or (1)
    #define MICROPY_HW_CLK_USE_HSE (0) or (1)

and the PLLSAI1 N,P,Q,R settings:

    #define MICROPY_HW_CLK_PLLSAIN (12)
    #define MICROPY_HW_CLK_PLLSAIP (RCC_PLLP_DIV7)
    #define MICROPY_HW_CLK_PLLSAIQ (RCC_PLLQ_DIV2)
    #define MICROPY_HW_CLK_PLLSAIR (RCC_PLLR_DIV2)
2019-10-04 16:09:06 +10:00
Damien George 59b7166d87 stm32: Add initial support for STM32WBxx MCUs.
This new series of MCUs is similar to the L4 series with an additional
Cortex-M0 coprocessor.  The firmware for the wireless stack must be managed
separately and MicroPython does not currently interface to it.  Supported
features so far include: RTC, UART, USB, internal flash filesystem.
2019-07-17 16:33:31 +10:00
Damien George 5fd62c8992 stm32: Remove SystemInit funcs, use stm32lib versions instead.
stm32lib now provides system_stm32XXxx.c source files for all MCU variants,
which includes SystemInit and prescaler tables.  Since these are quite
standard and don't need to be changed, switch to use them instead of custom
variants, making the start-up code cleaner.

The SystemInit code in stm32lib was checked and is equivalent to what is
removed from the stm32 port in this commit.
2019-07-08 15:23:53 +10:00
roland van straten d396a7e10d stm32/system_stm32: Provide default value for HSI calibration.
If HSI is used the calibration value must be valid.  Fixes #4596.
2019-03-26 17:10:21 +11:00
Francisco J. Manno f938e70c69 stm32: Add compile-time option to use HSI as clock source.
To use HSI instead of HSE define MICROPY_HW_CLK_USE_HSI as 1 in the board
configuration file.  The default is to use HSE.

HSI has been made the default for the NUCLEO_F401RE board to serve as an
example, and because early revisions of this board need a hardware
modification to get HSE working.
2019-03-05 15:49:08 +11:00
roland 30ed2b3cab stm32/system_stm32: Introduce configuration defines for PLL3 settings.
A board must be able to set the PLL3 values based on the HSE that it uses.
2018-11-01 13:25:47 +11:00
Damien George dae1635c71 stm32/powerctrl: Factor code that configures PLLSAI on F7 MCUs. 2018-09-24 17:34:05 +10:00
Damien George 90ea2c63a5 stm32/powerctrl: Factor code to set RCC PLL and use it in startup.
This ensures that on first boot the most optimal settings are used for the
voltage scaling and flash latency (for F7 MCUs).

This commit also provides more fine-grained control for the flash latency
settings.
2018-09-24 17:34:05 +10:00
Damien George 47550ef2cd stm32: For MCUs that have PLLSAI allow to set SYSCLK at 2MHz increments.
MCUs that have a PLLSAI can use it to generate a 48MHz clock for USB, SDIO
and RNG peripherals.  In such cases the SYSCLK is not restricted to values
that allow the system PLL to generate 48MHz, but can be any frequency.
This patch allows such configurability for F7 MCUs, allowing the SYSCLK to
be set in 2MHz increments via machine.freq().  PLLSAI will only be enabled
if needed, and consumes about 1mA extra.  This fine grained control of
frequency is useful to get accurate SPI baudrates, for example.
2018-09-11 16:42:57 +10:00
Tobias Badertscher 708cdb6276 stm32: Add support for STM32L496 MCU. 2018-05-18 22:37:30 +10:00
Damien George 051686b0a8 stm32/main: Clean up and optimise initial start-up code of the MCU. 2018-05-02 15:20:24 +10:00
Damien George a03e6c1e05 stm32/irq: Define IRQ priorities directly as encoded hardware values.
For a given IRQn (eg UART) there's no need to carry around both a PRI and
SUBPRI value (eg IRQ_PRI_UART, IRQ_SUBPRI_UART).  Instead, the IRQ_PRI_UART
value has been changed in this patch to be the encoded hardware value,
using NVIC_EncodePriority.  This way the NVIC_SetPriority function can be
used directly, instead of going through HAL_NVIC_SetPriority which must do
extra processing to encode the PRI+SUBPRI.

For a priority grouping of 4 (4 bits for preempt priority, 0 bits for the
sub-priority), which is used in the stm32 port, the IRQ_PRI_xxx constants
remain unchanged in their value.

This patch also "fixes" the use of raise_irq_pri() which should be passed
the encoded value (but as mentioned above the unencoded value is the same
as the encoded value for priority grouping 4, so there was no bug from this
error).
2018-05-02 14:41:02 +10:00
Damien George 527ba0426c stm32/system_stm32: Reconfigure SysTick IRQ priority for L4 MCUs.
After calling HAL_SYSTICK_Config the SysTick IRQ priority is set to 15, the
lowest priority.  This commit reconfigures the IRQ priority to the desired
TICK_INT_PRIORITY value.
2018-04-27 12:54:35 +10:00
Damien George cf9fc7346d stm32: Allow a board to configure the HSE in bypass mode.
To use HSE bypass mode the board should define:

    #define MICROPY_HW_CLK_USE_BYPASS (1)

If this is not defined, or is defined to 0, then HSE oscillator mode is
used.
2018-04-11 16:46:47 +10:00
Damien George 04de9e33bc stm32/system_stm32: Set VTOR pointer from TEXT0_ADDR. 2018-03-27 21:32:39 +11:00
Damien George e37b8ba5a5 stm32: Use STM32xx macros instead of MCU_SERIES_xx to select MCU type.
The CMSIS files for the STM32 range provide macros to distinguish between
the different MCU series: STM32F4, STM32F7, STM32H7, STM32L4, etc.  Prefer
to use these instead of custom ones.
2018-03-17 10:42:50 +11:00
iabdalkader ad2a6e538c stm32/system_stm32: Fix CONFIG_RCC_CR_2ND value to use bitwise or. 2018-03-09 23:37:09 +11:00
iabdalkader 2e93d4167d stm32/system_stm32: Add H7 MCU system initialisation. 2018-03-09 15:09:56 +11:00
Damien George 01dd7804b8 ports: Make new ports/ sub-directory and move all ports there.
This is to keep the top-level directory clean, to make it clear what is
core and what is a port, and to allow the repository to grow with new ports
in a sustainable way.
2017-09-06 13:40:51 +10:00