8 Commits

Author	SHA1	Message	Date
Dan Halbert	68a2927385	MP_REGISTER_ROOT_POINTER for port-specific root pointers	2023-09-29 15:46:42 -04:00
Scott Shawcroft	a56e97db1d	Align MP heap allocations to cache lines	2023-07-20 11:20:32 -07:00
microDev	a52eb88031	run code formatting script	2021-03-15 19:27:36 +05:30
Dan Halbert	69869e1439	CIRCUITPY_* switches for JSON, RE, etc. Doc cleanup	2021-01-24 23:10:20 -05:00
gamblor21	4270061db4	Moved ORDEREDDICT define to central location	2020-10-13 18:52:27 -05:00
Jeff Epler	db01f88cc3	enable MICROPY_PY_REVERSE_SPECIAL_METHODS where ulab is enabled	2020-04-13 19:58:52 -05:00
Scott Shawcroft	7d8dac9211	Refine iMX RT memory layout and add three boards ... Introduces a way to place CircuitPython code and data into tightly coupled memory (TCM) which is accessible by the CPU in a single cycle. It also frees up room in the corresponding cache for intermittent data. Loading from external flash is slow! The data cache is also now enabled. Adds support for the iMX RT 1021 chip. Adds three new boards: * iMX RT 1020 EVK * iMX RT 1060 EVK * Teensy 4.0 Related to #2492, #2472 and #2477. Fixes #2475.	2020-01-17 17:36:08 -08:00
arturo182	13e0cba6f1	Add initial MIMXRT10XX port	2020-01-06 21:08:49 +01:00