Commit Graph

985 Commits

Author SHA1 Message Date
Andrew Leech
29865e3e58 stm32/rtc: Allow overriding startup timeouts from mpconfigboard. 2019-05-09 12:08:43 +10:00
Elad Namdar
3f54462add unix/modusocket: Fix use of setsockopt in usocket.settimeout impl.
The original code called setsockopt(SO_RCVTIMEO/SO_SNDTIMEO) with NULL
timeout structure argument, which is an illegal usage of that function.
The old code also didn't validate the return value of setsockopt, missing
the bug completely.
2019-05-08 13:12:30 +10:00
Damien George
b8c74014e4 stm32/usbd_cdc_interface: Don't retransmit chars if USB is reconnected.
Before this change, if the USB was reconnected it was possible that some
characters in the TX buffer were retransmitted because tx_buf_ptr_out and
tx_buf_ptr_out_shadow were reset while tx_buf_ptr_in wasn't.  That
behaviour is fixed here by retaining the TX buffer state across reconnects.

Fixes issue #4761.
2019-05-08 12:45:24 +10:00
Damien George
97753a1bbc stm32: Move factory reset files and code to separate source file.
The new function factory_reset_make_files() populates the given filesystem
with the default factory files.  It is defined with weak linkage so it can
be overridden by a board.

This commit also brings some minor user-facing changes:

- boot.py is now no longer created unconditionally if it doesn't exist, it
  is now only created when the filesystem is formatted and the other files
  are populated (so, before, if the user deleted boot.py it would be
  recreated at next boot; now it won't be).

- pybcdc.inf and README.txt are only created if the board has USB, because
  they only really make sense if the filesystem is exposed via USB.
2019-05-07 13:59:51 +10:00
Damien George
34942d0a72 stm32/machine_uart: Change default UART timeout to 0, for non blocking.
It's more common to need non-blocking behaviour when reading from a UART,
rather than having a large timeout like 1000ms (the original behaviour).
With a large timeout it's 1) likely that the function will read forever if
characters keep trickling it; or 2) the function will unnecessarily wait
when characters come sporadically, eg at a REPL prompt.
2019-05-07 13:56:42 +10:00
Yonatan Goldschmidt
ef9843653b extmod/moducryptolib: Add AES-CTR support.
Selectable at compile time via MICROPY_PY_UCRYPTOLIB_CTR.  Disabled by
default.
2019-05-06 18:09:48 +10:00
Damien George
906fb89fd7 unix/coverage: Add test for printing literal % character. 2019-05-03 23:21:28 +10:00
Nguyen Hoan Hoang
9a6f6fd68d nrf/boards: Add support for BLYST Nano module based boards.
- IBK-BLYST-NANO: Breakout board
- IDK-BLYST-NANO: DevKit board with builtin IDAP-M CMSIS-DAP Debug JTAG,
  RGB led
- BLUEIO-TAG-EVIM: Sensor tag board (environmental sensor
  (T, H, P, Air quality) + 9 axis motion sensor)

Also, the LED module has been updated to support individual base level
configuration of each LED. If set, this will be used instead of the
common configuration, MICROPY_HW_LED_PULLUP. The new configuration,
MICROPY_HW_LEDX_LEVEL, where X is the LED number can be used to set
the base level of the specific LED.
2019-05-02 22:33:44 +02:00
Chris Mason
2a791170ce stm32/boards: Add NUCLEO_F413ZH board configuration.
The alternate function pin allocations are different to other NUCLEO-144
boards.  This is because the STM32F413 has a very high peripheral count:
10x UART, 5x SPI, 3x I2C, 3x CAN.  The pinout was chosen to expose all
these devices on separate pins except CAN3 which shares a pin with UART1
and SPI1 which shares pins with DAC.
2019-05-02 16:33:30 +10:00
Chris Mason
1b956ec817 stm32: Add support for F413 MCUs.
Includes:
- Support for CAN3.
- Support for UART9 and UART10.
- stm32f413xg.ld and stm32f413xh.ld linker scripts.
- stm32f413_af.csv alternate function mapping.
- startup_stm32f413xx.s because F413 has different interrupt vector table.
- Memory configuration with: 240K filesystem, 240K heap, 16K stack.
2019-05-02 16:26:53 +10:00
Damien George
a974f2dc6e stm32/flash: Fix bug computing page number for L432 page erase. 2019-05-02 14:53:26 +10:00
Damien George
3fbf32b947 stm32/powerctrl: Support changing frequency when HSI is clock source.
This patch makes pllvalues.py generate two tables: one for when HSI is used
and one for when HSE is used.  The correct table is then selected at
compile time via the existing MICROPY_HW_CLK_USE_HSI.
2019-05-02 13:00:00 +10:00
stijn
34a7d7ebeb unix/gcollect: Make sure stack/regs get captured properly for GC.
When building with link time optimization enabled it is possible both
gc_collect() and gc_collect_regs_and_stack() get inlined into gc_alloc()
which can result in the regs variable being pushed on the stack earlier
than some of the registers. Depending on the calling convention, those
registers might however contain pointers to blocks which have just been
allocated in the caller of gc_alloc(). Then those pointers end up higher on
the stack than regs, aren't marked by gc_collect_root() and hence get
sweeped, even though they're still in use.

As reported in #4652 this happened for in 32-bit msvc release builds:
mp_lexer_new() does two consecutive allocations and the latter triggered a
gc_collect() which would sweep the memory of the first allocation again.
2019-05-01 15:06:21 +10:00
Damien George
cbeac903e8 stm32/main: Increase default UART REPL rx buffer from 64 to 260 bytes.
This allows the UART to buffer at least 256 bytes (taking into account the
extra byte needed by the ring buffer, and word alignment).
2019-05-01 14:53:21 +10:00
Damien George
ff0306dfa5 stm32/usb: Remove mp_hal_set_interrupt_char now that it's reset at boot. 2019-05-01 13:08:05 +10:00
Krono
fbd4e61e57 esp32/machine_wdt: Add timeout arg to select interval, make WDT panic.
The machine.WDT() now accepts the "timeout" keyword argument to select the
WDT interval.  And the WDT is changed to panic mode which means it will
reset the device if the interval expires (instead of just printing an error
message).
2019-04-30 16:53:05 +10:00
Damien George
8031b7a25c stm32/powerctrl: Deselect PLLSAI as 48MHz src before turning off PLLSAI.
On the STM32F722 (at least, but STM32F767 is not affected) the CK48MSEL bit
must be deselected before PLLSAION is turned off, or else the 48MHz
peripherals (RNG, SDMMC, USB) may get stuck without a clock source.

In such "lock up" cases it seems that these peripherals are still being
clocked from the PLLSAI even though the CK48MSEL bit is turned off.  A hard
reset does not get them out of this stuck state.  Enabling the PLLSAI and
then disabling it does get them out.  A test case to see this is:

    import machine, pyb
    for i in range(100):
        machine.freq(122_000000)
        machine.freq(120_000000)
        print(i, [pyb.rng() for _ in range(4)])

On occasion the RNG will just return 0's, but will get fixed again on the
next loop (when PLLSAI is enabled by the change to a SYSCLK of 122MHz).

Fixes issue #4696.
2019-04-29 16:31:32 +10:00
Damien George
d1dea4f577 javascript/library: Print data as raw bytes to stdout so unicode works. 2019-04-28 22:39:41 +10:00
Damien George
bd6fed8201 javascript/Makefile: Fix unrepresentable float error by using clamp.
Otherwise converting large floats to ints will fail (as seen by the
builtin_float_hash.py test).
2019-04-28 22:17:42 +10:00
Damien George
93f5f80216 javascript: Pass (error) exit value out from script to process caller. 2019-04-28 22:16:27 +10:00
Damien George
bd0bacb637 javascript/library: Use Buffer.alloc() since new Buffer() is deprecated. 2019-04-28 22:14:28 +10:00
Andrew Leech
70a28e3ad9 stm32/usb: Add USB device mode for VCP+VCP without MSC.
Selectable via pyb.usb_mode('VCP+VCP').
2019-04-28 21:31:47 +10:00
Damien George
0646e607b5 ports: Convert to use pyexec_file_if_exists() to execute boot/main.py.
The stm32 and nrf ports already had the behaviour that they would first
check if the script exists before executing it, and this patch makes all
other ports work the same way.  This helps when developing apps because
it's hard to tell (when unconditionally trying to execute the scripts) if
the resulting OSError at boot up comes from missing boot.py or main.py, or
from some other error.  And it's not really an error if these scripts don't
exist.
2019-04-26 15:22:14 +10:00
Damien George
f66c4cbfa6 stm32/usbdev: Make USB device descriptors at runtime rather than static. 2019-04-26 10:07:49 +10:00
Damien George
aa7b32c811 stm32/dac: Rework DAC driver to use direct register access.
This patch makes the DAC driver simpler and removes the need for the ST
HAL.  As part of it, new helper functions are added to the DMA driver,
which also use direct register access instead of the ST HAL.

Main changes to the DAC interface are:

- The DAC uPy object is no longer allocated dynamically on the heap,
  rather it's statically allocated and the same object is retrieved for
  subsequent uses of pyb.DAC(<id>).  This allows to access the DAC objects
  without resetting the DAC peripheral.  It also means that the DAC is only
  reset if explicitly passed initialisation parameters, like "bits" or
  "buffering".

- The DAC.noise() and DAC.triangle() methods now output a signal which is
  full scale (previously it was a fraction of the full output voltage).

- The DAC.write_timed() method is fixed so that it continues in the
  background when another peripheral (eg SPI) uses the DMA (previously the
  DAC would stop if another peripheral finished with the DMA and shut the
  DMA peripheral off completely).

Based on the above, the following backwards incompatibilities are
introduced:

- pyb.DAC(id) will now only reset the DAC the first time it is called,
  whereas previously each call to create a DAC object would reset the DAC.
  To get the old behaviour pass the bits parameter like: pyb.DAC(id, bits).

- DAC.noise() and DAC.triangle() are now full scale.  To get previous
  behaviour (to change the amplitude and offset) write to the DAC_CR (MAMP
  bits) and DAC_DHR12Rx registers manually.
2019-04-24 15:51:19 +10:00
Damien George
8402c26cfa stm32/powerctrl: Enable EIWUP to ensure RTC wakes device from standby. 2019-04-18 17:15:11 +10:00
Damien George
11657f2f20 stm32/system_stm32f0: Add support for using HSE and PLL as SYSCLK.
To configure the SYSCLK on an F0 enable one of:

    MICROPY_HW_CLK_USE_HSI48
    MICROPY_HW_CLK_USE_HSE
    MICROPY_HW_CLK_USE_BYPASS
2019-04-18 16:00:45 +10:00
Damien George
f1774fa049 stm32/system_stm32f0: Enable PWR clock on startup.
To be consistent with how F4/F7/H7/L4 works in system_stm32.c.  The power
control peripheral is needed at least for the RTC.
2019-04-18 15:36:59 +10:00
Damien George
4ce0091449 esp32/README: Add info about pyparsing and the correct Python version.
See issue #4655.
2019-04-18 14:17:01 +10:00
Damien George
194d6b6788 stm32/timer: Correctly initialise extended break settings on F7/H7/L4.
Fixes issue #4693.
2019-04-15 11:41:03 +10:00
Damien George
fd112239d6 stm32/rtc: Remove non-ASCII mu-character from source code comment.
And fix a typo in the comment on this line.
2019-04-12 11:32:24 +10:00
Damiano Mazzella
3c9f78b048 zephyr/CMakeLists.txt: Set AR to point to the Zephyr toolchain exe. 2019-04-11 12:24:05 +10:00
Damien George
fc9f2ff0cd stm32/rtc: Remove unused LSE detection code. 2019-04-11 12:14:21 +10:00
Damien George
46e5d6b889 stm32/rtc: Add auto-LSE-bypass detection with fallback to LSE then LSI.
If MICROPY_HW_RTC_USE_BYPASS is enabled the RTC startup goes as follows:
- RTC is started with LSE in bypass mode to begin with
- if that fails to start (after a given timeout) then LSE is reconfigured
  in non-bypass
- if that fails to start then RTC is switched to LSI
2019-04-11 12:09:21 +10:00
Damien George
358364b45e stm32/boards/NUCLEO_L432KC: Disable complex nos and default frozen mods.
To save space, since this board only hase 256k of flash.
2019-04-09 11:23:08 +10:00
Damien George
4831e38c7e stm32/boards/NUCLEO_H743ZI: Add config options to support mboot. 2019-04-08 14:34:37 +10:00
Damien George
fd13ce5e60 stm32/mboot: Add support for H7 MCUs, with H743 flash layout. 2019-04-08 14:33:57 +10:00
Damien George
ae1e18a346 stm32/usbd_conf: Add support for USB HS peripheral on H7 MCUs. 2019-04-08 14:30:16 +10:00
Damien George
2c3fa4ad82 stm32/i2cslave: Add support for H7 MCUs. 2019-04-08 14:28:45 +10:00
Damien George
fd523c53c3 stm32/network_wiznet5k: Automatically set MAC if device doesn't have one 2019-04-05 22:37:06 +11:00
Damien George
4f936afc44 stm32/network_wiznet5k: Add ability to set the MAC address. 2019-04-05 22:35:04 +11:00
Damien George
4410efc1e3 stm32/network_wiznet5k: Add ability to trace Ethernet TX and RX frames.
Via: nic.config(trace=2|4)
2019-04-05 22:33:49 +11:00
Damien George
69cb24a21d esp32/boards/sdkconfig: Disable WDT check of idle task on CPU1.
With dual-core enabled it's possible that the uPy task has full utilisation
of CPU1.  Fixes issue #4673.
2019-04-05 12:25:21 +11:00
Glenn Ruben Bakke
1f5d945afa nrf/Makefile: Update to match latest oofatfs version.
See corresponding commit b5f33ac2cb
2019-04-01 19:22:25 +02:00
Damien George
83f3c29d36 stm32/moduos: Allow to compile again without USB enabled. 2019-04-01 17:11:39 +11:00
Damien George
7ce2a08231 stm32: Add support for MMC driver, exposed via pyb.MMCard class.
Enable it via MICROPY_HW_ENABLE_MMCARD.
2019-04-01 17:04:43 +11:00
Damien George
9670b26526 stm32: Rename MICROPY_HW_HAS_SDCARD to MICROPY_HW_ENABLE_SDCARD.
For consistency with the majority of other MICROPY_HW_ENABLE_xxx macros.
2019-04-01 15:21:26 +11:00
Damien George
7b5bf5f6fd stm32/uart: Handle correctly the char overrun case of RXNE=0 and ORE=1.
Fixes issue #3375.
2019-04-01 13:40:35 +11:00
roland van straten
edd0e0f93d stm32/timer: Expose the PWM BRK capability of Timer 1 and 8.
The break mode is configurable via the 'brk' keyword to the Timer
constructor and init method.  It's disabled by default.
2019-04-01 13:30:37 +11:00
Andrew Leech
9d6f70f715 stm32: Make default USB_VCP stream go through uos.dupterm for main REPL.
Use uos.dupterm for REPL configuration of the main USB_VCP(0) stream on
dupterm slot 1, if USB is enabled.  This means dupterm can also be used to
disable the boot REPL port if desired, via uos.dupterm(None, 1).

For efficiency this adds a simple hook to the global uos.dupterm code to
work with streams that are known to be native streams.
2019-04-01 13:04:05 +11:00