Commit Graph

7 Commits

Author SHA1 Message Date
Scott Shawcroft
7d8dac9211
Refine iMX RT memory layout and add three boards
Introduces a way to place CircuitPython code and data into
tightly coupled memory (TCM) which is accessible by the CPU in a
single cycle. It also frees up room in the corresponding cache for
intermittent data. Loading from external flash is slow!

The data cache is also now enabled.

Adds support for the iMX RT 1021 chip. Adds three new boards:
* iMX RT 1020 EVK
* iMX RT 1060 EVK
* Teensy 4.0

Related to #2492, #2472 and #2477. Fixes #2475.
2020-01-17 17:36:08 -08:00
Kamil Tomaszewski
f3151bb6c4 Use get top and limit stack functions 2019-10-18 11:05:08 +02:00
Dan Halbert
bce6d124af Don't check for corrupt heap too early; Fix QSPI timing 2018-12-20 21:28:36 -05:00
Scott Shawcroft
6ef8639971
Rework safe mode and have heap overwrite trigger it.
This creates a common safe mode mechanic that ports can share.
As a result, the nRF52 now has safe mode support as well.

The common safe mode adds a 700ms delay at startup where a reset
during that window will cause a reset into safe mode. This window
is designated by a yellow status pixel and flashing the single led
three times.

A couple NeoPixel fixes are included for the nRF52 as well.

Fixes #1034. Fixes #990. Fixes #615.
2018-12-06 14:24:20 -08:00
Scott Shawcroft
7ad2e6ace3
Add stack validity check and raise an error when it happens.
The backtrace cannot be given because it relies on the validity
of the qstr data structures on the heap which may have been
corrupted.

In fact, it still can crash hard when the bytecode itself is
overwritten. To fix, we'd need a way to skip gathering the
backtrace completely.

This also increases the default stack size on M4s so it can
accomodate the stack needed by ASF4s nvm API.
2018-12-04 23:26:04 -08:00
Scott Shawcroft
5704bc8c93
Share memory.c and a bit of polish. 2018-08-02 14:35:46 -07:00
Scott Shawcroft
12cf5e51c2
Allow for resizing the stack area. 2018-07-31 05:18:23 -07:00