Commit Graph

139 Commits

Author SHA1 Message Date
Damien George e6d97e8a0b stm32: Move gchelper assembler code to lib/utils for use by other ports. 2019-02-12 14:11:21 +11:00
Tobias Badertscher 372e7a4dc6 stm32: Implement UART.irq() method with initial support for RX idle IRQ. 2018-12-29 17:21:37 +11:00
Damien George a2271532be stm32: Split out UART Python bindings from uart.c to machine_uart.c. 2018-12-10 16:21:50 +11:00
Damien George dff14c740b stm32/powerctrl: Move function to set SYSCLK into new powerctrl file.
Power and clock control is low-level functionality and it makes sense to
have it in a dedicated file, at least so it can be reused by other parts of
the code.
2018-09-24 14:18:18 +10:00
Andrew Leech 84f4d58479 stm32/dcmi: Add F4/F7/H7 hal files and dma definitions for DCMI periph. 2018-09-21 12:12:49 +10:00
Damien George 56f275c0a2 stm32/Makefile: Include copysign.c in double precision float builds.
This is required for DEBUG=1 builds when MICROPY_FLOAT_IMPL=double.

Thanks to Andrew Leech.
2018-09-20 16:51:20 +10:00
Andrew Leech 17f7c683d2 stm32: Add support for STM32F765xx MCUs.
This part is functionally similar to STM32F767xx (they share a datasheet)
so support is generally comparable.  When adding board support the
stm32f767_af.csv and stm32f767.ld should be used.
2018-09-20 15:16:03 +10:00
Damien George 47550ef2cd stm32: For MCUs that have PLLSAI allow to set SYSCLK at 2MHz increments.
MCUs that have a PLLSAI can use it to generate a 48MHz clock for USB, SDIO
and RNG peripherals.  In such cases the SYSCLK is not restricted to values
that allow the system PLL to generate 48MHz, but can be any frequency.
This patch allows such configurability for F7 MCUs, allowing the SYSCLK to
be set in 2MHz increments via machine.freq().  PLLSAI will only be enabled
if needed, and consumes about 1mA extra.  This fine grained control of
frequency is useful to get accurate SPI baudrates, for example.
2018-09-11 16:42:57 +10:00
Andrew Leech 670a2a3396 stm32/Makefile: Allow external BOARD_DIR directory to be specified.
This makes it easy to add a custom board definition outside of the
micropython tree, keeping the micropython submodule clean and official.
2018-09-11 15:15:21 +10:00
Damien George 8300be6d0f stm32/spi: Split out pyb.SPI and machine.SPI bindings to their own files
The aim here is to have spi.c contain the low-level SPI driver which is
independent (not fully but close) of MicroPython objects and methods, and
the higher-level bindings are separated out to pyb_spi.c and machine_spi.c.
2018-08-14 17:11:07 +10:00
Damien George f6f6452b6f stm32/Makefile: Use -Wno-attributes for ll_usb.c HAL source file.
A recent version of arm-none-eabi-gcc (8.2.0) will warn about unused packed
attributes in USB_WritePacket and USB_ReadPacket.  This patch suppresses
such warnings for this file only.
2018-07-30 15:35:05 +10:00
Andrew Leech a1db1506a2 stm32/sdram: Integrate SDRAM driver into rest of code.
If SDRAM is configured and enabled for a board then it is used for the
MicroPython GC heap.
2018-07-23 23:14:23 +10:00
Andrew Leech 4343c9330e stm32: Add method for statically configuring pin alternate function.
Works with pins declared normally in mpconfigboard.h, eg. (pin_XX), as well
as (pyb_pin_XX).

Provides new mp_hal_pin_config_alt_static(pin_obj, mode, pull, fn_type)
function declared in pin_static_af.h to allow configuring pin alternate
functions by name at compile time.
2018-07-20 14:03:21 +10:00
Damien George 5042d98514 stm32/Makefile: Rebuild all qstrs when any board configuration changes. 2018-06-12 13:53:43 +10:00
Damien George 7d86ac6c01 stm32: Add network driver for Wiznet5k using MACRAW mode and lwIP.
The Wiznet5k series of chips support a MACRAW mode which allows the host to
send and receive Ethernet frames directly.  This can be hooked into the
lwIP stack to provide a full "socket" implementation using this Wiznet
Ethernet device.  This patch adds support for this feature.

To enable the feature one must add the following to mpconfigboard.mk, or
mpconfigport.mk:

    MICROPY_PY_WIZNET5K = 5500

and the following to mpconfigboard.h, or mpconfigport.h:

    #define MICROPY_PY_LWIP (1)

After wiring up the module (X5=CS, X4=RST), usage on a pyboard is:

    import time, network
    nic = network.WIZNET5K(pyb.SPI(1), pyb.Pin.board.X5, pyb.Pin.board.X4)
    nic.active(1)
    while not nic.isconnected():
        time.sleep_ms(50) # needed to poll the NIC
    print(nic.ifconfig())

Then use the socket module as usual.

Compared to using the built-in TCP/IP stack on the Wiznet module, some
performance is lost in MACRAW mode: with a lot of memory allocated to lwIP
buffers, lwIP gives Around 750,000 bytes/sec max TCP download, compared
with 1M/sec when using the TCP/IP stack on the Wiznet module.
2018-06-01 14:21:38 +10:00
Damien George ea7e747979 stm32: Add support for STM32F0 MCUs. 2018-05-28 21:49:49 +10:00
Damien George cda964198a stm32: Integrate lwIP as implementation of usocket module.
This patch allows to use lwIP as the implementation of the usocket module,
instead of the existing socket-multiplexer that delegates the entire TCP/IP
layer to the NIC itself.

This is disabled by default, and enabled by defining MICROPY_PY_LWIP to 1.

When enabled, the lwIP TCP/IP stack will be included in the build with
default settings for memory usage and performance (see
lwip_inc/lwipopts.h).  It is then up to a particular NIC to register itself
with lwIP using the standard lwIP netif API.
2018-05-21 17:36:06 +10:00
Damien George aea71dbde0 stm32/Makefile: Use -O2 to optimise compilation of lib/libc/string0.c. 2018-05-04 15:53:51 +10:00
Damien George 19778d0a3c stm32/i2c: Add low-level I2C driver for F7 MCUs. 2018-04-24 23:48:04 +10:00
Damien George b73adcc3d9 stm32: Rename i2c.c to pyb_i2c.c.
i2c.c implements the legacy pyb.I2C class so rename the file to make this
explicit, and also to make room for an improved I2C driver.
2018-04-24 16:23:36 +10:00
Damien George d9e69681f5 stm32: Add custom, optimised Reset_Handler code.
The Reset_Handler needs to copy the data section and zero the BSS, and
these operations should be as optimised as possible to reduce start up
time.  The versions provided in this patch are about 2x faster (on a Cortex
M4) than the previous implementations.
2018-03-29 15:29:23 +11:00
Damien George 04de9e33bc stm32/system_stm32: Set VTOR pointer from TEXT0_ADDR. 2018-03-27 21:32:39 +11:00
Damien George ed75b2655f stm32/Makefile: Allow a board to config either 1 or 2 firmware sections.
This patch forces a board to explicitly define TEXT1_ADDR in order to
split the firmware into two separate pieces.  Otherwise the default is now
to produce only a single continuous firmware image with all ISR, text and
data together.
2018-03-27 21:24:15 +11:00
Damien George 95b2cb008e stm32/Makefile: Rename FLASH_ADDR/TEXT_ADDR to TEXT0_ADDR/TEXT1_ADDR.
To make it clearer that these addresses are both for firmware text and that
they have a prescribed ordering.
2018-03-27 21:20:04 +11:00
Damien George 7aec06ca9a stm32/boards: Allow boards to have finer control over the linker script.
This patch allows a particular board to independently specify the linker
scripts for 1) the MCU memory layout; 2) how the different firmware
sections are arranged in memory.  Right now all boards follow the same
layout with two separate firmware section, one for the ISR and one for the
text and data.  This leaves room for storage (filesystem data) to live
between the firmware sections.

The idea with this patch is to accommodate boards that don't have internal
flash storage and only need to have one continuous firmware section.  Thus
the common.ld script is renamed to common_ifs.ld to make explicit that it
is used for cases where the board has internal flash storage.
2018-03-27 21:17:48 +11:00
Damien George b63cc1e9ef stm32/Makefile: Re-enable strict aliasing optimisation for ST HAL files.
The HAL requires strict aliasing optimisation to be turned on to function
correctly (at least for the SD card driver on F4 MCUs).  This optimisation
was recently disabled with the addition of H7 support due to the H7 HAL
having errors with the strict aliasing optimisation enabled.  But this is
now fixed in the latest stm32lib and so the optimisation can now be
re-enabled.

Thanks to @chuckbook for finding that there was a problem with the SD card
on F4 MCUs with the strict aliasing optimisation disabled.
2018-03-26 00:00:47 +11:00
Damien George e37b8ba5a5 stm32: Use STM32xx macros instead of MCU_SERIES_xx to select MCU type.
The CMSIS files for the STM32 range provide macros to distinguish between
the different MCU series: STM32F4, STM32F7, STM32H7, STM32L4, etc.  Prefer
to use these instead of custom ones.
2018-03-17 10:42:50 +11:00
Damien George 58ebeca6a9 drivers/bus: Pull out software SPI implementation to dedicated driver.
This patch takes the software SPI implementation from extmod/machine_spi.c
and moves it to a dedicated file in drivers/bus/softspi.c.  This allows the
SPI driver to be used independently of the uPy runtime, making it a more
general component.
2018-03-10 00:59:43 +11:00
iabdalkader 66748aaf60 stm32/Makefile: Use separate startup file for each MCU series. 2018-03-09 15:14:17 +11:00
iabdalkader b8d09b9bef stm32/Makefile: Add settings to support H7 MCUs. 2018-03-09 15:09:29 +11:00
Damien George adda38cf76 stm32/qspi: Add hardware QSPI driver, with memory-map capability.
It supports the abstract QSPI protocol defined in drivers/bus/qspi.h.
2018-03-03 00:17:08 +11:00
Damien George 0210383da5 stm32/spibdev: Add option to configure SPI block dev to use QSPI flash.
To use QSPI (in software QSPI mode) the configuration needed is:

    #define MICROPY_HW_SPIFLASH_SIZE_BITS (n * 1024 * 1024)
    #define MICROPY_HW_SPIFLASH_CS      (pin_x1)
    #define MICROPY_HW_SPIFLASH_SCK     (pin_x2)
    #define MICROPY_HW_SPIFLASH_IO0     (pin_x3)
    #define MICROPY_HW_SPIFLASH_IO1     (pin_x4)
    #define MICROPY_HW_SPIFLASH_IO2     (pin_x5)
    #define MICROPY_HW_SPIFLASH_IO3     (pin_x6)
2018-03-02 23:55:45 +11:00
Damien George e6220618ce stm32: Use "GEN" for describing files generated in the build.
Instead of "Create", to match the build output from the py/ core.
2018-02-23 16:27:30 +11:00
Damien George fa13e0d35b stm32: Factor out flash and SPI block-device code to separate files.
Prior to this patch, storage.c was a combination of code that handled
either internal flash or external SPI flash and exposed one of them as a
block device for the local storage.  It was also exposed to the USB MSC.

This patch splits out the flash and SPI code to separate files, which each
provide a general block-device interface (at the C level).  Then storage.c
just picks one of them to use as the local storage medium.  The aim of this
factoring is to allow to add new block devices in the future and allow for
easier configurability.
2018-02-13 22:21:46 +11:00
Damien George 57d2ac1300 stm32/rng: Simplify RNG implementation by accessing raw peripheral regs.
It saves code size and RAM, and is more efficient to execute.
2018-02-02 18:22:57 +11:00
Damien George efdda2c62d stm32: Add support for DHT11/DHT22 sensors. 2018-01-31 18:12:53 +11:00
Damien George e36821a766 stm32/modnwwiznet5k: Add support for W5500 Ethernet chip.
Which Wiznet chip to use is a compile-time option: MICROPY_PY_WIZNET5K
should be set to either 5200 or 5500 to support either one of these
Ethernet chips.  The driver is called network.WIZNET5K in both cases.

Note that this commit introduces a breaking-change at the build level
because previously the valid values for MICROPY_PY_WIZNET5K were 0 and 1
but now they are 0, 5200 and 5500.
2017-10-16 15:36:57 +11:00
Damien George 4a93801c12 all: Update Makefiles and others to build with new ports/ dir layout.
Also renames "stmhal" to "stm32" in documentation and everywhere else.
2017-09-06 14:09:13 +10:00
Damien George 01dd7804b8 ports: Make new ports/ sub-directory and move all ports there.
This is to keep the top-level directory clean, to make it clear what is
core and what is a port, and to allow the repository to grow with new ports
in a sustainable way.
2017-09-06 13:40:51 +10:00