/docs/design_guide: added links to firmware build learning guides for SAMD21 & ESP8266. Changes were placed in the "Adding native modules" section, since that seemed to me the best place based on target audience.
Updated documentation for `delay()` which fixes#243.
- Added D4 and moved associated SD_CS so that they are paired within list
- Added D7 and SD_CD which is the SD Card Detect pin
- Added D8 and GREEN_LED
- Added RED_LED associated with D13
- Added Setup information regarding arm complier packages
- README - Updated to reflect that feather_m0_adalogger microSD is supported
- Added D4 and moved associated SD_CS so that they are paired within list
- Added D7 and SD_CD which is the SD Card Detect pin
- Added D8 and GREEN_LED
- Added RED_LED associated with D13
Also, fixed pin mappings for rev B Metro M4:
swap PA12 and PA13 on SPI 2x3 header
swap A3 and A5
Comment out all frozen modules in CPX again to make room while waiting
for SPI flash.
This does two major things:
1. It stores the arm gcc in the repo. The download from the PPA was taking between 2 and 7 minutes.
2. It splits each board into a separate job so they are built in parallel.
* Be more liberal with critical sections to ensure ordering.
* Correct usb_busy so that it is busy when no errors occur on
transfer. I believe it worked before because it would be false
momentarily until a second transfer was attempted and a busy
error was returned, therefore setting usb_busy to true. That
risks the first "failed" transfer completing before a second one
is attempted.
* Added asf4_conf/samd*/hpl_sercom_config.h
* Adjusted clocks in peripheral_clk_config.h.
* Put some frozen libs back in CPX for testing.
* Implement common-hal I2C
* Add samd*_peripherals.h in parallel with samd*_pins.h for common
functions and data.
* Store SERCOM index in pins table for convenience.
* Canonicalize some #include guard names in various .h files.
simpler reset of SERCOMs; remove unused routine
This explicit zero length xfer leads to a second CSW packet. If
another read was started between the two CSWs then the host gets
confused and resets the device.
On reads, the CSW is automatically sent when we reply with the
total length. Writes must do it manually so they can wait for the
disk to flush the data.
