Commit Graph

5 Commits

Author SHA1 Message Date
Scott Shawcroft
87344ff53a
Disable the DCache when USB is initialized. There are still issues enabling it. 2020-01-21 18:32:19 -08:00
Scott Shawcroft
9d5742ebd1
Fix start on power up by providing Reset_Handler ourselves.
On power up the FlexRAM banks are in an unknown config so we can't
rely on the stack until after we configure FlexRAM.
2020-01-18 11:54:01 -08:00
Scott Shawcroft
9f4ea2122a
teensy fixes 2020-01-17 18:35:09 -08:00
Scott Shawcroft
7d8dac9211
Refine iMX RT memory layout and add three boards
Introduces a way to place CircuitPython code and data into
tightly coupled memory (TCM) which is accessible by the CPU in a
single cycle. It also frees up room in the corresponding cache for
intermittent data. Loading from external flash is slow!

The data cache is also now enabled.

Adds support for the iMX RT 1021 chip. Adds three new boards:
* iMX RT 1020 EVK
* iMX RT 1060 EVK
* Teensy 4.0

Related to #2492, #2472 and #2477. Fixes #2475.
2020-01-17 17:36:08 -08:00
arturo182
13e0cba6f1 Add initial MIMXRT10XX port 2020-01-06 21:08:49 +01:00