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37 Commits

Author SHA1 Message Date
danicampora
1950295735 cc3200: Set pin direction first, then value. Fixes #1542. 2015-10-26 23:26:43 +01:00
danicampora
075ca64521 cc3200: Fix UART tests after correcting uart.read() behaviour. 2015-10-21 15:30:57 +02:00
danicampora
1f2daf4304 cc3200: Correct ticks_cpu and ticks_us functions in time module. 2015-10-21 15:30:57 +02:00
danicampora
9c72c71c05 cc3200: WLAN class can retrieve the existing instance. 2015-10-19 21:17:15 +02:00
danicampora
f4c50f1cfc tests/wipy: Make WLAN test more stable. 2015-10-19 21:17:15 +02:00
danicampora
ae70e98ed4 cc3200: Fix time.ticks_* functions. 2015-10-19 21:17:15 +02:00
danicampora
36ae417c9f docs: Add wipy and network.server documentation. 2015-10-19 21:17:15 +02:00
danicampora
2e0cd20a1d cc3200: Refactor network module to make the server a propper object. 2015-10-19 21:17:15 +02:00
danicampora
d8137178bb cc3200: Create wipy module, remove HeartBeat class. 
The heartbeat is now controllable via a single function within the
wipy module.
 2015-10-19 21:17:15 +02:00
danicampora
e19dfe1c32 cc3200: In scan results rename 'auth' field to 'sec'. 
As defined by the new API, since 'auth' is actually a  tuple
composed by the security type and the key.
 2015-10-17 23:21:44 +02:00
Daniel Campora
d88d3b0b3a tests/wipy: Skip the rtc_irq test. 2015-09-27 21:36:38 +02:00
Daniel Campora
6143f63560 tests/wipy: Fix error in wlan test. 2015-09-27 18:00:36 +02:00
Daniel Campora
37a2015cc5 tests/wipy: Add machine module tests. 2015-09-27 17:35:58 +02:00
Daniel Campora
c92e6a45eb cc3200: Rename pyb module to machine. 2015-09-27 16:50:27 +02:00
Daniel Campora
0a7e4fa5ce tests/wipy: Improve robustness of rtc_irq test. 2015-09-27 14:20:38 +02:00
Daniel Campora
8192310dad tests/wipy: Improve robustness of time test. 2015-09-27 12:32:02 +02:00
Daniel Campora
ef369249cb cc3200: Implement support for os.dupterm(). 2015-09-27 11:27:24 +02:00
Daniel Campora
57fa14b5be cc3200: New WLAN API including test. 2015-09-27 01:50:52 +02:00
Daniel Campora
dbdcb58d64 cc3200: New irq API, affects all classes that provide the irq method. 2015-09-27 01:48:20 +02:00
Daniel Campora
dffa9f6da6 cc3200: New SD and RTC API plus os and time modules' extensions. 2015-09-21 22:30:32 +02:00
Daniel Campora
660f8613fd tests/wipy: Remove unneeded dependencies to pyb.Pin. 2015-09-21 22:30:11 +02:00
Daniel Campora
22b4c28f85 cc3200: New ADC API. 2015-09-16 10:10:38 +02:00
Daniel Campora
0e52d9860a tests/wipy: Improve I2C tests. 2015-09-16 10:10:35 +02:00
Daniel Campora
aba75e1233 cc3200: New SPI API. 2015-09-16 10:10:33 +02:00
Daniel Campora
41f6948545 cc3200: New WDT API. 2015-09-16 10:10:29 +02:00
Daniel Campora
8332044f75 cc3200: Add UART.ODD and UART.EVEN to select parity. 2015-09-16 10:10:26 +02:00
Daniel Campora
d5ec336eef cc3200: Replace Pin.PULL_NONE with None. 2015-09-16 10:10:24 +02:00
Daniel Campora
e77abc261b cc3200: Default peripheral ID support on I2C. 2015-09-16 10:10:19 +02:00
Daniel Campora
7d6b6f6681 cc3200: Make UART choose default id when not given. 2015-09-16 10:10:13 +02:00
Daniel Campora
f352fe82a5 tests/wipy: Add I2C tests. 2015-09-10 08:00:59 +02:00
Daniel Campora
d265df589e tests/wipy: Disable the REPL on UART before running the UART test. 2015-09-10 08:00:53 +02:00
Daniel Campora
4cc0cd6cab tests/wipy: Additional tests for when the UART is un-initialized. 2015-09-10 08:00:35 +02:00
Daniel Campora
4d7fa05b43 cc3200: Improve Pin and UART implementation. 
Deassign pins af before assigning. Make uart.any() return the
correct value everytime, this requires interrupts to be always
enabled.
 2015-09-10 08:00:12 +02:00
Daniel Campora
f8b98d8329 tests/wipy: Improve UART tests with no pin assignment case. 2015-09-10 07:59:59 +02:00
Daniel Campora
f91f212d9f cc3200: New UART API plus related test. 2015-09-10 07:59:47 +02:00
Daniel Campora
36821d095a cc3200: Add alternate functions list to Pin object. 
Also remove pin.high() and pin.low() methods.
 2015-09-10 07:59:41 +02:00
Daniel Campora
d5e256486e cc3200: Re-work Pin class according to the new API. 
Also add relevant test.
 2015-09-10 07:59:35 +02:00