Dan Halbert
ab4194f752
don't allocate DMA buffer as long-lived
2019-02-13 19:49:57 -05:00
Dan Halbert
e92d90ce9c
Add second UARTE to busio.UART. Init uarts on startup.
2019-02-12 22:34:05 -05:00
Dan Halbert
28cfd8a513
CharacteristicBuffer: make it be a stream class; add locking
2019-01-19 19:45:35 -05:00
hathach
3ee766bc01
put received bytes to fifo when error
2018-12-28 01:05:30 +07:00
hathach
d092722ae8
fix #1407 keep receiving in case of error
2018-12-28 00:40:29 +07:00
hathach
b37b2fa7e7
overwrite old data if fifo is full
2018-12-13 23:56:06 +07:00
hathach
e136222ae2
use rbuf for busio uart
2018-12-13 23:48:53 +07:00
Dan Halbert
63cd9209f1
allow KeyboardInterrupt on UART read; fix nrf UART pin claiming; rename feather 52840 UART pins
2018-12-04 15:05:39 -05:00
Dan Halbert
80db2cec99
UART changes: timeout in secs, write bytes, etc.
2018-12-03 12:04:32 -05:00
Scott Shawcroft
9d91111b1b
Move atmel-samd to tinyusb and support nRF flash.
...
This started while adding USB MIDI support (and descriptor support is
in this change.) When seeing that I'd have to implement the MIDI class
logic twice, once for atmel-samd and once for nrf, I decided to refactor
the USB stack so its shared across ports. This has led to a number of
changes that remove items from the ports folder and move them into
supervisor.
Furthermore, we had external SPI flash support for nrf pending so I
factored out the connection between the usb stack and the flash API as
well. This PR also includes the QSPI support for nRF.
2018-11-08 17:25:30 -08:00
Dan Halbert
2262efc311
PulseOut working
2018-10-16 11:05:02 -04:00
hathach
08cbb03bdd
implement common_hal_busio_uart_clear_rx_buffer
2018-10-03 11:39:01 +07:00
hathach
f543c8415d
"busio.UART not yet implemented -> not available
2018-10-03 11:30:31 +07:00
hathach
76d6fb03f0
more clean up
2018-09-26 02:12:06 +07:00
hathach
eba80f7a99
update translate string
2018-09-26 02:10:44 +07:00
hathach
52328c88cd
remove space
2018-09-26 02:06:32 +07:00
hathach
74cc55b107
change error type to runtime
2018-09-25 17:31:53 +07:00
hathach
dec5c50c45
clean up
2018-09-25 16:22:14 +07:00
hathach
2f0e0bdcaf
migrate serial from uart to uarte
2018-09-25 16:14:44 +07:00
hathach
9017c9d29a
clean up
2018-09-25 14:29:45 +07:00
hathach
d3e5ba83eb
update nrfx to 1.3.0
2018-09-25 13:00:57 +07:00
hathach
d714479924
clean up
2018-09-25 12:48:48 +07:00
hathach
01c1296197
nrf52 uart io rx work reliably
2018-09-25 12:37:31 +07:00
hathach
1782ceab35
uarte malloc if buffer is not in SRAM
2018-09-24 16:18:49 +07:00
hathach
4015023e01
clean up uart io
2018-09-24 16:12:05 +07:00
hathach
7bbd449f06
uarte rx work fine
2018-09-24 15:54:32 +07:00
hathach
fdd3e91753
changing to nrf uarte, tx works fine
2018-09-24 14:56:52 +07:00
hathach
7a1b4ccc9b
Merge branch 'master' into nrf52_uart_io
2018-09-24 12:50:48 +07:00
hathach
816ff05253
clean up
2018-09-21 03:53:35 +07:00
hathach
dddc437ea7
got rx working finally
2018-09-21 03:48:13 +07:00
hathach
fe1a297889
still have issue with initial uart rx
2018-09-21 01:27:52 +07:00
hathach
9c25306877
uart rx got some issue with irq
2018-09-20 02:12:21 +07:00
hathach
c5593ec074
got uart tx work
2018-09-19 17:59:15 +07:00
Dan Halbert
56b7f3ba64
fix translate omission; pca10059 fix in .travis.yml
2018-09-18 16:28:27 -04:00
Dan Halbert
bc510e714f
merge 3.0.2 to master
2018-09-18 15:38:12 -04:00
Dan Halbert
6a72084198
fix nrf builds; sphinx 1.8.0 crashing: use lower version
2018-09-12 18:37:03 -04:00
Dan Halbert
585597a252
pin files rework; implement pin claiming; add more boards
2018-08-31 18:05:55 -04:00
Scott Shawcroft
76e0373576
Fix nrf and unix
2018-08-16 17:41:38 -07:00
Dan Halbert
5f101f3535
Add dummy UART implementation to nrf so it builds with UART turned on. Also add OneWire.
2018-02-21 22:53:17 -05:00
